1ea20ff5dSDavid Gibson/* 2ea20ff5dSDavid Gibson * Device Tree Source for IBM Ebony 3ea20ff5dSDavid Gibson * 4ea20ff5dSDavid Gibson * Copyright (c) 2006, 2007 IBM Corp. 5ea20ff5dSDavid Gibson * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com> 6ea20ff5dSDavid Gibson * 7ea20ff5dSDavid Gibson * FIXME: Draft only! 8ea20ff5dSDavid Gibson * 9ea20ff5dSDavid Gibson * This file is licensed under the terms of the GNU General Public 10ea20ff5dSDavid Gibson * License version 2. This program is licensed "as is" without 11ea20ff5dSDavid Gibson * any warranty of any kind, whether express or implied. 12ea20ff5dSDavid Gibson */ 13ea20ff5dSDavid Gibson 14ea20ff5dSDavid Gibson/ { 15ea20ff5dSDavid Gibson #address-cells = <2>; 16ea20ff5dSDavid Gibson #size-cells = <1>; 17ea20ff5dSDavid Gibson model = "ibm,ebony"; 18ea20ff5dSDavid Gibson compatible = "ibm,ebony"; 19ea20ff5dSDavid Gibson dcr-parent = <&/cpus/PowerPC,440GP@0>; 20ea20ff5dSDavid Gibson 21ea20ff5dSDavid Gibson cpus { 22ea20ff5dSDavid Gibson #address-cells = <1>; 23ea20ff5dSDavid Gibson #size-cells = <0>; 24ea20ff5dSDavid Gibson 25ea20ff5dSDavid Gibson PowerPC,440GP@0 { 26ea20ff5dSDavid Gibson device_type = "cpu"; 27ea20ff5dSDavid Gibson reg = <0>; 28ea20ff5dSDavid Gibson clock-frequency = <0>; // Filled in by zImage 29ea20ff5dSDavid Gibson timebase-frequency = <0>; // Filled in by zImage 308203c17eSLi Yang i-cache-line-size = <20>; 318203c17eSLi Yang d-cache-line-size = <20>; 32c72ea777SDavid Gibson i-cache-size = <8000>; /* 32 kB */ 33c72ea777SDavid Gibson d-cache-size = <8000>; /* 32 kB */ 34ea20ff5dSDavid Gibson dcr-controller; 35ea20ff5dSDavid Gibson dcr-access-method = "native"; 36ea20ff5dSDavid Gibson }; 37ea20ff5dSDavid Gibson }; 38ea20ff5dSDavid Gibson 39ea20ff5dSDavid Gibson memory { 40ea20ff5dSDavid Gibson device_type = "memory"; 41ea20ff5dSDavid Gibson reg = <0 0 0>; // Filled in by zImage 42ea20ff5dSDavid Gibson }; 43ea20ff5dSDavid Gibson 44ea20ff5dSDavid Gibson UIC0: interrupt-controller0 { 45ea20ff5dSDavid Gibson compatible = "ibm,uic-440gp", "ibm,uic"; 46ea20ff5dSDavid Gibson interrupt-controller; 47ea20ff5dSDavid Gibson cell-index = <0>; 48ea20ff5dSDavid Gibson dcr-reg = <0c0 009>; 49ea20ff5dSDavid Gibson #address-cells = <0>; 50ea20ff5dSDavid Gibson #size-cells = <0>; 51ea20ff5dSDavid Gibson #interrupt-cells = <2>; 52ea20ff5dSDavid Gibson 53ea20ff5dSDavid Gibson }; 54ea20ff5dSDavid Gibson 55ea20ff5dSDavid Gibson UIC1: interrupt-controller1 { 56ea20ff5dSDavid Gibson compatible = "ibm,uic-440gp", "ibm,uic"; 57ea20ff5dSDavid Gibson interrupt-controller; 58ea20ff5dSDavid Gibson cell-index = <1>; 59ea20ff5dSDavid Gibson dcr-reg = <0d0 009>; 60ea20ff5dSDavid Gibson #address-cells = <0>; 61ea20ff5dSDavid Gibson #size-cells = <0>; 62ea20ff5dSDavid Gibson #interrupt-cells = <2>; 63ea20ff5dSDavid Gibson interrupts = <1e 4 1f 4>; /* cascade */ 64ea20ff5dSDavid Gibson interrupt-parent = <&UIC0>; 65ea20ff5dSDavid Gibson }; 66ea20ff5dSDavid Gibson 67ea20ff5dSDavid Gibson CPC0: cpc { 68ea20ff5dSDavid Gibson compatible = "ibm,cpc-440gp"; 69ea20ff5dSDavid Gibson dcr-reg = <0b0 003 0e0 010>; 70ea20ff5dSDavid Gibson // FIXME: anything else? 71ea20ff5dSDavid Gibson }; 72ea20ff5dSDavid Gibson 73ea20ff5dSDavid Gibson plb { 74ea20ff5dSDavid Gibson compatible = "ibm,plb-440gp", "ibm,plb4"; 75ea20ff5dSDavid Gibson #address-cells = <2>; 76ea20ff5dSDavid Gibson #size-cells = <1>; 77ea20ff5dSDavid Gibson ranges; 78ea20ff5dSDavid Gibson clock-frequency = <0>; // Filled in by zImage 79ea20ff5dSDavid Gibson 80c72ea777SDavid Gibson SDRAM0: memory-controller { 81c72ea777SDavid Gibson compatible = "ibm,sdram-440gp"; 82ea20ff5dSDavid Gibson dcr-reg = <010 2>; 83ea20ff5dSDavid Gibson // FIXME: anything else? 84ea20ff5dSDavid Gibson }; 85ea20ff5dSDavid Gibson 86c72ea777SDavid Gibson SRAM0: sram { 87c72ea777SDavid Gibson compatible = "ibm,sram-440gp"; 88c72ea777SDavid Gibson dcr-reg = <020 8 00a 1>; 89c72ea777SDavid Gibson }; 90c72ea777SDavid Gibson 91ea20ff5dSDavid Gibson DMA0: dma { 92ea20ff5dSDavid Gibson // FIXME: ??? 93c72ea777SDavid Gibson compatible = "ibm,dma-440gp"; 94ea20ff5dSDavid Gibson dcr-reg = <100 027>; 95ea20ff5dSDavid Gibson }; 96ea20ff5dSDavid Gibson 97ea20ff5dSDavid Gibson MAL0: mcmal { 98ea20ff5dSDavid Gibson compatible = "ibm,mcmal-440gp", "ibm,mcmal"; 99ea20ff5dSDavid Gibson dcr-reg = <180 62>; 100ea20ff5dSDavid Gibson num-tx-chans = <4>; 101ea20ff5dSDavid Gibson num-rx-chans = <4>; 102ea20ff5dSDavid Gibson interrupt-parent = <&MAL0>; 103ea20ff5dSDavid Gibson interrupts = <0 1 2 3 4>; 104ea20ff5dSDavid Gibson #interrupt-cells = <1>; 105ea20ff5dSDavid Gibson #address-cells = <0>; 106ea20ff5dSDavid Gibson #size-cells = <0>; 107ea20ff5dSDavid Gibson interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 108ea20ff5dSDavid Gibson /*RXEOB*/ 1 &UIC0 b 4 109ea20ff5dSDavid Gibson /*SERR*/ 2 &UIC1 0 4 110ea20ff5dSDavid Gibson /*TXDE*/ 3 &UIC1 1 4 111ea20ff5dSDavid Gibson /*RXDE*/ 4 &UIC1 2 4>; 112ea20ff5dSDavid Gibson interrupt-map-mask = <ffffffff>; 113ea20ff5dSDavid Gibson }; 114ea20ff5dSDavid Gibson 115ea20ff5dSDavid Gibson POB0: opb { 116ea20ff5dSDavid Gibson compatible = "ibm,opb-440gp", "ibm,opb"; 117ea20ff5dSDavid Gibson #address-cells = <1>; 118ea20ff5dSDavid Gibson #size-cells = <1>; 119ea20ff5dSDavid Gibson /* Wish there was a nicer way of specifying a full 32-bit 120ea20ff5dSDavid Gibson range */ 121ea20ff5dSDavid Gibson ranges = <00000000 1 00000000 80000000 122ea20ff5dSDavid Gibson 80000000 1 80000000 80000000>; 123ea20ff5dSDavid Gibson dcr-reg = <090 00b>; 124ea20ff5dSDavid Gibson interrupt-parent = <&UIC1>; 125ea20ff5dSDavid Gibson interrupts = <7 4>; 126ea20ff5dSDavid Gibson clock-frequency = <0>; // Filled in by zImage 127ea20ff5dSDavid Gibson 128ea20ff5dSDavid Gibson EBC0: ebc { 129c72ea777SDavid Gibson compatible = "ibm,ebc-440gp", "ibm,ebc"; 130ea20ff5dSDavid Gibson dcr-reg = <012 2>; 131ea20ff5dSDavid Gibson #address-cells = <2>; 132ea20ff5dSDavid Gibson #size-cells = <1>; 133ea20ff5dSDavid Gibson clock-frequency = <0>; // Filled in by zImage 134b2ba34f3SDavid Gibson // ranges property is supplied by zImage 135b2ba34f3SDavid Gibson // based on firmware's configuration of the 136b2ba34f3SDavid Gibson // EBC bridge 137ea20ff5dSDavid Gibson interrupts = <5 4>; 138ea20ff5dSDavid Gibson interrupt-parent = <&UIC1>; 139ea20ff5dSDavid Gibson 140c72ea777SDavid Gibson small-flash@0,80000 { 1412099172dSDavid Gibson compatible = "jedec-flash"; 142ea20ff5dSDavid Gibson bank-width = <1>; 143ea20ff5dSDavid Gibson reg = <0 80000 80000>; 1442099172dSDavid Gibson #address-cells = <1>; 1452099172dSDavid Gibson #size-cells = <1>; 1462099172dSDavid Gibson partition@0 { 1472099172dSDavid Gibson label = "OpenBIOS"; 1482099172dSDavid Gibson reg = <0 80000>; 1492099172dSDavid Gibson read-only; 1502099172dSDavid Gibson }; 151ea20ff5dSDavid Gibson }; 152ea20ff5dSDavid Gibson 153ea20ff5dSDavid Gibson ds1743@1,0 { 154ea20ff5dSDavid Gibson /* NVRAM & RTC */ 155ea20ff5dSDavid Gibson compatible = "ds1743"; 156ea20ff5dSDavid Gibson reg = <1 0 2000>; 157ea20ff5dSDavid Gibson }; 158ea20ff5dSDavid Gibson 159ea20ff5dSDavid Gibson large-flash@2,0 { 1602099172dSDavid Gibson compatible = "jedec-flash"; 161ea20ff5dSDavid Gibson bank-width = <1>; 162ea20ff5dSDavid Gibson reg = <2 0 400000>; 1632099172dSDavid Gibson #address-cells = <1>; 1642099172dSDavid Gibson #size-cells = <1>; 1652099172dSDavid Gibson partition@0 { 1662099172dSDavid Gibson label = "fs"; 1672099172dSDavid Gibson reg = <0 380000>; 1682099172dSDavid Gibson }; 1692099172dSDavid Gibson partition@380000 { 1702099172dSDavid Gibson label = "firmware"; 1712099172dSDavid Gibson reg = <380000 80000>; 1722099172dSDavid Gibson }; 173ea20ff5dSDavid Gibson }; 174ea20ff5dSDavid Gibson 175ea20ff5dSDavid Gibson ir@3,0 { 176ea20ff5dSDavid Gibson reg = <3 0 10>; 177ea20ff5dSDavid Gibson }; 178ea20ff5dSDavid Gibson 179ea20ff5dSDavid Gibson fpga@7,0 { 180ea20ff5dSDavid Gibson compatible = "Ebony-FPGA"; 181ea20ff5dSDavid Gibson reg = <7 0 10>; 1820d279d47SDavid Gibson virtual-reg = <e8300000>; 183ea20ff5dSDavid Gibson }; 184ea20ff5dSDavid Gibson }; 185ea20ff5dSDavid Gibson 186ea20ff5dSDavid Gibson UART0: serial@40000200 { 187ea20ff5dSDavid Gibson device_type = "serial"; 188ea20ff5dSDavid Gibson compatible = "ns16550"; 189ea20ff5dSDavid Gibson reg = <40000200 8>; 190ea20ff5dSDavid Gibson virtual-reg = <e0000200>; 191ea20ff5dSDavid Gibson clock-frequency = <A8C000>; 192ea20ff5dSDavid Gibson current-speed = <2580>; 193ea20ff5dSDavid Gibson interrupt-parent = <&UIC0>; 194ea20ff5dSDavid Gibson interrupts = <0 4>; 195ea20ff5dSDavid Gibson }; 196ea20ff5dSDavid Gibson 197ea20ff5dSDavid Gibson UART1: serial@40000300 { 198ea20ff5dSDavid Gibson device_type = "serial"; 199ea20ff5dSDavid Gibson compatible = "ns16550"; 200ea20ff5dSDavid Gibson reg = <40000300 8>; 201ea20ff5dSDavid Gibson virtual-reg = <e0000300>; 202ea20ff5dSDavid Gibson clock-frequency = <A8C000>; 203ea20ff5dSDavid Gibson current-speed = <2580>; 204ea20ff5dSDavid Gibson interrupt-parent = <&UIC0>; 205ea20ff5dSDavid Gibson interrupts = <1 4>; 206ea20ff5dSDavid Gibson }; 207ea20ff5dSDavid Gibson 208ea20ff5dSDavid Gibson IIC0: i2c@40000400 { 209ea20ff5dSDavid Gibson /* FIXME */ 210ea20ff5dSDavid Gibson device_type = "i2c"; 211ea20ff5dSDavid Gibson compatible = "ibm,iic-440gp", "ibm,iic"; 212ea20ff5dSDavid Gibson reg = <40000400 14>; 213ea20ff5dSDavid Gibson interrupt-parent = <&UIC0>; 214ea20ff5dSDavid Gibson interrupts = <2 4>; 215ea20ff5dSDavid Gibson }; 216ea20ff5dSDavid Gibson IIC1: i2c@40000500 { 217ea20ff5dSDavid Gibson /* FIXME */ 218ea20ff5dSDavid Gibson device_type = "i2c"; 219ea20ff5dSDavid Gibson compatible = "ibm,iic-440gp", "ibm,iic"; 220ea20ff5dSDavid Gibson reg = <40000500 14>; 221ea20ff5dSDavid Gibson interrupt-parent = <&UIC0>; 222ea20ff5dSDavid Gibson interrupts = <3 4>; 223ea20ff5dSDavid Gibson }; 224ea20ff5dSDavid Gibson 225ea20ff5dSDavid Gibson GPIO0: gpio@40000700 { 226ea20ff5dSDavid Gibson /* FIXME */ 227ea20ff5dSDavid Gibson compatible = "ibm,gpio-440gp"; 228ea20ff5dSDavid Gibson reg = <40000700 20>; 229ea20ff5dSDavid Gibson }; 230ea20ff5dSDavid Gibson 231ea20ff5dSDavid Gibson ZMII0: emac-zmii@40000780 { 232ea20ff5dSDavid Gibson compatible = "ibm,zmii-440gp", "ibm,zmii"; 233ea20ff5dSDavid Gibson reg = <40000780 c>; 234ea20ff5dSDavid Gibson }; 235ea20ff5dSDavid Gibson 236ea20ff5dSDavid Gibson EMAC0: ethernet@40000800 { 237ea20ff5dSDavid Gibson linux,network-index = <0>; 238ea20ff5dSDavid Gibson device_type = "network"; 239ea20ff5dSDavid Gibson compatible = "ibm,emac-440gp", "ibm,emac"; 240ea20ff5dSDavid Gibson interrupt-parent = <&UIC1>; 241ea20ff5dSDavid Gibson interrupts = <1c 4 1d 4>; 242ea20ff5dSDavid Gibson reg = <40000800 70>; 243ea20ff5dSDavid Gibson local-mac-address = [000000000000]; // Filled in by zImage 244ea20ff5dSDavid Gibson mal-device = <&MAL0>; 245ea20ff5dSDavid Gibson mal-tx-channel = <0 1>; 246ea20ff5dSDavid Gibson mal-rx-channel = <0>; 247ea20ff5dSDavid Gibson cell-index = <0>; 248ea20ff5dSDavid Gibson max-frame-size = <5dc>; 249ea20ff5dSDavid Gibson rx-fifo-size = <1000>; 250ea20ff5dSDavid Gibson tx-fifo-size = <800>; 251ea20ff5dSDavid Gibson phy-mode = "rmii"; 252ea20ff5dSDavid Gibson phy-map = <00000001>; 253ea20ff5dSDavid Gibson zmii-device = <&ZMII0>; 254ea20ff5dSDavid Gibson zmii-channel = <0>; 255ea20ff5dSDavid Gibson }; 256ea20ff5dSDavid Gibson EMAC1: ethernet@40000900 { 257ea20ff5dSDavid Gibson linux,network-index = <1>; 258ea20ff5dSDavid Gibson device_type = "network"; 259ea20ff5dSDavid Gibson compatible = "ibm,emac-440gp", "ibm,emac"; 260ea20ff5dSDavid Gibson interrupt-parent = <&UIC1>; 261ea20ff5dSDavid Gibson interrupts = <1e 4 1f 4>; 262ea20ff5dSDavid Gibson reg = <40000900 70>; 263ea20ff5dSDavid Gibson local-mac-address = [000000000000]; // Filled in by zImage 264ea20ff5dSDavid Gibson mal-device = <&MAL0>; 265ea20ff5dSDavid Gibson mal-tx-channel = <2 3>; 266ea20ff5dSDavid Gibson mal-rx-channel = <1>; 267ea20ff5dSDavid Gibson cell-index = <1>; 268ea20ff5dSDavid Gibson max-frame-size = <5dc>; 269ea20ff5dSDavid Gibson rx-fifo-size = <1000>; 270ea20ff5dSDavid Gibson tx-fifo-size = <800>; 271ea20ff5dSDavid Gibson phy-mode = "rmii"; 272ea20ff5dSDavid Gibson phy-map = <00000001>; 273ea20ff5dSDavid Gibson zmii-device = <&ZMII0>; 274ea20ff5dSDavid Gibson zmii-channel = <1>; 275ea20ff5dSDavid Gibson }; 276ea20ff5dSDavid Gibson 277ea20ff5dSDavid Gibson 278ea20ff5dSDavid Gibson GPT0: gpt@40000a00 { 279ea20ff5dSDavid Gibson /* FIXME */ 280ea20ff5dSDavid Gibson reg = <40000a00 d4>; 281ea20ff5dSDavid Gibson interrupt-parent = <&UIC0>; 282ea20ff5dSDavid Gibson interrupts = <12 4 13 4 14 4 15 4 16 4>; 283ea20ff5dSDavid Gibson }; 284ea20ff5dSDavid Gibson 285ea20ff5dSDavid Gibson }; 286ea20ff5dSDavid Gibson 28769c07851SBenjamin Herrenschmidt PCIX0: pci@20ec00000 { 288ea20ff5dSDavid Gibson device_type = "pci"; 28969c07851SBenjamin Herrenschmidt #interrupt-cells = <1>; 29069c07851SBenjamin Herrenschmidt #size-cells = <2>; 29169c07851SBenjamin Herrenschmidt #address-cells = <3>; 29269c07851SBenjamin Herrenschmidt compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix"; 29369c07851SBenjamin Herrenschmidt primary; 29469c07851SBenjamin Herrenschmidt reg = <2 0ec00000 8 /* Config space access */ 29569c07851SBenjamin Herrenschmidt 0 0 0 /* no IACK cycles */ 29669c07851SBenjamin Herrenschmidt 2 0ed00000 4 /* Special cycles */ 29769c07851SBenjamin Herrenschmidt 2 0ec80000 f0 /* Internal registers */ 29869c07851SBenjamin Herrenschmidt 2 0ec80100 fc>; /* Internal messaging registers */ 29969c07851SBenjamin Herrenschmidt 30069c07851SBenjamin Herrenschmidt /* Outbound ranges, one memory and one IO, 30169c07851SBenjamin Herrenschmidt * later cannot be changed 30269c07851SBenjamin Herrenschmidt */ 30369c07851SBenjamin Herrenschmidt ranges = <02000000 0 80000000 00000003 80000000 0 80000000 30469c07851SBenjamin Herrenschmidt 01000000 0 00000000 00000002 08000000 0 00010000>; 30569c07851SBenjamin Herrenschmidt 30669c07851SBenjamin Herrenschmidt /* Inbound 2GB range starting at 0 */ 30769c07851SBenjamin Herrenschmidt dma-ranges = <42000000 0 0 0 0 0 80000000>; 30869c07851SBenjamin Herrenschmidt 30969c07851SBenjamin Herrenschmidt /* Ebony has all 4 IRQ pins tied together per slot */ 31069c07851SBenjamin Herrenschmidt interrupt-map-mask = <f800 0 0 0>; 31169c07851SBenjamin Herrenschmidt interrupt-map = < 31269c07851SBenjamin Herrenschmidt /* IDSEL 1 */ 31369c07851SBenjamin Herrenschmidt 0800 0 0 0 &UIC0 17 8 31469c07851SBenjamin Herrenschmidt 31569c07851SBenjamin Herrenschmidt /* IDSEL 2 */ 31669c07851SBenjamin Herrenschmidt 1000 0 0 0 &UIC0 18 8 31769c07851SBenjamin Herrenschmidt 31869c07851SBenjamin Herrenschmidt /* IDSEL 3 */ 31969c07851SBenjamin Herrenschmidt 1800 0 0 0 &UIC0 19 8 32069c07851SBenjamin Herrenschmidt 32169c07851SBenjamin Herrenschmidt /* IDSEL 4 */ 32269c07851SBenjamin Herrenschmidt 2000 0 0 0 &UIC0 1a 8 32369c07851SBenjamin Herrenschmidt >; 324ea20ff5dSDavid Gibson }; 325ea20ff5dSDavid Gibson }; 326ea20ff5dSDavid Gibson 327ea20ff5dSDavid Gibson chosen { 328ea20ff5dSDavid Gibson linux,stdout-path = "/plb/opb/serial@40000200"; 329ea20ff5dSDavid Gibson }; 330ea20ff5dSDavid Gibson}; 331