1228d5505STony Breeds/* 2228d5505STony Breeds * Device Tree Source for IBM Embedded PPC 476 Platform 3228d5505STony Breeds * 4228d5505STony Breeds * Copyright © 2011 Tony Breeds IBM Corporation 5228d5505STony Breeds * 6228d5505STony Breeds * This file is licensed under the terms of the GNU General Public 7228d5505STony Breeds * License version 2. This program is licensed "as is" without 8228d5505STony Breeds * any warranty of any kind, whether express or implied. 9228d5505STony Breeds */ 10228d5505STony Breeds 11228d5505STony Breeds/dts-v1/; 12228d5505STony Breeds 13228d5505STony Breeds/memreserve/ 0x01f00000 0x00100000; // spin table 14228d5505STony Breeds 15228d5505STony Breeds/ { 16228d5505STony Breeds #address-cells = <2>; 17228d5505STony Breeds #size-cells = <2>; 18228d5505STony Breeds model = "ibm,currituck"; 19228d5505STony Breeds compatible = "ibm,currituck"; 20228d5505STony Breeds dcr-parent = <&{/cpus/cpu@0}>; 21228d5505STony Breeds 22228d5505STony Breeds aliases { 23228d5505STony Breeds serial0 = &UART0; 24228d5505STony Breeds }; 25228d5505STony Breeds 26228d5505STony Breeds cpus { 27228d5505STony Breeds #address-cells = <1>; 28228d5505STony Breeds #size-cells = <0>; 29228d5505STony Breeds 30228d5505STony Breeds cpu@0 { 31228d5505STony Breeds device_type = "cpu"; 32228d5505STony Breeds model = "PowerPC,476"; 33228d5505STony Breeds reg = <0>; 34228d5505STony Breeds clock-frequency = <1600000000>; // 1.6 GHz 35228d5505STony Breeds timebase-frequency = <100000000>; // 100Mhz 36228d5505STony Breeds i-cache-line-size = <32>; 37228d5505STony Breeds d-cache-line-size = <32>; 38228d5505STony Breeds i-cache-size = <32768>; 39228d5505STony Breeds d-cache-size = <32768>; 40228d5505STony Breeds dcr-controller; 41228d5505STony Breeds dcr-access-method = "native"; 42228d5505STony Breeds status = "ok"; 43228d5505STony Breeds }; 44228d5505STony Breeds cpu@1 { 45228d5505STony Breeds device_type = "cpu"; 46228d5505STony Breeds model = "PowerPC,476"; 47228d5505STony Breeds reg = <1>; 48228d5505STony Breeds clock-frequency = <1600000000>; // 1.6 GHz 49228d5505STony Breeds timebase-frequency = <100000000>; // 100Mhz 50228d5505STony Breeds i-cache-line-size = <32>; 51228d5505STony Breeds d-cache-line-size = <32>; 52228d5505STony Breeds i-cache-size = <32768>; 53228d5505STony Breeds d-cache-size = <32768>; 54228d5505STony Breeds dcr-controller; 55228d5505STony Breeds dcr-access-method = "native"; 56228d5505STony Breeds status = "disabled"; 57228d5505STony Breeds enable-method = "spin-table"; 58228d5505STony Breeds cpu-release-addr = <0x0 0x01f00000>; 59228d5505STony Breeds }; 60228d5505STony Breeds }; 61228d5505STony Breeds 62228d5505STony Breeds memory { 63228d5505STony Breeds device_type = "memory"; 64228d5505STony Breeds reg = <0x0 0x0 0x0 0x0>; // filled in by zImage 65228d5505STony Breeds }; 66228d5505STony Breeds 67228d5505STony Breeds MPIC: interrupt-controller { 68228d5505STony Breeds compatible = "chrp,open-pic"; 69228d5505STony Breeds interrupt-controller; 70228d5505STony Breeds dcr-reg = <0xffc00000 0x00040000>; 71228d5505STony Breeds #address-cells = <0>; 72228d5505STony Breeds #size-cells = <0>; 73228d5505STony Breeds #interrupt-cells = <2>; 74228d5505STony Breeds 75228d5505STony Breeds }; 76228d5505STony Breeds 77228d5505STony Breeds plb { 78228d5505STony Breeds compatible = "ibm,plb6"; 79228d5505STony Breeds #address-cells = <2>; 80228d5505STony Breeds #size-cells = <2>; 81228d5505STony Breeds ranges; 82228d5505STony Breeds clock-frequency = <200000000>; // 200Mhz 83228d5505STony Breeds 84228d5505STony Breeds POB0: opb { 85228d5505STony Breeds compatible = "ibm,opb-4xx", "ibm,opb"; 86228d5505STony Breeds #address-cells = <1>; 87228d5505STony Breeds #size-cells = <1>; 88228d5505STony Breeds /* Wish there was a nicer way of specifying a full 89228d5505STony Breeds * 32-bit range 90228d5505STony Breeds */ 91228d5505STony Breeds ranges = <0x00000000 0x00000200 0x00000000 0x80000000 92228d5505STony Breeds 0x80000000 0x00000200 0x80000000 0x80000000>; 93228d5505STony Breeds clock-frequency = <100000000>; 94228d5505STony Breeds 95228d5505STony Breeds UART0: serial@10000000 { 96228d5505STony Breeds device_type = "serial"; 97228d5505STony Breeds compatible = "ns16750", "ns16550"; 98228d5505STony Breeds reg = <0x10000000 0x00000008>; 99228d5505STony Breeds virtual-reg = <0xe1000000>; 100228d5505STony Breeds clock-frequency = <1851851>; // PCIe refclk/MCGC0_CTL[UART] 101228d5505STony Breeds current-speed = <115200>; 102228d5505STony Breeds interrupt-parent = <&MPIC>; 103228d5505STony Breeds interrupts = <34 2>; 104228d5505STony Breeds }; 105228d5505STony Breeds 106ab9a4183SAlistair Popple FPGA0: fpga@50000000 { 107ab9a4183SAlistair Popple compatible = "ibm,currituck-fpga"; 108ab9a4183SAlistair Popple reg = <0x50000000 0x4>; 109ab9a4183SAlistair Popple }; 110ab9a4183SAlistair Popple 111600ecc19SMathieu Malaterre IIC0: i2c@0 { 112228d5505STony Breeds compatible = "ibm,iic-currituck", "ibm,iic"; 113228d5505STony Breeds reg = <0x0 0x00000014>; 114228d5505STony Breeds interrupt-parent = <&MPIC>; 115228d5505STony Breeds interrupts = <79 2>; 116228d5505STony Breeds #address-cells = <1>; 117228d5505STony Breeds #size-cells = <0>; 118228d5505STony Breeds rtc@68 { 1195edc2aaeSStefan Agner compatible = "st,m41t80", "m41st85"; 120228d5505STony Breeds reg = <0x68>; 121228d5505STony Breeds }; 122228d5505STony Breeds }; 123228d5505STony Breeds }; 124228d5505STony Breeds 125228d5505STony Breeds PCIE0: pciex@10100000000 { // 4xGBIF1 126228d5505STony Breeds device_type = "pci"; 127228d5505STony Breeds #interrupt-cells = <1>; 128228d5505STony Breeds #size-cells = <2>; 129228d5505STony Breeds #address-cells = <3>; 130228d5505STony Breeds compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex"; 131228d5505STony Breeds primary; 132228d5505STony Breeds port = <0x0>; /* port number */ 133228d5505STony Breeds reg = <0x00000101 0x00000000 0x0 0x10000000 /* Config space access */ 134228d5505STony Breeds 0x00000100 0x00000000 0x0 0x00001000>; /* UTL Registers space access */ 135228d5505STony Breeds dcr-reg = <0x80 0x20>; 136228d5505STony Breeds 137228d5505STony Breeds// pci_space < pci_addr > < cpu_addr > < size > 138228d5505STony Breeds ranges = <0x02000000 0x00000000 0x80000000 0x00000110 0x80000000 0x0 0x80000000 139228d5505STony Breeds 0x01000000 0x0 0x0 0x00000140 0x0 0x0 0x00010000>; 140228d5505STony Breeds 141228d5505STony Breeds /* Inbound starting at 0 to memsize filled in by zImage */ 142228d5505STony Breeds dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>; 143228d5505STony Breeds 144228d5505STony Breeds /* This drives busses 0 to 0xf */ 145228d5505STony Breeds bus-range = <0x0 0xf>; 146228d5505STony Breeds 147228d5505STony Breeds /* Legacy interrupts (note the weird polarity, the bridge seems 148228d5505STony Breeds * to invert PCIe legacy interrupts). 149228d5505STony Breeds * We are de-swizzling here because the numbers are actually for 150228d5505STony Breeds * port of the root complex virtual P2P bridge. But I want 151228d5505STony Breeds * to avoid putting a node for it in the tree, so the numbers 152228d5505STony Breeds * below are basically de-swizzled numbers. 153228d5505STony Breeds * The real slot is on idsel 0, so the swizzling is 1:1 154228d5505STony Breeds */ 155228d5505STony Breeds interrupt-map-mask = <0x0 0x0 0x0 0x7>; 156228d5505STony Breeds interrupt-map = < 157228d5505STony Breeds 0x0 0x0 0x0 0x1 &MPIC 46 0x2 /* int A */ 158228d5505STony Breeds 0x0 0x0 0x0 0x2 &MPIC 47 0x2 /* int B */ 159228d5505STony Breeds 0x0 0x0 0x0 0x3 &MPIC 48 0x2 /* int C */ 160228d5505STony Breeds 0x0 0x0 0x0 0x4 &MPIC 49 0x2 /* int D */>; 161228d5505STony Breeds }; 162228d5505STony Breeds 163228d5505STony Breeds PCIE1: pciex@30100000000 { // 4xGBIF0 164228d5505STony Breeds device_type = "pci"; 165228d5505STony Breeds #interrupt-cells = <1>; 166228d5505STony Breeds #size-cells = <2>; 167228d5505STony Breeds #address-cells = <3>; 168228d5505STony Breeds compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex"; 169228d5505STony Breeds primary; 170228d5505STony Breeds port = <0x1>; /* port number */ 171228d5505STony Breeds reg = <0x00000301 0x00000000 0x0 0x10000000 /* Config space access */ 172228d5505STony Breeds 0x00000300 0x00000000 0x0 0x00001000>; /* UTL Registers space access */ 173228d5505STony Breeds dcr-reg = <0x60 0x20>; 174228d5505STony Breeds 175228d5505STony Breeds ranges = <0x02000000 0x00000000 0x80000000 0x00000310 0x80000000 0x0 0x80000000 176228d5505STony Breeds 0x01000000 0x0 0x0 0x00000340 0x0 0x0 0x00010000>; 177228d5505STony Breeds 178228d5505STony Breeds /* Inbound starting at 0 to memsize filled in by zImage */ 179228d5505STony Breeds dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>; 180228d5505STony Breeds 181228d5505STony Breeds /* This drives busses 0 to 0xf */ 182228d5505STony Breeds bus-range = <0x0 0xf>; 183228d5505STony Breeds 184228d5505STony Breeds /* Legacy interrupts (note the weird polarity, the bridge seems 185228d5505STony Breeds * to invert PCIe legacy interrupts). 186228d5505STony Breeds * We are de-swizzling here because the numbers are actually for 187228d5505STony Breeds * port of the root complex virtual P2P bridge. But I want 188228d5505STony Breeds * to avoid putting a node for it in the tree, so the numbers 189228d5505STony Breeds * below are basically de-swizzled numbers. 190228d5505STony Breeds * The real slot is on idsel 0, so the swizzling is 1:1 191228d5505STony Breeds */ 192228d5505STony Breeds interrupt-map-mask = <0x0 0x0 0x0 0x7>; 193228d5505STony Breeds interrupt-map = < 194228d5505STony Breeds 0x0 0x0 0x0 0x1 &MPIC 38 0x2 /* int A */ 195228d5505STony Breeds 0x0 0x0 0x0 0x2 &MPIC 39 0x2 /* int B */ 196228d5505STony Breeds 0x0 0x0 0x0 0x3 &MPIC 40 0x2 /* int C */ 197228d5505STony Breeds 0x0 0x0 0x0 0x4 &MPIC 41 0x2 /* int D */>; 198228d5505STony Breeds }; 199228d5505STony Breeds 200228d5505STony Breeds PCIE2: pciex@38100000000 { // 2xGBIF0 201228d5505STony Breeds device_type = "pci"; 202228d5505STony Breeds #interrupt-cells = <1>; 203228d5505STony Breeds #size-cells = <2>; 204228d5505STony Breeds #address-cells = <3>; 205228d5505STony Breeds compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex"; 206228d5505STony Breeds primary; 207228d5505STony Breeds port = <0x2>; /* port number */ 208228d5505STony Breeds reg = <0x00000381 0x00000000 0x0 0x10000000 /* Config space access */ 209228d5505STony Breeds 0x00000380 0x00000000 0x0 0x00001000>; /* UTL Registers space access */ 210228d5505STony Breeds dcr-reg = <0xA0 0x20>; 211228d5505STony Breeds 212228d5505STony Breeds ranges = <0x02000000 0x00000000 0x80000000 0x00000390 0x80000000 0x0 0x80000000 213228d5505STony Breeds 0x01000000 0x0 0x0 0x000003C0 0x0 0x0 0x00010000>; 214228d5505STony Breeds 215228d5505STony Breeds /* Inbound starting at 0 to memsize filled in by zImage */ 216228d5505STony Breeds dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>; 217228d5505STony Breeds 218228d5505STony Breeds /* This drives busses 0 to 0xf */ 219228d5505STony Breeds bus-range = <0x0 0xf>; 220228d5505STony Breeds 221228d5505STony Breeds /* Legacy interrupts (note the weird polarity, the bridge seems 222228d5505STony Breeds * to invert PCIe legacy interrupts). 223228d5505STony Breeds * We are de-swizzling here because the numbers are actually for 224228d5505STony Breeds * port of the root complex virtual P2P bridge. But I want 225228d5505STony Breeds * to avoid putting a node for it in the tree, so the numbers 226228d5505STony Breeds * below are basically de-swizzled numbers. 227228d5505STony Breeds * The real slot is on idsel 0, so the swizzling is 1:1 228228d5505STony Breeds */ 229228d5505STony Breeds interrupt-map-mask = <0x0 0x0 0x0 0x7>; 230228d5505STony Breeds interrupt-map = < 231228d5505STony Breeds 0x0 0x0 0x0 0x1 &MPIC 54 0x2 /* int A */ 232228d5505STony Breeds 0x0 0x0 0x0 0x2 &MPIC 55 0x2 /* int B */ 233228d5505STony Breeds 0x0 0x0 0x0 0x3 &MPIC 56 0x2 /* int C */ 234228d5505STony Breeds 0x0 0x0 0x0 0x4 &MPIC 57 0x2 /* int D */>; 235228d5505STony Breeds }; 236228d5505STony Breeds 237228d5505STony Breeds }; 238228d5505STony Breeds 239228d5505STony Breeds chosen { 24078e5dfeaSRob Herring stdout-path = &UART0; 241228d5505STony Breeds }; 242228d5505STony Breeds}; 243