1/* 2 * Device Tree Source for AMCC Canyonlands (460EX) 3 * 4 * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de> 5 * 6 * This file is licensed under the terms of the GNU General Public 7 * License version 2. This program is licensed "as is" without 8 * any warranty of any kind, whether express or implied. 9 */ 10 11/ { 12 #address-cells = <2>; 13 #size-cells = <1>; 14 model = "amcc,canyonlands"; 15 compatible = "amcc,canyonlands"; 16 dcr-parent = <&/cpus/cpu@0>; 17 18 aliases { 19 ethernet0 = &EMAC0; 20 ethernet1 = &EMAC1; 21 serial0 = &UART0; 22 serial1 = &UART1; 23 }; 24 25 cpus { 26 #address-cells = <1>; 27 #size-cells = <0>; 28 29 cpu@0 { 30 device_type = "cpu"; 31 model = "PowerPC,460EX"; 32 reg = <0>; 33 clock-frequency = <0>; /* Filled in by U-Boot */ 34 timebase-frequency = <0>; /* Filled in by U-Boot */ 35 i-cache-line-size = <20>; 36 d-cache-line-size = <20>; 37 i-cache-size = <8000>; 38 d-cache-size = <8000>; 39 dcr-controller; 40 dcr-access-method = "native"; 41 }; 42 }; 43 44 memory { 45 device_type = "memory"; 46 reg = <0 0 0>; /* Filled in by U-Boot */ 47 }; 48 49 UIC0: interrupt-controller0 { 50 compatible = "ibm,uic-460ex","ibm,uic"; 51 interrupt-controller; 52 cell-index = <0>; 53 dcr-reg = <0c0 009>; 54 #address-cells = <0>; 55 #size-cells = <0>; 56 #interrupt-cells = <2>; 57 }; 58 59 UIC1: interrupt-controller1 { 60 compatible = "ibm,uic-460ex","ibm,uic"; 61 interrupt-controller; 62 cell-index = <1>; 63 dcr-reg = <0d0 009>; 64 #address-cells = <0>; 65 #size-cells = <0>; 66 #interrupt-cells = <2>; 67 interrupts = <1e 4 1f 4>; /* cascade */ 68 interrupt-parent = <&UIC0>; 69 }; 70 71 UIC2: interrupt-controller2 { 72 compatible = "ibm,uic-460ex","ibm,uic"; 73 interrupt-controller; 74 cell-index = <2>; 75 dcr-reg = <0e0 009>; 76 #address-cells = <0>; 77 #size-cells = <0>; 78 #interrupt-cells = <2>; 79 interrupts = <a 4 b 4>; /* cascade */ 80 interrupt-parent = <&UIC0>; 81 }; 82 83 UIC3: interrupt-controller3 { 84 compatible = "ibm,uic-460ex","ibm,uic"; 85 interrupt-controller; 86 cell-index = <3>; 87 dcr-reg = <0f0 009>; 88 #address-cells = <0>; 89 #size-cells = <0>; 90 #interrupt-cells = <2>; 91 interrupts = <10 4 11 4>; /* cascade */ 92 interrupt-parent = <&UIC0>; 93 }; 94 95 SDR0: sdr { 96 compatible = "ibm,sdr-460ex"; 97 dcr-reg = <00e 002>; 98 }; 99 100 CPR0: cpr { 101 compatible = "ibm,cpr-460ex"; 102 dcr-reg = <00c 002>; 103 }; 104 105 plb { 106 compatible = "ibm,plb-460ex", "ibm,plb4"; 107 #address-cells = <2>; 108 #size-cells = <1>; 109 ranges; 110 clock-frequency = <0>; /* Filled in by U-Boot */ 111 112 SDRAM0: sdram { 113 compatible = "ibm,sdram-460ex", "ibm,sdram-405gp"; 114 dcr-reg = <010 2>; 115 }; 116 117 MAL0: mcmal { 118 compatible = "ibm,mcmal-460ex", "ibm,mcmal2"; 119 dcr-reg = <180 62>; 120 num-tx-chans = <2>; 121 num-rx-chans = <10>; 122 #address-cells = <0>; 123 #size-cells = <0>; 124 interrupt-parent = <&UIC2>; 125 interrupts = < /*TXEOB*/ 6 4 126 /*RXEOB*/ 7 4 127 /*SERR*/ 3 4 128 /*TXDE*/ 4 4 129 /*RXDE*/ 5 4>; 130 }; 131 132 POB0: opb { 133 compatible = "ibm,opb-460ex", "ibm,opb"; 134 #address-cells = <1>; 135 #size-cells = <1>; 136 ranges = <b0000000 4 b0000000 50000000>; 137 clock-frequency = <0>; /* Filled in by U-Boot */ 138 139 EBC0: ebc { 140 compatible = "ibm,ebc-460ex", "ibm,ebc"; 141 dcr-reg = <012 2>; 142 #address-cells = <2>; 143 #size-cells = <1>; 144 clock-frequency = <0>; /* Filled in by U-Boot */ 145 interrupts = <6 4>; 146 interrupt-parent = <&UIC1>; 147 }; 148 149 UART0: serial@ef600300 { 150 device_type = "serial"; 151 compatible = "ns16550"; 152 reg = <ef600300 8>; 153 virtual-reg = <ef600300>; 154 clock-frequency = <0>; /* Filled in by U-Boot */ 155 current-speed = <0>; /* Filled in by U-Boot */ 156 interrupt-parent = <&UIC1>; 157 interrupts = <1 4>; 158 }; 159 160 UART1: serial@ef600400 { 161 device_type = "serial"; 162 compatible = "ns16550"; 163 reg = <ef600400 8>; 164 virtual-reg = <ef600400>; 165 clock-frequency = <0>; /* Filled in by U-Boot */ 166 current-speed = <0>; /* Filled in by U-Boot */ 167 interrupt-parent = <&UIC0>; 168 interrupts = <1 4>; 169 }; 170 171 UART2: serial@ef600500 { 172 device_type = "serial"; 173 compatible = "ns16550"; 174 reg = <ef600500 8>; 175 virtual-reg = <ef600500>; 176 clock-frequency = <0>; /* Filled in by U-Boot */ 177 current-speed = <0>; /* Filled in by U-Boot */ 178 interrupt-parent = <&UIC1>; 179 interrupts = <1d 4>; 180 }; 181 182 UART3: serial@ef600600 { 183 device_type = "serial"; 184 compatible = "ns16550"; 185 reg = <ef600600 8>; 186 virtual-reg = <ef600600>; 187 clock-frequency = <0>; /* Filled in by U-Boot */ 188 current-speed = <0>; /* Filled in by U-Boot */ 189 interrupt-parent = <&UIC1>; 190 interrupts = <1e 4>; 191 }; 192 193 IIC0: i2c@ef600700 { 194 compatible = "ibm,iic-460ex", "ibm,iic"; 195 reg = <ef600700 14>; 196 interrupt-parent = <&UIC0>; 197 interrupts = <2 4>; 198 }; 199 200 IIC1: i2c@ef600800 { 201 compatible = "ibm,iic-460ex", "ibm,iic"; 202 reg = <ef600800 14>; 203 interrupt-parent = <&UIC0>; 204 interrupts = <3 4>; 205 }; 206 207 ZMII0: emac-zmii@ef600d00 { 208 compatible = "ibm,zmii-460ex", "ibm,zmii"; 209 reg = <ef600d00 c>; 210 }; 211 212 RGMII0: emac-rgmii@ef601500 { 213 compatible = "ibm,rgmii-460ex", "ibm,rgmii"; 214 reg = <ef601500 8>; 215 has-mdio; 216 }; 217 218 TAH0: emac-tah@ef601350 { 219 compatible = "ibm,tah-460ex", "ibm,tah"; 220 reg = <ef601350 30>; 221 }; 222 223 TAH1: emac-tah@ef601450 { 224 compatible = "ibm,tah-460ex", "ibm,tah"; 225 reg = <ef601450 30>; 226 }; 227 228 EMAC0: ethernet@ef600e00 { 229 device_type = "network"; 230 compatible = "ibm,emac-460ex", "ibm,emac4"; 231 interrupt-parent = <&EMAC0>; 232 interrupts = <0 1>; 233 #interrupt-cells = <1>; 234 #address-cells = <0>; 235 #size-cells = <0>; 236 interrupt-map = </*Status*/ 0 &UIC2 10 4 237 /*Wake*/ 1 &UIC2 14 4>; 238 reg = <ef600e00 70>; 239 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 240 mal-device = <&MAL0>; 241 mal-tx-channel = <0>; 242 mal-rx-channel = <0>; 243 cell-index = <0>; 244 max-frame-size = <2328>; 245 rx-fifo-size = <1000>; 246 tx-fifo-size = <800>; 247 phy-mode = "rgmii"; 248 phy-map = <00000000>; 249 rgmii-device = <&RGMII0>; 250 rgmii-channel = <0>; 251 tah-device = <&TAH0>; 252 tah-channel = <0>; 253 has-inverted-stacr-oc; 254 has-new-stacr-staopc; 255 }; 256 257 EMAC1: ethernet@ef600f00 { 258 device_type = "network"; 259 compatible = "ibm,emac-460ex", "ibm,emac4"; 260 interrupt-parent = <&EMAC1>; 261 interrupts = <0 1>; 262 #interrupt-cells = <1>; 263 #address-cells = <0>; 264 #size-cells = <0>; 265 interrupt-map = </*Status*/ 0 &UIC2 11 4 266 /*Wake*/ 1 &UIC2 15 4>; 267 reg = <ef600f00 70>; 268 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 269 mal-device = <&MAL0>; 270 mal-tx-channel = <1>; 271 mal-rx-channel = <8>; 272 cell-index = <1>; 273 max-frame-size = <2328>; 274 rx-fifo-size = <1000>; 275 tx-fifo-size = <800>; 276 phy-mode = "rgmii"; 277 phy-map = <00000000>; 278 rgmii-device = <&RGMII0>; 279 rgmii-channel = <1>; 280 tah-device = <&TAH1>; 281 tah-channel = <1>; 282 has-inverted-stacr-oc; 283 has-new-stacr-staopc; 284 mdio-device = <&EMAC0>; 285 }; 286 }; 287 288 PCIX0: pci@c0ec00000 { 289 device_type = "pci"; 290 #interrupt-cells = <1>; 291 #size-cells = <2>; 292 #address-cells = <3>; 293 compatible = "ibm,plb-pcix-460ex", "ibm,plb-pcix"; 294 primary; 295 large-inbound-windows; 296 enable-msi-hole; 297 reg = <c 0ec00000 8 /* Config space access */ 298 0 0 0 /* no IACK cycles */ 299 c 0ed00000 4 /* Special cycles */ 300 c 0ec80000 100 /* Internal registers */ 301 c 0ec80100 fc>; /* Internal messaging registers */ 302 303 /* Outbound ranges, one memory and one IO, 304 * later cannot be changed 305 */ 306 ranges = <02000000 0 80000000 0000000d 80000000 0 80000000 307 01000000 0 00000000 0000000c 08000000 0 00010000>; 308 309 /* Inbound 2GB range starting at 0 */ 310 dma-ranges = <42000000 0 0 0 0 0 80000000>; 311 312 /* This drives busses 0 to 0x3f */ 313 bus-range = <0 3f>; 314 315 /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ 316 interrupt-map-mask = <0000 0 0 0>; 317 interrupt-map = < 0000 0 0 0 &UIC1 0 8 >; 318 }; 319 320 PCIE0: pciex@d00000000 { 321 device_type = "pci"; 322 #interrupt-cells = <1>; 323 #size-cells = <2>; 324 #address-cells = <3>; 325 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; 326 primary; 327 port = <0>; /* port number */ 328 reg = <d 00000000 20000000 /* Config space access */ 329 c 08010000 00001000>; /* Registers */ 330 dcr-reg = <100 020>; 331 sdr-base = <300>; 332 333 /* Outbound ranges, one memory and one IO, 334 * later cannot be changed 335 */ 336 ranges = <02000000 0 80000000 0000000e 00000000 0 80000000 337 01000000 0 00000000 0000000f 80000000 0 00010000>; 338 339 /* Inbound 2GB range starting at 0 */ 340 dma-ranges = <42000000 0 0 0 0 0 80000000>; 341 342 /* This drives busses 40 to 0x7f */ 343 bus-range = <40 7f>; 344 345 /* Legacy interrupts (note the weird polarity, the bridge seems 346 * to invert PCIe legacy interrupts). 347 * We are de-swizzling here because the numbers are actually for 348 * port of the root complex virtual P2P bridge. But I want 349 * to avoid putting a node for it in the tree, so the numbers 350 * below are basically de-swizzled numbers. 351 * The real slot is on idsel 0, so the swizzling is 1:1 352 */ 353 interrupt-map-mask = <0000 0 0 7>; 354 interrupt-map = < 355 0000 0 0 1 &UIC3 c 4 /* swizzled int A */ 356 0000 0 0 2 &UIC3 d 4 /* swizzled int B */ 357 0000 0 0 3 &UIC3 e 4 /* swizzled int C */ 358 0000 0 0 4 &UIC3 f 4 /* swizzled int D */>; 359 }; 360 361 PCIE1: pciex@d20000000 { 362 device_type = "pci"; 363 #interrupt-cells = <1>; 364 #size-cells = <2>; 365 #address-cells = <3>; 366 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; 367 primary; 368 port = <1>; /* port number */ 369 reg = <d 20000000 20000000 /* Config space access */ 370 c 08011000 00001000>; /* Registers */ 371 dcr-reg = <120 020>; 372 sdr-base = <340>; 373 374 /* Outbound ranges, one memory and one IO, 375 * later cannot be changed 376 */ 377 ranges = <02000000 0 80000000 0000000e 80000000 0 80000000 378 01000000 0 00000000 0000000f 80010000 0 00010000>; 379 380 /* Inbound 2GB range starting at 0 */ 381 dma-ranges = <42000000 0 0 0 0 0 80000000>; 382 383 /* This drives busses 80 to 0xbf */ 384 bus-range = <80 bf>; 385 386 /* Legacy interrupts (note the weird polarity, the bridge seems 387 * to invert PCIe legacy interrupts). 388 * We are de-swizzling here because the numbers are actually for 389 * port of the root complex virtual P2P bridge. But I want 390 * to avoid putting a node for it in the tree, so the numbers 391 * below are basically de-swizzled numbers. 392 * The real slot is on idsel 0, so the swizzling is 1:1 393 */ 394 interrupt-map-mask = <0000 0 0 7>; 395 interrupt-map = < 396 0000 0 0 1 &UIC3 10 4 /* swizzled int A */ 397 0000 0 0 2 &UIC3 11 4 /* swizzled int B */ 398 0000 0 0 3 &UIC3 12 4 /* swizzled int C */ 399 0000 0 0 4 &UIC3 13 4 /* swizzled int D */>; 400 }; 401 }; 402}; 403