11a59d1b8SThomas Gleixner// SPDX-License-Identifier: GPL-2.0-or-later 26edc323dSTirumala Marri/* 36edc323dSTirumala Marri * Device Tree for Bluestone (APM821xx) board. 46edc323dSTirumala Marri * 56edc323dSTirumala Marri * Copyright (c) 2010, Applied Micro Circuits Corporation 66edc323dSTirumala Marri * Author: Tirumala R Marri <tmarri@apm.com> 76edc323dSTirumala Marri */ 86edc323dSTirumala Marri 96edc323dSTirumala Marri/dts-v1/; 106edc323dSTirumala Marri 116edc323dSTirumala Marri/ { 126edc323dSTirumala Marri #address-cells = <2>; 136edc323dSTirumala Marri #size-cells = <1>; 146edc323dSTirumala Marri model = "apm,bluestone"; 156edc323dSTirumala Marri compatible = "apm,bluestone"; 166edc323dSTirumala Marri dcr-parent = <&{/cpus/cpu@0}>; 176edc323dSTirumala Marri 186edc323dSTirumala Marri aliases { 196edc323dSTirumala Marri ethernet0 = &EMAC0; 206edc323dSTirumala Marri serial0 = &UART0; 21b5594a77SVinh Nguyen Huu Tuong serial1 = &UART1; 226edc323dSTirumala Marri }; 236edc323dSTirumala Marri 246edc323dSTirumala Marri cpus { 256edc323dSTirumala Marri #address-cells = <1>; 266edc323dSTirumala Marri #size-cells = <0>; 276edc323dSTirumala Marri 286edc323dSTirumala Marri cpu@0 { 296edc323dSTirumala Marri device_type = "cpu"; 306edc323dSTirumala Marri model = "PowerPC,apm821xx"; 316edc323dSTirumala Marri reg = <0x00000000>; 326edc323dSTirumala Marri clock-frequency = <0>; /* Filled in by U-Boot */ 336edc323dSTirumala Marri timebase-frequency = <0>; /* Filled in by U-Boot */ 346edc323dSTirumala Marri i-cache-line-size = <32>; 356edc323dSTirumala Marri d-cache-line-size = <32>; 366edc323dSTirumala Marri i-cache-size = <32768>; 376edc323dSTirumala Marri d-cache-size = <32768>; 386edc323dSTirumala Marri dcr-controller; 396edc323dSTirumala Marri dcr-access-method = "native"; 40b5594a77SVinh Nguyen Huu Tuong next-level-cache = <&L2C0>; 416edc323dSTirumala Marri }; 426edc323dSTirumala Marri }; 436edc323dSTirumala Marri 446edc323dSTirumala Marri memory { 456edc323dSTirumala Marri device_type = "memory"; 466edc323dSTirumala Marri reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ 476edc323dSTirumala Marri }; 486edc323dSTirumala Marri 496edc323dSTirumala Marri UIC0: interrupt-controller0 { 506edc323dSTirumala Marri compatible = "ibm,uic"; 516edc323dSTirumala Marri interrupt-controller; 526edc323dSTirumala Marri cell-index = <0>; 536edc323dSTirumala Marri dcr-reg = <0x0c0 0x009>; 546edc323dSTirumala Marri #address-cells = <0>; 556edc323dSTirumala Marri #size-cells = <0>; 566edc323dSTirumala Marri #interrupt-cells = <2>; 576edc323dSTirumala Marri }; 586edc323dSTirumala Marri 596edc323dSTirumala Marri UIC1: interrupt-controller1 { 606edc323dSTirumala Marri compatible = "ibm,uic"; 616edc323dSTirumala Marri interrupt-controller; 626edc323dSTirumala Marri cell-index = <1>; 636edc323dSTirumala Marri dcr-reg = <0x0d0 0x009>; 646edc323dSTirumala Marri #address-cells = <0>; 656edc323dSTirumala Marri #size-cells = <0>; 666edc323dSTirumala Marri #interrupt-cells = <2>; 676edc323dSTirumala Marri interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ 686edc323dSTirumala Marri interrupt-parent = <&UIC0>; 696edc323dSTirumala Marri }; 706edc323dSTirumala Marri 716edc323dSTirumala Marri UIC2: interrupt-controller2 { 726edc323dSTirumala Marri compatible = "ibm,uic"; 736edc323dSTirumala Marri interrupt-controller; 746edc323dSTirumala Marri cell-index = <2>; 756edc323dSTirumala Marri dcr-reg = <0x0e0 0x009>; 766edc323dSTirumala Marri #address-cells = <0>; 776edc323dSTirumala Marri #size-cells = <0>; 786edc323dSTirumala Marri #interrupt-cells = <2>; 796edc323dSTirumala Marri interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ 806edc323dSTirumala Marri interrupt-parent = <&UIC0>; 816edc323dSTirumala Marri }; 826edc323dSTirumala Marri 836edc323dSTirumala Marri UIC3: interrupt-controller3 { 846edc323dSTirumala Marri compatible = "ibm,uic"; 856edc323dSTirumala Marri interrupt-controller; 866edc323dSTirumala Marri cell-index = <3>; 876edc323dSTirumala Marri dcr-reg = <0x0f0 0x009>; 886edc323dSTirumala Marri #address-cells = <0>; 896edc323dSTirumala Marri #size-cells = <0>; 906edc323dSTirumala Marri #interrupt-cells = <2>; 916edc323dSTirumala Marri interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ 926edc323dSTirumala Marri interrupt-parent = <&UIC0>; 936edc323dSTirumala Marri }; 946edc323dSTirumala Marri 95c19d8248SVinh Nguyen Huu Tuong OCM: ocm@400040000 { 96c19d8248SVinh Nguyen Huu Tuong compatible = "ibm,ocm"; 975c285dd7SRobert P. J. Day status = "okay"; 98c19d8248SVinh Nguyen Huu Tuong cell-index = <1>; 99c19d8248SVinh Nguyen Huu Tuong /* configured in U-Boot */ 100c19d8248SVinh Nguyen Huu Tuong reg = <4 0x00040000 0x8000>; /* 32K */ 101c19d8248SVinh Nguyen Huu Tuong }; 102c19d8248SVinh Nguyen Huu Tuong 1036edc323dSTirumala Marri SDR0: sdr { 1046edc323dSTirumala Marri compatible = "ibm,sdr-apm821xx"; 1056edc323dSTirumala Marri dcr-reg = <0x00e 0x002>; 1066edc323dSTirumala Marri }; 1076edc323dSTirumala Marri 1086edc323dSTirumala Marri CPR0: cpr { 1096edc323dSTirumala Marri compatible = "ibm,cpr-apm821xx"; 1106edc323dSTirumala Marri dcr-reg = <0x00c 0x002>; 1116edc323dSTirumala Marri }; 1126edc323dSTirumala Marri 113b5594a77SVinh Nguyen Huu Tuong L2C0: l2c { 114b5594a77SVinh Nguyen Huu Tuong compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache"; 115b5594a77SVinh Nguyen Huu Tuong dcr-reg = <0x020 0x008 116b5594a77SVinh Nguyen Huu Tuong 0x030 0x008>; 117b5594a77SVinh Nguyen Huu Tuong cache-line-size = <32>; 118b5594a77SVinh Nguyen Huu Tuong cache-size = <262144>; 119b5594a77SVinh Nguyen Huu Tuong interrupt-parent = <&UIC1>; 120b5594a77SVinh Nguyen Huu Tuong interrupts = <11 1>; 121b5594a77SVinh Nguyen Huu Tuong }; 122b5594a77SVinh Nguyen Huu Tuong 1236edc323dSTirumala Marri plb { 1246edc323dSTirumala Marri compatible = "ibm,plb4"; 1256edc323dSTirumala Marri #address-cells = <2>; 1266edc323dSTirumala Marri #size-cells = <1>; 1276edc323dSTirumala Marri ranges; 1286edc323dSTirumala Marri clock-frequency = <0>; /* Filled in by U-Boot */ 1296edc323dSTirumala Marri 1306edc323dSTirumala Marri SDRAM0: sdram { 1316edc323dSTirumala Marri compatible = "ibm,sdram-apm821xx"; 1326edc323dSTirumala Marri dcr-reg = <0x010 0x002>; 1336edc323dSTirumala Marri }; 1346edc323dSTirumala Marri 1356edc323dSTirumala Marri MAL0: mcmal { 1366edc323dSTirumala Marri compatible = "ibm,mcmal2"; 1376edc323dSTirumala Marri descriptor-memory = "ocm"; 1386edc323dSTirumala Marri dcr-reg = <0x180 0x062>; 1396edc323dSTirumala Marri num-tx-chans = <1>; 1406edc323dSTirumala Marri num-rx-chans = <1>; 1416edc323dSTirumala Marri #address-cells = <0>; 1426edc323dSTirumala Marri #size-cells = <0>; 1436edc323dSTirumala Marri interrupt-parent = <&UIC2>; 1446edc323dSTirumala Marri interrupts = < /*TXEOB*/ 0x6 0x4 1456edc323dSTirumala Marri /*RXEOB*/ 0x7 0x4 1466edc323dSTirumala Marri /*SERR*/ 0x3 0x4 1476edc323dSTirumala Marri /*TXDE*/ 0x4 0x4 1486bd121e2SGrant Likely /*RXDE*/ 0x5 0x4>; 1496edc323dSTirumala Marri }; 1506edc323dSTirumala Marri 1516edc323dSTirumala Marri POB0: opb { 1526edc323dSTirumala Marri compatible = "ibm,opb"; 1536edc323dSTirumala Marri #address-cells = <1>; 1546edc323dSTirumala Marri #size-cells = <1>; 1556edc323dSTirumala Marri ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; 1566edc323dSTirumala Marri clock-frequency = <0>; /* Filled in by U-Boot */ 1576edc323dSTirumala Marri 1586edc323dSTirumala Marri EBC0: ebc { 1596edc323dSTirumala Marri compatible = "ibm,ebc"; 1606edc323dSTirumala Marri dcr-reg = <0x012 0x002>; 1616edc323dSTirumala Marri #address-cells = <2>; 1626edc323dSTirumala Marri #size-cells = <1>; 1636edc323dSTirumala Marri clock-frequency = <0>; /* Filled in by U-Boot */ 1646edc323dSTirumala Marri /* ranges property is supplied by U-Boot */ 1656edc323dSTirumala Marri ranges = < 0x00000003 0x00000000 0xe0000000 0x8000000>; 1666edc323dSTirumala Marri interrupts = <0x6 0x4>; 1676edc323dSTirumala Marri interrupt-parent = <&UIC1>; 1686edc323dSTirumala Marri 1696edc323dSTirumala Marri nor_flash@0,0 { 1706edc323dSTirumala Marri compatible = "amd,s29gl512n", "cfi-flash"; 1716edc323dSTirumala Marri bank-width = <2>; 1726edc323dSTirumala Marri reg = <0x00000000 0x00000000 0x00400000>; 1736edc323dSTirumala Marri #address-cells = <1>; 1746edc323dSTirumala Marri #size-cells = <1>; 1756edc323dSTirumala Marri partition@0 { 1766edc323dSTirumala Marri label = "kernel"; 1776edc323dSTirumala Marri reg = <0x00000000 0x00180000>; 1786edc323dSTirumala Marri }; 1796edc323dSTirumala Marri partition@180000 { 1806edc323dSTirumala Marri label = "env"; 1816edc323dSTirumala Marri reg = <0x00180000 0x00020000>; 1826edc323dSTirumala Marri }; 1836edc323dSTirumala Marri partition@1a0000 { 1846edc323dSTirumala Marri label = "u-boot"; 1856edc323dSTirumala Marri reg = <0x001a0000 0x00060000>; 1866edc323dSTirumala Marri }; 1876edc323dSTirumala Marri }; 188b5594a77SVinh Nguyen Huu Tuong 189b5594a77SVinh Nguyen Huu Tuong ndfc@1,0 { 190b5594a77SVinh Nguyen Huu Tuong compatible = "ibm,ndfc"; 191b5594a77SVinh Nguyen Huu Tuong reg = <0x00000003 0x00000000 0x00002000>; 192b5594a77SVinh Nguyen Huu Tuong ccr = <0x00001000>; 193b5594a77SVinh Nguyen Huu Tuong bank-settings = <0x80002222>; 194b5594a77SVinh Nguyen Huu Tuong #address-cells = <1>; 195b5594a77SVinh Nguyen Huu Tuong #size-cells = <1>; 196b5594a77SVinh Nguyen Huu Tuong /* 2Gb Nand Flash */ 197b5594a77SVinh Nguyen Huu Tuong nand { 198b5594a77SVinh Nguyen Huu Tuong #address-cells = <1>; 199b5594a77SVinh Nguyen Huu Tuong #size-cells = <1>; 200b5594a77SVinh Nguyen Huu Tuong 201b5594a77SVinh Nguyen Huu Tuong partition@0 { 202b5594a77SVinh Nguyen Huu Tuong label = "firmware"; 203b5594a77SVinh Nguyen Huu Tuong reg = <0x00000000 0x00C00000>; 204b5594a77SVinh Nguyen Huu Tuong }; 205b5594a77SVinh Nguyen Huu Tuong partition@c00000 { 206b5594a77SVinh Nguyen Huu Tuong label = "environment"; 207b5594a77SVinh Nguyen Huu Tuong reg = <0x00C00000 0x00B00000>; 208b5594a77SVinh Nguyen Huu Tuong }; 209b5594a77SVinh Nguyen Huu Tuong partition@1700000 { 210b5594a77SVinh Nguyen Huu Tuong label = "kernel"; 211b5594a77SVinh Nguyen Huu Tuong reg = <0x01700000 0x00E00000>; 212b5594a77SVinh Nguyen Huu Tuong }; 213b5594a77SVinh Nguyen Huu Tuong partition@2500000 { 214b5594a77SVinh Nguyen Huu Tuong label = "root"; 215b5594a77SVinh Nguyen Huu Tuong reg = <0x02500000 0x08200000>; 216b5594a77SVinh Nguyen Huu Tuong }; 217b5594a77SVinh Nguyen Huu Tuong partition@a700000 { 218b5594a77SVinh Nguyen Huu Tuong label = "device-tree"; 219b5594a77SVinh Nguyen Huu Tuong reg = <0x0A700000 0x00B00000>; 220b5594a77SVinh Nguyen Huu Tuong }; 221b5594a77SVinh Nguyen Huu Tuong partition@b200000 { 222b5594a77SVinh Nguyen Huu Tuong label = "config"; 223b5594a77SVinh Nguyen Huu Tuong reg = <0x0B200000 0x00D00000>; 224b5594a77SVinh Nguyen Huu Tuong }; 225b5594a77SVinh Nguyen Huu Tuong partition@bf00000 { 226b5594a77SVinh Nguyen Huu Tuong label = "diag"; 227b5594a77SVinh Nguyen Huu Tuong reg = <0x0BF00000 0x00C00000>; 228b5594a77SVinh Nguyen Huu Tuong }; 229b5594a77SVinh Nguyen Huu Tuong partition@cb00000 { 230b5594a77SVinh Nguyen Huu Tuong label = "vendor"; 231b5594a77SVinh Nguyen Huu Tuong reg = <0x0CB00000 0x3500000>; 232b5594a77SVinh Nguyen Huu Tuong }; 233b5594a77SVinh Nguyen Huu Tuong }; 234b5594a77SVinh Nguyen Huu Tuong }; 2356bd121e2SGrant Likely }; 2366edc323dSTirumala Marri 2376edc323dSTirumala Marri UART0: serial@ef600300 { 2386edc323dSTirumala Marri device_type = "serial"; 2396edc323dSTirumala Marri compatible = "ns16550"; 2406edc323dSTirumala Marri reg = <0xef600300 0x00000008>; 2416edc323dSTirumala Marri virtual-reg = <0xef600300>; 2426edc323dSTirumala Marri clock-frequency = <0>; /* Filled in by U-Boot */ 2436edc323dSTirumala Marri current-speed = <0>; /* Filled in by U-Boot */ 2446edc323dSTirumala Marri interrupt-parent = <&UIC1>; 2456edc323dSTirumala Marri interrupts = <0x1 0x4>; 2466edc323dSTirumala Marri }; 2476edc323dSTirumala Marri 248b5594a77SVinh Nguyen Huu Tuong UART1: serial@ef600400 { 249b5594a77SVinh Nguyen Huu Tuong device_type = "serial"; 250b5594a77SVinh Nguyen Huu Tuong compatible = "ns16550"; 251b5594a77SVinh Nguyen Huu Tuong reg = <0xef600400 0x00000008>; 252b5594a77SVinh Nguyen Huu Tuong virtual-reg = <0xef600400>; 253b5594a77SVinh Nguyen Huu Tuong clock-frequency = <0>; /* Filled in by U-Boot */ 254b5594a77SVinh Nguyen Huu Tuong current-speed = <0>; /* Filled in by U-Boot */ 255b5594a77SVinh Nguyen Huu Tuong interrupt-parent = <&UIC0>; 256b5594a77SVinh Nguyen Huu Tuong interrupts = <0x1 0x4>; 257b5594a77SVinh Nguyen Huu Tuong }; 258b5594a77SVinh Nguyen Huu Tuong 2596edc323dSTirumala Marri IIC0: i2c@ef600700 { 2606edc323dSTirumala Marri compatible = "ibm,iic"; 2616edc323dSTirumala Marri reg = <0xef600700 0x00000014>; 2626edc323dSTirumala Marri interrupt-parent = <&UIC0>; 2636edc323dSTirumala Marri interrupts = <0x2 0x4>; 264b5594a77SVinh Nguyen Huu Tuong #address-cells = <1>; 265b5594a77SVinh Nguyen Huu Tuong #size-cells = <0>; 266b5594a77SVinh Nguyen Huu Tuong rtc@68 { 2675edc2aaeSStefan Agner compatible = "st,m41t80"; 268b5594a77SVinh Nguyen Huu Tuong reg = <0x68>; 269b5594a77SVinh Nguyen Huu Tuong interrupt-parent = <&UIC0>; 270b5594a77SVinh Nguyen Huu Tuong interrupts = <0x9 0x8>; 271b5594a77SVinh Nguyen Huu Tuong }; 272b5594a77SVinh Nguyen Huu Tuong sttm@4C { 273b5594a77SVinh Nguyen Huu Tuong compatible = "adm,adm1032"; 274b5594a77SVinh Nguyen Huu Tuong reg = <0x4C>; 275b5594a77SVinh Nguyen Huu Tuong interrupt-parent = <&UIC1>; 276b5594a77SVinh Nguyen Huu Tuong interrupts = <0x1E 0x8>; /* CPU_THERNAL_L */ 277b5594a77SVinh Nguyen Huu Tuong }; 2786edc323dSTirumala Marri }; 2796edc323dSTirumala Marri 2806edc323dSTirumala Marri IIC1: i2c@ef600800 { 2816edc323dSTirumala Marri compatible = "ibm,iic"; 2826edc323dSTirumala Marri reg = <0xef600800 0x00000014>; 2836edc323dSTirumala Marri interrupt-parent = <&UIC0>; 2846edc323dSTirumala Marri interrupts = <0x3 0x4>; 2856edc323dSTirumala Marri }; 2866edc323dSTirumala Marri 2876edc323dSTirumala Marri RGMII0: emac-rgmii@ef601500 { 2886edc323dSTirumala Marri compatible = "ibm,rgmii"; 2896edc323dSTirumala Marri reg = <0xef601500 0x00000008>; 2906edc323dSTirumala Marri has-mdio; 2916edc323dSTirumala Marri }; 2926edc323dSTirumala Marri 2936edc323dSTirumala Marri TAH0: emac-tah@ef601350 { 2946edc323dSTirumala Marri compatible = "ibm,tah"; 2956edc323dSTirumala Marri reg = <0xef601350 0x00000030>; 2966edc323dSTirumala Marri }; 2976edc323dSTirumala Marri 2986edc323dSTirumala Marri EMAC0: ethernet@ef600c00 { 2996edc323dSTirumala Marri device_type = "network"; 3008dfc2b45SDuc Dang compatible = "ibm,emac-apm821xx", "ibm,emac4sync"; 3016edc323dSTirumala Marri interrupt-parent = <&EMAC0>; 3026edc323dSTirumala Marri interrupts = <0x0 0x1>; 3036edc323dSTirumala Marri #interrupt-cells = <1>; 3046edc323dSTirumala Marri #address-cells = <0>; 3056edc323dSTirumala Marri #size-cells = <0>; 3066edc323dSTirumala Marri interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4 3076edc323dSTirumala Marri /*Wake*/ 0x1 &UIC2 0x14 0x4>; 3086edc323dSTirumala Marri reg = <0xef600c00 0x000000c4>; 3096edc323dSTirumala Marri local-mac-address = [000000000000]; /* Filled in by U-Boot */ 3106edc323dSTirumala Marri mal-device = <&MAL0>; 3116edc323dSTirumala Marri mal-tx-channel = <0>; 3126edc323dSTirumala Marri mal-rx-channel = <0>; 3136edc323dSTirumala Marri cell-index = <0>; 3146edc323dSTirumala Marri max-frame-size = <9000>; 3156edc323dSTirumala Marri rx-fifo-size = <16384>; 3166edc323dSTirumala Marri tx-fifo-size = <2048>; 3176edc323dSTirumala Marri phy-mode = "rgmii"; 3186edc323dSTirumala Marri phy-map = <0x00000000>; 3196edc323dSTirumala Marri rgmii-device = <&RGMII0>; 3206edc323dSTirumala Marri rgmii-channel = <0>; 3216edc323dSTirumala Marri tah-device = <&TAH0>; 3226edc323dSTirumala Marri tah-channel = <0>; 3236edc323dSTirumala Marri has-inverted-stacr-oc; 3246edc323dSTirumala Marri has-new-stacr-staopc; 3256edc323dSTirumala Marri }; 3266edc323dSTirumala Marri }; 3276edc323dSTirumala Marri 328b5594a77SVinh Nguyen Huu Tuong PCIE0: pciex@d00000000 { 329b5594a77SVinh Nguyen Huu Tuong device_type = "pci"; 330b5594a77SVinh Nguyen Huu Tuong #interrupt-cells = <1>; 331b5594a77SVinh Nguyen Huu Tuong #size-cells = <2>; 332b5594a77SVinh Nguyen Huu Tuong #address-cells = <3>; 333b5594a77SVinh Nguyen Huu Tuong compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex"; 334b5594a77SVinh Nguyen Huu Tuong primary; 335b5594a77SVinh Nguyen Huu Tuong port = <0x0>; /* port number */ 336b5594a77SVinh Nguyen Huu Tuong reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ 337b5594a77SVinh Nguyen Huu Tuong 0x0000000c 0x08010000 0x00001000>; /* Registers */ 338b5594a77SVinh Nguyen Huu Tuong dcr-reg = <0x100 0x020>; 339b5594a77SVinh Nguyen Huu Tuong sdr-base = <0x300>; 340b5594a77SVinh Nguyen Huu Tuong 341b5594a77SVinh Nguyen Huu Tuong /* Outbound ranges, one memory and one IO, 342b5594a77SVinh Nguyen Huu Tuong * later cannot be changed 343b5594a77SVinh Nguyen Huu Tuong */ 344b5594a77SVinh Nguyen Huu Tuong ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 345b5594a77SVinh Nguyen Huu Tuong 0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000 346b5594a77SVinh Nguyen Huu Tuong 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; 347b5594a77SVinh Nguyen Huu Tuong 348b5594a77SVinh Nguyen Huu Tuong /* Inbound 2GB range starting at 0 */ 349b5594a77SVinh Nguyen Huu Tuong dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; 350b5594a77SVinh Nguyen Huu Tuong 351b5594a77SVinh Nguyen Huu Tuong /* This drives busses 40 to 0x7f */ 352b5594a77SVinh Nguyen Huu Tuong bus-range = <0x40 0x7f>; 353b5594a77SVinh Nguyen Huu Tuong 354b5594a77SVinh Nguyen Huu Tuong /* Legacy interrupts (note the weird polarity, the bridge seems 355b5594a77SVinh Nguyen Huu Tuong * to invert PCIe legacy interrupts). 356b5594a77SVinh Nguyen Huu Tuong * We are de-swizzling here because the numbers are actually for 357b5594a77SVinh Nguyen Huu Tuong * port of the root complex virtual P2P bridge. But I want 358b5594a77SVinh Nguyen Huu Tuong * to avoid putting a node for it in the tree, so the numbers 359b5594a77SVinh Nguyen Huu Tuong * below are basically de-swizzled numbers. 360b5594a77SVinh Nguyen Huu Tuong * The real slot is on idsel 0, so the swizzling is 1:1 361b5594a77SVinh Nguyen Huu Tuong */ 362b5594a77SVinh Nguyen Huu Tuong interrupt-map-mask = <0x0 0x0 0x0 0x7>; 363b5594a77SVinh Nguyen Huu Tuong interrupt-map = < 364b5594a77SVinh Nguyen Huu Tuong 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */ 365b5594a77SVinh Nguyen Huu Tuong 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */ 366b5594a77SVinh Nguyen Huu Tuong 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */ 367b5594a77SVinh Nguyen Huu Tuong 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>; 368b5594a77SVinh Nguyen Huu Tuong }; 3699c6b2353SMai La 3709c6b2353SMai La MSI: ppc4xx-msi@C10000000 { 3719c6b2353SMai La compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; 3729c6b2353SMai La reg = < 0xC 0x10000000 0x100 3739c6b2353SMai La 0xC 0x10000000 0x100>; 3749c6b2353SMai La sdr-base = <0x36C>; 3759c6b2353SMai La msi-data = <0x00004440>; 3769c6b2353SMai La msi-mask = <0x0000ffe0>; 3779c6b2353SMai La interrupts =<0 1 2 3 4 5 6 7>; 3789c6b2353SMai La interrupt-parent = <&MSI>; 3799c6b2353SMai La #interrupt-cells = <1>; 3809c6b2353SMai La #address-cells = <0>; 3819c6b2353SMai La #size-cells = <0>; 3829c6b2353SMai La msi-available-ranges = <0x0 0x100>; 3839c6b2353SMai La interrupt-map = < 3849c6b2353SMai La 0 &UIC3 0x18 1 3859c6b2353SMai La 1 &UIC3 0x19 1 3869c6b2353SMai La 2 &UIC3 0x1A 1 3879c6b2353SMai La 3 &UIC3 0x1B 1 3889c6b2353SMai La 4 &UIC3 0x1C 1 3899c6b2353SMai La 5 &UIC3 0x1D 1 3909c6b2353SMai La 6 &UIC3 0x1E 1 3919c6b2353SMai La 7 &UIC3 0x1F 1 3929c6b2353SMai La >; 3939c6b2353SMai La }; 3946edc323dSTirumala Marri }; 3956edc323dSTirumala Marri}; 396