1*440c7317SRobert Marko /* SPDX-License-Identifier: GPL-2.0-only */ 2*440c7317SRobert Marko /* 3*440c7317SRobert Marko * Delta TN48M CPLD GPIO driver 4*440c7317SRobert Marko * 5*440c7317SRobert Marko * Copyright (C) 2021 Sartura Ltd. 6*440c7317SRobert Marko * 7*440c7317SRobert Marko * Author: Robert Marko <robert.marko@sartura.hr> 8*440c7317SRobert Marko */ 9*440c7317SRobert Marko 10*440c7317SRobert Marko #ifndef _DT_BINDINGS_RESET_TN48M_H 11*440c7317SRobert Marko #define _DT_BINDINGS_RESET_TN48M_H 12*440c7317SRobert Marko 13*440c7317SRobert Marko #define CPU_88F7040_RESET 0 14*440c7317SRobert Marko #define CPU_88F6820_RESET 1 15*440c7317SRobert Marko #define MAC_98DX3265_RESET 2 16*440c7317SRobert Marko #define PHY_88E1680_RESET 3 17*440c7317SRobert Marko #define PHY_88E1512_RESET 4 18*440c7317SRobert Marko #define POE_RESET 5 19*440c7317SRobert Marko 20*440c7317SRobert Marko #endif /* _DT_BINDINGS_RESET_TN48M_H */ 21