1 /* 2 * This header provides macros for MAXIM MAX77620 device bindings. 3 * 4 * Copyright (c) 2016, NVIDIA Corporation. 5 * Author: Laxman Dewangan <ldewangan@nvidia.com> 6 */ 7 8 #ifndef _DT_BINDINGS_MFD_MAX77620_H 9 #define _DT_BINDINGS_MFD_MAX77620_H 10 11 /* MAX77620 interrupts */ 12 #define MAX77620_IRQ_TOP_GLBL 0 /* Low-Battery */ 13 #define MAX77620_IRQ_TOP_SD 1 /* SD power fail */ 14 #define MAX77620_IRQ_TOP_LDO 2 /* LDO power fail */ 15 #define MAX77620_IRQ_TOP_GPIO 3 /* GPIO internal int to MAX77620 */ 16 #define MAX77620_IRQ_TOP_RTC 4 /* RTC */ 17 #define MAX77620_IRQ_TOP_32K 5 /* 32kHz oscillator */ 18 #define MAX77620_IRQ_TOP_ONOFF 6 /* ON/OFF oscillator */ 19 #define MAX77620_IRQ_LBT_MBATLOW 7 /* Thermal alarm status, > 120C */ 20 #define MAX77620_IRQ_LBT_TJALRM1 8 /* Thermal alarm status, > 120C */ 21 #define MAX77620_IRQ_LBT_TJALRM2 9 /* Thermal alarm status, > 140C */ 22 23 /* FPS event source */ 24 #define MAX77620_FPS_EVENT_SRC_EN0 0 25 #define MAX77620_FPS_EVENT_SRC_EN1 1 26 #define MAX77620_FPS_EVENT_SRC_SW 2 27 28 /* Device state when FPS event LOW */ 29 #define MAX77620_FPS_INACTIVE_STATE_SLEEP 0 30 #define MAX77620_FPS_INACTIVE_STATE_LOW_POWER 1 31 32 /* FPS source */ 33 #define MAX77620_FPS_SRC_0 0 34 #define MAX77620_FPS_SRC_1 1 35 #define MAX77620_FPS_SRC_2 2 36 #define MAX77620_FPS_SRC_NONE 3 37 #define MAX77620_FPS_SRC_DEF 4 38 39 #endif 40