1ac991dceSLaurent Pinchart /* 2ac991dceSLaurent Pinchart * Copyright 2013 Ideas On Board SPRL 3ac991dceSLaurent Pinchart * 4ac991dceSLaurent Pinchart * This program is free software; you can redistribute it and/or modify 5ac991dceSLaurent Pinchart * it under the terms of the GNU General Public License as published by 6ac991dceSLaurent Pinchart * the Free Software Foundation; either version 2 of the License, or 7ac991dceSLaurent Pinchart * (at your option) any later version. 8ac991dceSLaurent Pinchart */ 9ac991dceSLaurent Pinchart 10ac991dceSLaurent Pinchart #ifndef __DT_BINDINGS_CLOCK_R8A7790_H__ 11ac991dceSLaurent Pinchart #define __DT_BINDINGS_CLOCK_R8A7790_H__ 12ac991dceSLaurent Pinchart 13ac991dceSLaurent Pinchart /* CPG */ 14ac991dceSLaurent Pinchart #define R8A7790_CLK_MAIN 0 15ac991dceSLaurent Pinchart #define R8A7790_CLK_PLL0 1 16ac991dceSLaurent Pinchart #define R8A7790_CLK_PLL1 2 17ac991dceSLaurent Pinchart #define R8A7790_CLK_PLL3 3 18ac991dceSLaurent Pinchart #define R8A7790_CLK_LB 4 19ac991dceSLaurent Pinchart #define R8A7790_CLK_QSPI 5 20ac991dceSLaurent Pinchart #define R8A7790_CLK_SDH 6 21ac991dceSLaurent Pinchart #define R8A7790_CLK_SD0 7 22ac991dceSLaurent Pinchart #define R8A7790_CLK_SD1 8 23ac991dceSLaurent Pinchart #define R8A7790_CLK_Z 9 2441650f40SSergei Shtylyov #define R8A7790_CLK_RCAN 10 253453ca9eSSergei Shtylyov #define R8A7790_CLK_ADSP 11 26ac991dceSLaurent Pinchart 279d90951aSLaurent Pinchart /* MSTP0 */ 289d90951aSLaurent Pinchart #define R8A7790_CLK_MSIOF0 0 299d90951aSLaurent Pinchart 30ac991dceSLaurent Pinchart /* MSTP1 */ 314ba8f246SYoshifumi Hosoya #define R8A7790_CLK_VCP1 0 324ba8f246SYoshifumi Hosoya #define R8A7790_CLK_VCP0 1 334ba8f246SYoshifumi Hosoya #define R8A7790_CLK_VPC1 2 344ba8f246SYoshifumi Hosoya #define R8A7790_CLK_VPC0 3 35da076a88SMikhail Ulyanov #define R8A7790_CLK_JPU 6 364ba8f246SYoshifumi Hosoya #define R8A7790_CLK_SSP1 9 37ac991dceSLaurent Pinchart #define R8A7790_CLK_TMU1 11 382284ff5fSKouei Abe #define R8A7790_CLK_3DG 12 394ba8f246SYoshifumi Hosoya #define R8A7790_CLK_2DDMAC 15 404ba8f246SYoshifumi Hosoya #define R8A7790_CLK_FDP1_2 17 414ba8f246SYoshifumi Hosoya #define R8A7790_CLK_FDP1_1 18 424ba8f246SYoshifumi Hosoya #define R8A7790_CLK_FDP1_0 19 43ac991dceSLaurent Pinchart #define R8A7790_CLK_TMU3 21 44ac991dceSLaurent Pinchart #define R8A7790_CLK_TMU2 22 45ac991dceSLaurent Pinchart #define R8A7790_CLK_CMT0 24 46ac991dceSLaurent Pinchart #define R8A7790_CLK_TMU0 25 47ac991dceSLaurent Pinchart #define R8A7790_CLK_VSP1_DU1 27 48ac991dceSLaurent Pinchart #define R8A7790_CLK_VSP1_DU0 28 4979ea9934SLaurent Pinchart #define R8A7790_CLK_VSP1_R 30 5079ea9934SLaurent Pinchart #define R8A7790_CLK_VSP1_S 31 51ac991dceSLaurent Pinchart 52ac991dceSLaurent Pinchart /* MSTP2 */ 53ac991dceSLaurent Pinchart #define R8A7790_CLK_SCIFA2 2 54ac991dceSLaurent Pinchart #define R8A7790_CLK_SCIFA1 3 55ac991dceSLaurent Pinchart #define R8A7790_CLK_SCIFA0 4 569d90951aSLaurent Pinchart #define R8A7790_CLK_MSIOF2 5 57ac991dceSLaurent Pinchart #define R8A7790_CLK_SCIFB0 6 58ac991dceSLaurent Pinchart #define R8A7790_CLK_SCIFB1 7 599d90951aSLaurent Pinchart #define R8A7790_CLK_MSIOF1 8 609d90951aSLaurent Pinchart #define R8A7790_CLK_MSIOF3 15 61ac991dceSLaurent Pinchart #define R8A7790_CLK_SCIFB2 16 62b998da05SSimon Horman #define R8A7790_CLK_SYS_DMAC1 18 63b998da05SSimon Horman #define R8A7790_CLK_SYS_DMAC0 19 64ac991dceSLaurent Pinchart 65ac991dceSLaurent Pinchart /* MSTP3 */ 6601d968e9SWolfram Sang #define R8A7790_CLK_IIC2 0 67ac991dceSLaurent Pinchart #define R8A7790_CLK_TPU0 4 68ac991dceSLaurent Pinchart #define R8A7790_CLK_MMCIF1 5 69ac991dceSLaurent Pinchart #define R8A7790_CLK_SDHI3 11 70ac991dceSLaurent Pinchart #define R8A7790_CLK_SDHI2 12 71ac991dceSLaurent Pinchart #define R8A7790_CLK_SDHI1 13 72ac991dceSLaurent Pinchart #define R8A7790_CLK_SDHI0 14 73ac991dceSLaurent Pinchart #define R8A7790_CLK_MMCIF0 15 7401d968e9SWolfram Sang #define R8A7790_CLK_IIC0 18 75ecafea8cSPhil Edworthy #define R8A7790_CLK_PCIEC 19 7601d968e9SWolfram Sang #define R8A7790_CLK_IIC1 23 77ac991dceSLaurent Pinchart #define R8A7790_CLK_SSUSB 28 78ac991dceSLaurent Pinchart #define R8A7790_CLK_CMT1 29 79ac991dceSLaurent Pinchart #define R8A7790_CLK_USBDMAC0 30 80ac991dceSLaurent Pinchart #define R8A7790_CLK_USBDMAC1 31 81ac991dceSLaurent Pinchart 82ac991dceSLaurent Pinchart /* MSTP5 */ 83ba3240beSKuninori Morimoto #define R8A7790_CLK_AUDIO_DMAC1 1 84ba3240beSKuninori Morimoto #define R8A7790_CLK_AUDIO_DMAC0 2 853453ca9eSSergei Shtylyov #define R8A7790_CLK_ADSP_MOD 6 86ac991dceSLaurent Pinchart #define R8A7790_CLK_THERMAL 22 87ac991dceSLaurent Pinchart #define R8A7790_CLK_PWM 23 88ac991dceSLaurent Pinchart 89ac991dceSLaurent Pinchart /* MSTP7 */ 90ac991dceSLaurent Pinchart #define R8A7790_CLK_EHCI 3 91ac991dceSLaurent Pinchart #define R8A7790_CLK_HSUSB 4 92ac991dceSLaurent Pinchart #define R8A7790_CLK_HSCIF1 16 93ac991dceSLaurent Pinchart #define R8A7790_CLK_HSCIF0 17 94ac991dceSLaurent Pinchart #define R8A7790_CLK_SCIF1 20 95ac991dceSLaurent Pinchart #define R8A7790_CLK_SCIF0 21 96ac991dceSLaurent Pinchart #define R8A7790_CLK_DU2 22 97ac991dceSLaurent Pinchart #define R8A7790_CLK_DU1 23 98ac991dceSLaurent Pinchart #define R8A7790_CLK_DU0 24 99ac991dceSLaurent Pinchart #define R8A7790_CLK_LVDS1 25 100ac991dceSLaurent Pinchart #define R8A7790_CLK_LVDS0 26 101ac991dceSLaurent Pinchart 102ac991dceSLaurent Pinchart /* MSTP8 */ 103f6b5dd40SAndrey Gusakov #define R8A7790_CLK_MLB 2 104ac991dceSLaurent Pinchart #define R8A7790_CLK_VIN3 8 105ac991dceSLaurent Pinchart #define R8A7790_CLK_VIN2 9 106ac991dceSLaurent Pinchart #define R8A7790_CLK_VIN1 10 107ac991dceSLaurent Pinchart #define R8A7790_CLK_VIN0 11 108ac991dceSLaurent Pinchart #define R8A7790_CLK_ETHER 13 109ac991dceSLaurent Pinchart #define R8A7790_CLK_SATA1 14 110ac991dceSLaurent Pinchart #define R8A7790_CLK_SATA0 15 111ac991dceSLaurent Pinchart 112ac991dceSLaurent Pinchart /* MSTP9 */ 113ac991dceSLaurent Pinchart #define R8A7790_CLK_GPIO5 7 114ac991dceSLaurent Pinchart #define R8A7790_CLK_GPIO4 8 115ac991dceSLaurent Pinchart #define R8A7790_CLK_GPIO3 9 116ac991dceSLaurent Pinchart #define R8A7790_CLK_GPIO2 10 117ac991dceSLaurent Pinchart #define R8A7790_CLK_GPIO1 11 118ac991dceSLaurent Pinchart #define R8A7790_CLK_GPIO0 12 119ac991dceSLaurent Pinchart #define R8A7790_CLK_RCAN1 15 120ac991dceSLaurent Pinchart #define R8A7790_CLK_RCAN0 16 12191b56ca1SLaurent Pinchart #define R8A7790_CLK_QSPI_MOD 17 122ac991dceSLaurent Pinchart #define R8A7790_CLK_IICDVFS 26 123ac991dceSLaurent Pinchart #define R8A7790_CLK_I2C3 28 124ac991dceSLaurent Pinchart #define R8A7790_CLK_I2C2 29 125ac991dceSLaurent Pinchart #define R8A7790_CLK_I2C1 30 126ac991dceSLaurent Pinchart #define R8A7790_CLK_I2C0 31 127ac991dceSLaurent Pinchart 128bcde3722SKuninori Morimoto /* MSTP10 */ 129bcde3722SKuninori Morimoto #define R8A7790_CLK_SSI_ALL 5 130bcde3722SKuninori Morimoto #define R8A7790_CLK_SSI9 6 131bcde3722SKuninori Morimoto #define R8A7790_CLK_SSI8 7 132bcde3722SKuninori Morimoto #define R8A7790_CLK_SSI7 8 133bcde3722SKuninori Morimoto #define R8A7790_CLK_SSI6 9 134bcde3722SKuninori Morimoto #define R8A7790_CLK_SSI5 10 135bcde3722SKuninori Morimoto #define R8A7790_CLK_SSI4 11 136bcde3722SKuninori Morimoto #define R8A7790_CLK_SSI3 12 137bcde3722SKuninori Morimoto #define R8A7790_CLK_SSI2 13 138bcde3722SKuninori Morimoto #define R8A7790_CLK_SSI1 14 139bcde3722SKuninori Morimoto #define R8A7790_CLK_SSI0 15 140bcde3722SKuninori Morimoto #define R8A7790_CLK_SCU_ALL 17 141bcde3722SKuninori Morimoto #define R8A7790_CLK_SCU_DVC1 18 142bcde3722SKuninori Morimoto #define R8A7790_CLK_SCU_DVC0 19 143bcde3722SKuninori Morimoto #define R8A7790_CLK_SCU_SRC9 22 144bcde3722SKuninori Morimoto #define R8A7790_CLK_SCU_SRC8 23 145bcde3722SKuninori Morimoto #define R8A7790_CLK_SCU_SRC7 24 146bcde3722SKuninori Morimoto #define R8A7790_CLK_SCU_SRC6 25 147bcde3722SKuninori Morimoto #define R8A7790_CLK_SCU_SRC5 26 148bcde3722SKuninori Morimoto #define R8A7790_CLK_SCU_SRC4 27 149bcde3722SKuninori Morimoto #define R8A7790_CLK_SCU_SRC3 28 150bcde3722SKuninori Morimoto #define R8A7790_CLK_SCU_SRC2 29 151bcde3722SKuninori Morimoto #define R8A7790_CLK_SCU_SRC1 30 152bcde3722SKuninori Morimoto #define R8A7790_CLK_SCU_SRC0 31 153bcde3722SKuninori Morimoto 154ac991dceSLaurent Pinchart #endif /* __DT_BINDINGS_CLOCK_R8A7790_H__ */ 155