1// SPDX-License-Identifier: GPL-2.0
2/*
3 * SoM: https://www.ti.com/lit/zip/sprr439
4 *
5 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
6 */
7
8/dts-v1/;
9
10#include "k3-j721s2.dtsi"
11#include <dt-bindings/gpio/gpio.h>
12
13/ {
14	memory@80000000 {
15		device_type = "memory";
16		/* 16 GB RAM */
17		reg = <0x00 0x80000000 0x00 0x80000000>,
18		      <0x08 0x80000000 0x03 0x80000000>;
19	};
20
21	/* Reserving memory regions still pending */
22	reserved_memory: reserved-memory {
23		#address-cells = <2>;
24		#size-cells = <2>;
25		ranges;
26
27		secure_ddr: optee@9e800000 {
28			reg = <0x00 0x9e800000 0x00 0x01800000>;
29			alignment = <0x1000>;
30			no-map;
31		};
32	};
33
34	mux0: mux-controller {
35		compatible = "gpio-mux";
36		#mux-state-cells = <1>;
37		mux-gpios = <&exp_som 1 GPIO_ACTIVE_HIGH>;
38	};
39
40	mux1: mux-controller {
41		compatible = "gpio-mux";
42		#mux-state-cells = <1>;
43		mux-gpios = <&exp_som 2 GPIO_ACTIVE_HIGH>;
44	};
45
46	transceiver0: can-phy0 {
47		/* standby pin has been grounded by default */
48		compatible = "ti,tcan1042";
49		#phy-cells = <0>;
50		max-bitrate = <5000000>;
51	};
52};
53
54&wkup_pmx0 {
55	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
56		pinctrl-single,pins = <
57			J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (D19) MCU_OSPI0_CLK */
58			J721S2_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F15) MCU_OSPI0_CSn0 */
59			J721S2_WKUP_IOPAD(0x030, PIN_OUTPUT, 0) /* (G17) MCU_OSPI0_CSn1 */
60			J721S2_WKUP_IOPAD(0x038, PIN_OUTPUT, 0) /* (F14) MCU_OSPI0_CSn2 */
61			J721S2_WKUP_IOPAD(0x03c, PIN_OUTPUT, 0) /* (F17) MCU_OSPI0_CSn3 */
62			J721S2_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (C19) MCU_OSPI0_D0 */
63			J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (F16) MCU_OSPI0_D1 */
64			J721S2_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (G15) MCU_OSPI0_D2 */
65			J721S2_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (F18) MCU_OSPI0_D3 */
66			J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (E19) MCU_OSPI0_D4 */
67			J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (G19) MCU_OSPI0_D5 */
68			J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (F19) MCU_OSPI0_D6 */
69			J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (F20) MCU_OSPI0_D7 */
70			J721S2_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (E18) MCU_OSPI0_DQS */
71			J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E20) MCU_OSPI0_LBCLKO */
72		>;
73	};
74};
75
76&wkup_pmx2 {
77	wkup_i2c0_pins_default: wkup-i2c0-default-pins {
78		pinctrl-single,pins = <
79			J721S2_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (H24) WKUP_I2C0_SCL */
80			J721S2_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (H27) WKUP_I2C0_SDA */
81		>;
82	};
83};
84
85&main_pmx0 {
86	main_i2c0_pins_default: main-i2c0-default-pins {
87		pinctrl-single,pins = <
88			J721S2_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AH25) I2C0_SCL */
89			J721S2_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AE24) I2C0_SDA */
90		>;
91	};
92
93	main_mcan16_pins_default: main-mcan16-default-pins {
94		pinctrl-single,pins = <
95			J721S2_IOPAD(0x028, PIN_INPUT, 0) /* (AB24) MCAN16_RX */
96			J721S2_IOPAD(0x024, PIN_OUTPUT, 0) /* (Y28) MCAN16_TX */
97		>;
98	};
99};
100
101&wkup_i2c0 {
102	status = "okay";
103	pinctrl-names = "default";
104	pinctrl-0 = <&wkup_i2c0_pins_default>;
105	clock-frequency = <400000>;
106
107	eeprom@50 {
108		/* CAV24C256WE-GT3 */
109		compatible = "atmel,24c256";
110		reg = <0x50>;
111	};
112};
113
114&main_i2c0 {
115	status = "okay";
116	pinctrl-names = "default";
117	pinctrl-0 = <&main_i2c0_pins_default>;
118	clock-frequency = <400000>;
119
120	exp_som: gpio@21 {
121		compatible = "ti,tca6408";
122		reg = <0x21>;
123		gpio-controller;
124		#gpio-cells = <2>;
125		gpio-line-names = "USB2.0_MUX_SEL", "CANUART_MUX1_SEL0",
126				  "CANUART_MUX2_SEL0", "CANUART_MUX_SEL1",
127				  "GPIO_RGMII1_RST", "GPIO_eDP_ENABLE",
128				   "GPIO_LIN_EN", "CAN_STB";
129	};
130};
131
132&main_mcan16 {
133	status = "okay";
134	pinctrl-0 = <&main_mcan16_pins_default>;
135	pinctrl-names = "default";
136	phys = <&transceiver0>;
137};
138
139&ospi0 {
140	status = "okay";
141	pinctrl-names = "default";
142	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
143
144	flash@0 {
145		compatible = "jedec,spi-nor";
146		reg = <0x0>;
147		spi-tx-bus-width = <8>;
148		spi-rx-bus-width = <8>;
149		spi-max-frequency = <25000000>;
150		cdns,tshsl-ns = <60>;
151		cdns,tsd2d-ns = <60>;
152		cdns,tchsh-ns = <60>;
153		cdns,tslch-ns = <60>;
154		cdns,read-delay = <4>;
155	};
156};
157