1*cac04e27SKishon Vijay Abraham I// SPDX-License-Identifier: GPL-2.0 2*cac04e27SKishon Vijay Abraham I/** 3*cac04e27SKishon Vijay Abraham I * DT Overlay for MAIN CPSW2G using GESI Expansion Board with J7 common processor board. 4*cac04e27SKishon Vijay Abraham I * 5*cac04e27SKishon Vijay Abraham I * GESI Board Product Link: https://www.ti.com/tool/J7EXPCXEVM 6*cac04e27SKishon Vijay Abraham I * 7*cac04e27SKishon Vijay Abraham I * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/ 8*cac04e27SKishon Vijay Abraham I */ 9*cac04e27SKishon Vijay Abraham I 10*cac04e27SKishon Vijay Abraham I/dts-v1/; 11*cac04e27SKishon Vijay Abraham I/plugin/; 12*cac04e27SKishon Vijay Abraham I 13*cac04e27SKishon Vijay Abraham I#include <dt-bindings/gpio/gpio.h> 14*cac04e27SKishon Vijay Abraham I#include <dt-bindings/net/ti-dp83867.h> 15*cac04e27SKishon Vijay Abraham I 16*cac04e27SKishon Vijay Abraham I#include "k3-pinctrl.h" 17*cac04e27SKishon Vijay Abraham I 18*cac04e27SKishon Vijay Abraham I&{/} { 19*cac04e27SKishon Vijay Abraham I aliases { 20*cac04e27SKishon Vijay Abraham I ethernet1 = "/bus@100000/ethernet@c200000/ethernet-ports/port@1"; 21*cac04e27SKishon Vijay Abraham I }; 22*cac04e27SKishon Vijay Abraham I}; 23*cac04e27SKishon Vijay Abraham I 24*cac04e27SKishon Vijay Abraham I&main_pmx0 { 25*cac04e27SKishon Vijay Abraham I main_cpsw_mdio_default_pins: main-cpsw-mdio-default-pins { 26*cac04e27SKishon Vijay Abraham I pinctrl-single,pins = < 27*cac04e27SKishon Vijay Abraham I J721S2_IOPAD(0x0c0, PIN_OUTPUT, 6) /* (T28) MCASP1_AXR0.MDIO0_MDC */ 28*cac04e27SKishon Vijay Abraham I J721S2_IOPAD(0x0bc, PIN_INPUT, 6) /* (V28) MCASP1_AFSX.MDIO0_MDIO */ 29*cac04e27SKishon Vijay Abraham I >; 30*cac04e27SKishon Vijay Abraham I }; 31*cac04e27SKishon Vijay Abraham I 32*cac04e27SKishon Vijay Abraham I rgmii1_default_pins: rgmii1-default-pins { 33*cac04e27SKishon Vijay Abraham I pinctrl-single,pins = < 34*cac04e27SKishon Vijay Abraham I J721S2_IOPAD(0x0b8, PIN_INPUT, 6) /* (AA24) MCASP1_ACLKX.RGMII1_RD0 */ 35*cac04e27SKishon Vijay Abraham I J721S2_IOPAD(0x0a0, PIN_INPUT, 6) /* (AB25) MCASP0_AXR12.RGMII1_RD1 */ 36*cac04e27SKishon Vijay Abraham I J721S2_IOPAD(0x0a4, PIN_INPUT, 6) /* (T23) MCASP0_AXR13.RGMII1_RD2 */ 37*cac04e27SKishon Vijay Abraham I J721S2_IOPAD(0x0a8, PIN_INPUT, 6) /* (U24) MCASP0_AXR14.RGMII1_RD3 */ 38*cac04e27SKishon Vijay Abraham I J721S2_IOPAD(0x0b0, PIN_INPUT, 6) /* (AD26) MCASP1_AXR3.RGMII1_RXC */ 39*cac04e27SKishon Vijay Abraham I J721S2_IOPAD(0x0ac, PIN_INPUT, 6) /* (AC25) MCASP0_AXR15.RGMII1_RX_CTL */ 40*cac04e27SKishon Vijay Abraham I J721S2_IOPAD(0x08c, PIN_OUTPUT, 6) /* (T25) MCASP0_AXR7.RGMII1_TD0 */ 41*cac04e27SKishon Vijay Abraham I J721S2_IOPAD(0x090, PIN_OUTPUT, 6) /* (W24) MCASP0_AXR8.RGMII1_TD1 */ 42*cac04e27SKishon Vijay Abraham I J721S2_IOPAD(0x094, PIN_OUTPUT, 6) /* (AA25) MCASP0_AXR9.RGMII1_TD2 */ 43*cac04e27SKishon Vijay Abraham I J721S2_IOPAD(0x098, PIN_OUTPUT, 6) /* (V25) MCASP0_AXR10.RGMII1_TD3 */ 44*cac04e27SKishon Vijay Abraham I J721S2_IOPAD(0x0b4, PIN_OUTPUT, 6) /* (U25) MCASP1_AXR4.RGMII1_TXC */ 45*cac04e27SKishon Vijay Abraham I J721S2_IOPAD(0x09c, PIN_OUTPUT, 6) /* (T24) MCASP0_AXR11.RGMII1_TX_CTL */ 46*cac04e27SKishon Vijay Abraham I >; 47*cac04e27SKishon Vijay Abraham I }; 48*cac04e27SKishon Vijay Abraham I}; 49*cac04e27SKishon Vijay Abraham I 50*cac04e27SKishon Vijay Abraham I&exp1 { 51*cac04e27SKishon Vijay Abraham I p15 { 52*cac04e27SKishon Vijay Abraham I /* P15 - EXP_MUX2 */ 53*cac04e27SKishon Vijay Abraham I gpio-hog; 54*cac04e27SKishon Vijay Abraham I gpios = <13 GPIO_ACTIVE_HIGH>; 55*cac04e27SKishon Vijay Abraham I output-high; 56*cac04e27SKishon Vijay Abraham I line-name = "EXP_MUX2"; 57*cac04e27SKishon Vijay Abraham I }; 58*cac04e27SKishon Vijay Abraham I}; 59*cac04e27SKishon Vijay Abraham I 60*cac04e27SKishon Vijay Abraham I&main_cpsw { 61*cac04e27SKishon Vijay Abraham I status = "okay"; 62*cac04e27SKishon Vijay Abraham I pinctrl-names = "default"; 63*cac04e27SKishon Vijay Abraham I pinctrl-0 = <&rgmii1_default_pins>; 64*cac04e27SKishon Vijay Abraham I}; 65*cac04e27SKishon Vijay Abraham I 66*cac04e27SKishon Vijay Abraham I&main_cpsw_mdio { 67*cac04e27SKishon Vijay Abraham I status = "okay"; 68*cac04e27SKishon Vijay Abraham I pinctrl-names = "default"; 69*cac04e27SKishon Vijay Abraham I pinctrl-0 = <&main_cpsw_mdio_default_pins>; 70*cac04e27SKishon Vijay Abraham I #address-cells = <1>; 71*cac04e27SKishon Vijay Abraham I #size-cells = <0>; 72*cac04e27SKishon Vijay Abraham I 73*cac04e27SKishon Vijay Abraham I main_cpsw_phy0: ethernet-phy@0 { 74*cac04e27SKishon Vijay Abraham I reg = <0>; 75*cac04e27SKishon Vijay Abraham I ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 76*cac04e27SKishon Vijay Abraham I ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 77*cac04e27SKishon Vijay Abraham I ti,min-output-impedance; 78*cac04e27SKishon Vijay Abraham I }; 79*cac04e27SKishon Vijay Abraham I}; 80*cac04e27SKishon Vijay Abraham I 81*cac04e27SKishon Vijay Abraham I&main_cpsw_port1 { 82*cac04e27SKishon Vijay Abraham I status = "okay"; 83*cac04e27SKishon Vijay Abraham I phy-mode = "rgmii-rxid"; 84*cac04e27SKishon Vijay Abraham I phy-handle = <&main_cpsw_phy0>; 85*cac04e27SKishon Vijay Abraham I}; 86