1*effb32e9SAswath Govindraju// SPDX-License-Identifier: GPL-2.0 2*effb32e9SAswath Govindraju/* 3*effb32e9SAswath Govindraju * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ 4*effb32e9SAswath Govindraju * 5*effb32e9SAswath Govindraju * Common Processor Board: https://www.ti.com/tool/J721EXCPXEVM 6*effb32e9SAswath Govindraju */ 7*effb32e9SAswath Govindraju 8*effb32e9SAswath Govindraju/dts-v1/; 9*effb32e9SAswath Govindraju 10*effb32e9SAswath Govindraju#include "k3-j721s2-som-p0.dtsi" 11*effb32e9SAswath Govindraju#include <dt-bindings/net/ti-dp83867.h> 12*effb32e9SAswath Govindraju 13*effb32e9SAswath Govindraju/ { 14*effb32e9SAswath Govindraju compatible = "ti,j721s2-evm", "ti,j721s2"; 15*effb32e9SAswath Govindraju model = "Texas Instruments J721S2 EVM"; 16*effb32e9SAswath Govindraju 17*effb32e9SAswath Govindraju chosen { 18*effb32e9SAswath Govindraju stdout-path = "serial10:115200n8"; 19*effb32e9SAswath Govindraju bootargs = "console=ttyS10,115200n8 earlycon=ns16550a,mmio32,2880000"; 20*effb32e9SAswath Govindraju }; 21*effb32e9SAswath Govindraju 22*effb32e9SAswath Govindraju evm_12v0: fixedregulator-evm12v0 { 23*effb32e9SAswath Govindraju /* main supply */ 24*effb32e9SAswath Govindraju compatible = "regulator-fixed"; 25*effb32e9SAswath Govindraju regulator-name = "evm_12v0"; 26*effb32e9SAswath Govindraju regulator-min-microvolt = <12000000>; 27*effb32e9SAswath Govindraju regulator-max-microvolt = <12000000>; 28*effb32e9SAswath Govindraju regulator-always-on; 29*effb32e9SAswath Govindraju regulator-boot-on; 30*effb32e9SAswath Govindraju }; 31*effb32e9SAswath Govindraju 32*effb32e9SAswath Govindraju vsys_3v3: fixedregulator-vsys3v3 { 33*effb32e9SAswath Govindraju /* Output of LM5140 */ 34*effb32e9SAswath Govindraju compatible = "regulator-fixed"; 35*effb32e9SAswath Govindraju regulator-name = "vsys_3v3"; 36*effb32e9SAswath Govindraju regulator-min-microvolt = <3300000>; 37*effb32e9SAswath Govindraju regulator-max-microvolt = <3300000>; 38*effb32e9SAswath Govindraju vin-supply = <&evm_12v0>; 39*effb32e9SAswath Govindraju regulator-always-on; 40*effb32e9SAswath Govindraju regulator-boot-on; 41*effb32e9SAswath Govindraju }; 42*effb32e9SAswath Govindraju 43*effb32e9SAswath Govindraju vsys_5v0: fixedregulator-vsys5v0 { 44*effb32e9SAswath Govindraju /* Output of LM5140 */ 45*effb32e9SAswath Govindraju compatible = "regulator-fixed"; 46*effb32e9SAswath Govindraju regulator-name = "vsys_5v0"; 47*effb32e9SAswath Govindraju regulator-min-microvolt = <5000000>; 48*effb32e9SAswath Govindraju regulator-max-microvolt = <5000000>; 49*effb32e9SAswath Govindraju vin-supply = <&evm_12v0>; 50*effb32e9SAswath Govindraju regulator-always-on; 51*effb32e9SAswath Govindraju regulator-boot-on; 52*effb32e9SAswath Govindraju }; 53*effb32e9SAswath Govindraju 54*effb32e9SAswath Govindraju vdd_mmc1: fixedregulator-sd { 55*effb32e9SAswath Govindraju /* Output of TPS22918 */ 56*effb32e9SAswath Govindraju compatible = "regulator-fixed"; 57*effb32e9SAswath Govindraju regulator-name = "vdd_mmc1"; 58*effb32e9SAswath Govindraju regulator-min-microvolt = <3300000>; 59*effb32e9SAswath Govindraju regulator-max-microvolt = <3300000>; 60*effb32e9SAswath Govindraju regulator-boot-on; 61*effb32e9SAswath Govindraju enable-active-high; 62*effb32e9SAswath Govindraju vin-supply = <&vsys_3v3>; 63*effb32e9SAswath Govindraju gpio = <&exp2 2 GPIO_ACTIVE_HIGH>; 64*effb32e9SAswath Govindraju }; 65*effb32e9SAswath Govindraju 66*effb32e9SAswath Govindraju vdd_sd_dv: gpio-regulator-TLV71033 { 67*effb32e9SAswath Govindraju /* Output of TLV71033 */ 68*effb32e9SAswath Govindraju compatible = "regulator-gpio"; 69*effb32e9SAswath Govindraju regulator-name = "tlv71033"; 70*effb32e9SAswath Govindraju pinctrl-names = "default"; 71*effb32e9SAswath Govindraju pinctrl-0 = <&vdd_sd_dv_pins_default>; 72*effb32e9SAswath Govindraju regulator-min-microvolt = <1800000>; 73*effb32e9SAswath Govindraju regulator-max-microvolt = <3300000>; 74*effb32e9SAswath Govindraju regulator-boot-on; 75*effb32e9SAswath Govindraju vin-supply = <&vsys_5v0>; 76*effb32e9SAswath Govindraju gpios = <&main_gpio0 8 GPIO_ACTIVE_HIGH>; 77*effb32e9SAswath Govindraju states = <1800000 0x0>, 78*effb32e9SAswath Govindraju <3300000 0x1>; 79*effb32e9SAswath Govindraju }; 80*effb32e9SAswath Govindraju 81*effb32e9SAswath Govindraju transceiver1: can-phy1 { 82*effb32e9SAswath Govindraju compatible = "ti,tcan1043"; 83*effb32e9SAswath Govindraju #phy-cells = <0>; 84*effb32e9SAswath Govindraju max-bitrate = <5000000>; 85*effb32e9SAswath Govindraju pinctrl-names = "default"; 86*effb32e9SAswath Govindraju pinctrl-0 = <&mcu_mcan0_gpio_pins_default>; 87*effb32e9SAswath Govindraju standby-gpios = <&wkup_gpio0 69 GPIO_ACTIVE_LOW>; 88*effb32e9SAswath Govindraju enable-gpios = <&wkup_gpio0 0 GPIO_ACTIVE_HIGH>; 89*effb32e9SAswath Govindraju }; 90*effb32e9SAswath Govindraju 91*effb32e9SAswath Govindraju transceiver2: can-phy2 { 92*effb32e9SAswath Govindraju compatible = "ti,tcan1042"; 93*effb32e9SAswath Govindraju #phy-cells = <0>; 94*effb32e9SAswath Govindraju max-bitrate = <5000000>; 95*effb32e9SAswath Govindraju pinctrl-names = "default"; 96*effb32e9SAswath Govindraju pinctrl-0 = <&mcu_mcan1_gpio_pins_default>; 97*effb32e9SAswath Govindraju standby-gpios = <&wkup_gpio0 2 GPIO_ACTIVE_HIGH>; 98*effb32e9SAswath Govindraju }; 99*effb32e9SAswath Govindraju 100*effb32e9SAswath Govindraju}; 101*effb32e9SAswath Govindraju 102*effb32e9SAswath Govindraju&main_pmx0 { 103*effb32e9SAswath Govindraju main_uart8_pins_default: main-uart8-pins-default { 104*effb32e9SAswath Govindraju pinctrl-single,pins = < 105*effb32e9SAswath Govindraju J721S2_IOPAD(0x040, PIN_INPUT, 14) /* (AC28) MCASP0_AXR0.UART8_CTSn */ 106*effb32e9SAswath Govindraju J721S2_IOPAD(0x044, PIN_OUTPUT, 14) /* (Y26) MCASP0_AXR1.UART8_RTSn */ 107*effb32e9SAswath Govindraju J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */ 108*effb32e9SAswath Govindraju J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */ 109*effb32e9SAswath Govindraju >; 110*effb32e9SAswath Govindraju }; 111*effb32e9SAswath Govindraju 112*effb32e9SAswath Govindraju main_i2c3_pins_default: main-i2c3-pins-default { 113*effb32e9SAswath Govindraju pinctrl-single,pins = < 114*effb32e9SAswath Govindraju J721S2_IOPAD(0x064, PIN_INPUT_PULLUP, 13) /* (W28) MCAN0_TX.I2C3_SCL */ 115*effb32e9SAswath Govindraju J721S2_IOPAD(0x060, PIN_INPUT_PULLUP, 13) /* (AC27) MCASP2_AXR1.I2C3_SDA */ 116*effb32e9SAswath Govindraju >; 117*effb32e9SAswath Govindraju }; 118*effb32e9SAswath Govindraju 119*effb32e9SAswath Govindraju main_mmc1_pins_default: main-mmc1-pins-default { 120*effb32e9SAswath Govindraju pinctrl-single,pins = < 121*effb32e9SAswath Govindraju J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */ 122*effb32e9SAswath Govindraju J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */ 123*effb32e9SAswath Govindraju J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */ 124*effb32e9SAswath Govindraju J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */ 125*effb32e9SAswath Govindraju J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */ 126*effb32e9SAswath Govindraju J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */ 127*effb32e9SAswath Govindraju J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */ 128*effb32e9SAswath Govindraju J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */ 129*effb32e9SAswath Govindraju >; 130*effb32e9SAswath Govindraju }; 131*effb32e9SAswath Govindraju 132*effb32e9SAswath Govindraju vdd_sd_dv_pins_default: vdd-sd-dv-pins-default { 133*effb32e9SAswath Govindraju pinctrl-single,pins = < 134*effb32e9SAswath Govindraju J721S2_IOPAD(0x020, PIN_INPUT, 7) /* (AA23) MCAN15_RX.GPIO0_8 */ 135*effb32e9SAswath Govindraju >; 136*effb32e9SAswath Govindraju }; 137*effb32e9SAswath Govindraju}; 138*effb32e9SAswath Govindraju 139*effb32e9SAswath Govindraju&wkup_pmx0 { 140*effb32e9SAswath Govindraju mcu_cpsw_pins_default: mcu-cpsw-pins-default { 141*effb32e9SAswath Govindraju pinctrl-single,pins = < 142*effb32e9SAswath Govindraju J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */ 143*effb32e9SAswath Govindraju J721S2_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */ 144*effb32e9SAswath Govindraju J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */ 145*effb32e9SAswath Govindraju J721S2_WKUP_IOPAD(0x088, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */ 146*effb32e9SAswath Govindraju J721S2_WKUP_IOPAD(0x084, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */ 147*effb32e9SAswath Govindraju J721S2_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */ 148*effb32e9SAswath Govindraju J721S2_WKUP_IOPAD(0x07c, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */ 149*effb32e9SAswath Govindraju J721S2_WKUP_IOPAD(0x078, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */ 150*effb32e9SAswath Govindraju J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */ 151*effb32e9SAswath Govindraju J721S2_WKUP_IOPAD(0x070, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */ 152*effb32e9SAswath Govindraju J721S2_WKUP_IOPAD(0x080, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */ 153*effb32e9SAswath Govindraju J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */ 154*effb32e9SAswath Govindraju >; 155*effb32e9SAswath Govindraju }; 156*effb32e9SAswath Govindraju 157*effb32e9SAswath Govindraju mcu_mdio_pins_default: mcu-mdio-pins-default { 158*effb32e9SAswath Govindraju pinctrl-single,pins = < 159*effb32e9SAswath Govindraju J721S2_WKUP_IOPAD(0x09c, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */ 160*effb32e9SAswath Govindraju J721S2_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */ 161*effb32e9SAswath Govindraju >; 162*effb32e9SAswath Govindraju }; 163*effb32e9SAswath Govindraju 164*effb32e9SAswath Govindraju mcu_mcan0_pins_default: mcu-mcan0-pins-default { 165*effb32e9SAswath Govindraju pinctrl-single,pins = < 166*effb32e9SAswath Govindraju J721S2_WKUP_IOPAD(0x0bc, PIN_INPUT, 0) /* (E28) MCU_MCAN0_RX */ 167*effb32e9SAswath Govindraju J721S2_WKUP_IOPAD(0x0b8, PIN_OUTPUT, 0) /* (E27) MCU_MCAN0_TX */ 168*effb32e9SAswath Govindraju >; 169*effb32e9SAswath Govindraju }; 170*effb32e9SAswath Govindraju 171*effb32e9SAswath Govindraju mcu_mcan1_pins_default: mcu-mcan1-pins-default { 172*effb32e9SAswath Govindraju pinctrl-single,pins = < 173*effb32e9SAswath Govindraju J721S2_WKUP_IOPAD(0x0d4, PIN_INPUT, 0) /* (F26) WKUP_GPIO0_5.MCU_MCAN1_RX */ 174*effb32e9SAswath Govindraju J721S2_WKUP_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (C23) WKUP_GPIO0_4.MCU_MCAN1_TX */ 175*effb32e9SAswath Govindraju >; 176*effb32e9SAswath Govindraju }; 177*effb32e9SAswath Govindraju 178*effb32e9SAswath Govindraju mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-pins-default { 179*effb32e9SAswath Govindraju pinctrl-single,pins = < 180*effb32e9SAswath Govindraju J721S2_WKUP_IOPAD(0x0c0, PIN_INPUT, 7) /* (D26) WKUP_GPIO0_0 */ 181*effb32e9SAswath Govindraju J721S2_WKUP_IOPAD(0x0a8, PIN_INPUT, 7) /* (B25) MCU_SPI0_D1.WKUP_GPIO0_69 */ 182*effb32e9SAswath Govindraju >; 183*effb32e9SAswath Govindraju }; 184*effb32e9SAswath Govindraju 185*effb32e9SAswath Govindraju mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-pins-default { 186*effb32e9SAswath Govindraju pinctrl-single,pins = < 187*effb32e9SAswath Govindraju J721S2_WKUP_IOPAD(0x0c8, PIN_INPUT, 7) /* (C28) WKUP_GPIO0_2 */ 188*effb32e9SAswath Govindraju >; 189*effb32e9SAswath Govindraju }; 190*effb32e9SAswath Govindraju}; 191*effb32e9SAswath Govindraju 192*effb32e9SAswath Govindraju&main_gpio2 { 193*effb32e9SAswath Govindraju status = "disabled"; 194*effb32e9SAswath Govindraju}; 195*effb32e9SAswath Govindraju 196*effb32e9SAswath Govindraju&main_gpio4 { 197*effb32e9SAswath Govindraju status = "disabled"; 198*effb32e9SAswath Govindraju}; 199*effb32e9SAswath Govindraju 200*effb32e9SAswath Govindraju&main_gpio6 { 201*effb32e9SAswath Govindraju status = "disabled"; 202*effb32e9SAswath Govindraju}; 203*effb32e9SAswath Govindraju 204*effb32e9SAswath Govindraju&wkup_gpio1 { 205*effb32e9SAswath Govindraju status = "disabled"; 206*effb32e9SAswath Govindraju}; 207*effb32e9SAswath Govindraju 208*effb32e9SAswath Govindraju&wkup_uart0 { 209*effb32e9SAswath Govindraju status = "reserved"; 210*effb32e9SAswath Govindraju}; 211*effb32e9SAswath Govindraju 212*effb32e9SAswath Govindraju&main_uart0 { 213*effb32e9SAswath Govindraju status = "disabled"; 214*effb32e9SAswath Govindraju}; 215*effb32e9SAswath Govindraju 216*effb32e9SAswath Govindraju&main_uart1 { 217*effb32e9SAswath Govindraju status = "disabled"; 218*effb32e9SAswath Govindraju}; 219*effb32e9SAswath Govindraju 220*effb32e9SAswath Govindraju&main_uart2 { 221*effb32e9SAswath Govindraju status = "disabled"; 222*effb32e9SAswath Govindraju}; 223*effb32e9SAswath Govindraju 224*effb32e9SAswath Govindraju&main_uart3 { 225*effb32e9SAswath Govindraju status = "disabled"; 226*effb32e9SAswath Govindraju}; 227*effb32e9SAswath Govindraju 228*effb32e9SAswath Govindraju&main_uart4 { 229*effb32e9SAswath Govindraju status = "disabled"; 230*effb32e9SAswath Govindraju}; 231*effb32e9SAswath Govindraju 232*effb32e9SAswath Govindraju&main_uart5 { 233*effb32e9SAswath Govindraju status = "disabled"; 234*effb32e9SAswath Govindraju}; 235*effb32e9SAswath Govindraju 236*effb32e9SAswath Govindraju&main_uart6 { 237*effb32e9SAswath Govindraju status = "disabled"; 238*effb32e9SAswath Govindraju}; 239*effb32e9SAswath Govindraju 240*effb32e9SAswath Govindraju&main_uart7 { 241*effb32e9SAswath Govindraju status = "disabled"; 242*effb32e9SAswath Govindraju}; 243*effb32e9SAswath Govindraju 244*effb32e9SAswath Govindraju&main_uart8 { 245*effb32e9SAswath Govindraju pinctrl-names = "default"; 246*effb32e9SAswath Govindraju pinctrl-0 = <&main_uart8_pins_default>; 247*effb32e9SAswath Govindraju /* Shared with TFA on this platform */ 248*effb32e9SAswath Govindraju power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>; 249*effb32e9SAswath Govindraju}; 250*effb32e9SAswath Govindraju 251*effb32e9SAswath Govindraju&main_uart9 { 252*effb32e9SAswath Govindraju status = "disabled"; 253*effb32e9SAswath Govindraju}; 254*effb32e9SAswath Govindraju 255*effb32e9SAswath Govindraju&main_i2c0 { 256*effb32e9SAswath Govindraju clock-frequency = <400000>; 257*effb32e9SAswath Govindraju 258*effb32e9SAswath Govindraju exp1: gpio@20 { 259*effb32e9SAswath Govindraju compatible = "ti,tca6416"; 260*effb32e9SAswath Govindraju reg = <0x20>; 261*effb32e9SAswath Govindraju gpio-controller; 262*effb32e9SAswath Govindraju #gpio-cells = <2>; 263*effb32e9SAswath Govindraju gpio-line-names = "PCIE_2L_MODE_SEL", "PCIE_2L_PERSTZ", "PCIE_2L_RC_RSTZ", 264*effb32e9SAswath Govindraju "PCIE_2L_EP_RST_EN", "PCIE_1L_MODE_SEL", "PCIE_1L_PERSTZ", 265*effb32e9SAswath Govindraju "PCIE_1L_RC_RSTZ", "PCIE_1L_EP_RST_EN", "PCIE_2L_PRSNT#", 266*effb32e9SAswath Govindraju "PCIE_1L_PRSNT#", "CDCI1_OE1/OE4", "CDCI1_OE2/OE3", "EXP_MUX1", 267*effb32e9SAswath Govindraju "EXP_MUX2", "EXP_MUX3", "GESI_EXP_PHY_RSTz"; 268*effb32e9SAswath Govindraju }; 269*effb32e9SAswath Govindraju 270*effb32e9SAswath Govindraju exp2: gpio@22 { 271*effb32e9SAswath Govindraju compatible = "ti,tca6424"; 272*effb32e9SAswath Govindraju reg = <0x22>; 273*effb32e9SAswath Govindraju gpio-controller; 274*effb32e9SAswath Govindraju #gpio-cells = <2>; 275*effb32e9SAswath Govindraju gpio-line-names = "APPLE_AUTH_RSTZ", "MLB_RSTZ", "GPIO_USD_PWR_EN", "USBC_PWR_EN", 276*effb32e9SAswath Govindraju "USBC_MODE_SEL1", "USBC_MODE_SEL0", "MCAN0_EN", "MCAN0_STB#", 277*effb32e9SAswath Govindraju "MUX_SPAREMUX_SPARE", "MCASP/TRACE_MUX_S0", "MCASP/TRACE_MUX_S1", 278*effb32e9SAswath Govindraju "MLB_MUX_SEL", "MCAN_MUX_SEL", "MCASP2/SPI3_MUX_SEL", "PCIe_CLKREQn_MUX_SEL", 279*effb32e9SAswath Govindraju "CDCI2_RSTZ", "ENET_EXP_PWRDN", "ENET_EXP_RESETZ", "ENET_I2CMUX_SEL", 280*effb32e9SAswath Govindraju "ENET_EXP_SPARE2", "M2PCIE_RTSZ", "USER_INPUT1", "USER_LED1", "USER_LED2"; 281*effb32e9SAswath Govindraju }; 282*effb32e9SAswath Govindraju}; 283*effb32e9SAswath Govindraju 284*effb32e9SAswath Govindraju&main_i2c1 { 285*effb32e9SAswath Govindraju status = "disabled"; 286*effb32e9SAswath Govindraju}; 287*effb32e9SAswath Govindraju 288*effb32e9SAswath Govindraju&main_i2c2 { 289*effb32e9SAswath Govindraju status = "disabled"; 290*effb32e9SAswath Govindraju}; 291*effb32e9SAswath Govindraju 292*effb32e9SAswath Govindraju&main_i2c3 { 293*effb32e9SAswath Govindraju status = "disabled"; 294*effb32e9SAswath Govindraju}; 295*effb32e9SAswath Govindraju 296*effb32e9SAswath Govindraju&main_i2c4 { 297*effb32e9SAswath Govindraju status = "disabled"; 298*effb32e9SAswath Govindraju}; 299*effb32e9SAswath Govindraju 300*effb32e9SAswath Govindraju&main_i2c5 { 301*effb32e9SAswath Govindraju status = "disabled"; 302*effb32e9SAswath Govindraju}; 303*effb32e9SAswath Govindraju 304*effb32e9SAswath Govindraju&main_i2c6 { 305*effb32e9SAswath Govindraju status = "disabled"; 306*effb32e9SAswath Govindraju}; 307*effb32e9SAswath Govindraju 308*effb32e9SAswath Govindraju&main_sdhci0 { 309*effb32e9SAswath Govindraju /* eMMC */ 310*effb32e9SAswath Govindraju non-removable; 311*effb32e9SAswath Govindraju ti,driver-strength-ohm = <50>; 312*effb32e9SAswath Govindraju disable-wp; 313*effb32e9SAswath Govindraju}; 314*effb32e9SAswath Govindraju 315*effb32e9SAswath Govindraju&main_sdhci1 { 316*effb32e9SAswath Govindraju /* SD card */ 317*effb32e9SAswath Govindraju pinctrl-0 = <&main_mmc1_pins_default>; 318*effb32e9SAswath Govindraju pinctrl-names = "default"; 319*effb32e9SAswath Govindraju disable-wp; 320*effb32e9SAswath Govindraju vmmc-supply = <&vdd_mmc1>; 321*effb32e9SAswath Govindraju vqmmc-supply = <&vdd_sd_dv>; 322*effb32e9SAswath Govindraju}; 323*effb32e9SAswath Govindraju 324*effb32e9SAswath Govindraju&mcu_cpsw { 325*effb32e9SAswath Govindraju pinctrl-names = "default"; 326*effb32e9SAswath Govindraju pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>; 327*effb32e9SAswath Govindraju}; 328*effb32e9SAswath Govindraju 329*effb32e9SAswath Govindraju&davinci_mdio { 330*effb32e9SAswath Govindraju phy0: ethernet-phy@0 { 331*effb32e9SAswath Govindraju reg = <0>; 332*effb32e9SAswath Govindraju ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 333*effb32e9SAswath Govindraju ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 334*effb32e9SAswath Govindraju ti,min-output-impedance; 335*effb32e9SAswath Govindraju }; 336*effb32e9SAswath Govindraju}; 337*effb32e9SAswath Govindraju 338*effb32e9SAswath Govindraju&cpsw_port1 { 339*effb32e9SAswath Govindraju phy-mode = "rgmii-rxid"; 340*effb32e9SAswath Govindraju phy-handle = <&phy0>; 341*effb32e9SAswath Govindraju}; 342*effb32e9SAswath Govindraju 343*effb32e9SAswath Govindraju&mcu_mcan0 { 344*effb32e9SAswath Govindraju pinctrl-names = "default"; 345*effb32e9SAswath Govindraju pinctrl-0 = <&mcu_mcan0_pins_default>; 346*effb32e9SAswath Govindraju phys = <&transceiver1>; 347*effb32e9SAswath Govindraju}; 348*effb32e9SAswath Govindraju 349*effb32e9SAswath Govindraju&mcu_mcan1 { 350*effb32e9SAswath Govindraju pinctrl-names = "default"; 351*effb32e9SAswath Govindraju pinctrl-0 = <&mcu_mcan1_pins_default>; 352*effb32e9SAswath Govindraju phys = <&transceiver2>; 353*effb32e9SAswath Govindraju}; 354*effb32e9SAswath Govindraju 355*effb32e9SAswath Govindraju&main_mcan0 { 356*effb32e9SAswath Govindraju status = "disabled"; 357*effb32e9SAswath Govindraju}; 358*effb32e9SAswath Govindraju 359*effb32e9SAswath Govindraju&main_mcan1 { 360*effb32e9SAswath Govindraju status = "disabled"; 361*effb32e9SAswath Govindraju}; 362*effb32e9SAswath Govindraju 363*effb32e9SAswath Govindraju&main_mcan2 { 364*effb32e9SAswath Govindraju status = "disabled"; 365*effb32e9SAswath Govindraju}; 366*effb32e9SAswath Govindraju 367*effb32e9SAswath Govindraju&main_mcan3 { 368*effb32e9SAswath Govindraju status = "disabled"; 369*effb32e9SAswath Govindraju}; 370*effb32e9SAswath Govindraju 371*effb32e9SAswath Govindraju&main_mcan4 { 372*effb32e9SAswath Govindraju status = "disabled"; 373*effb32e9SAswath Govindraju}; 374*effb32e9SAswath Govindraju 375*effb32e9SAswath Govindraju&main_mcan5 { 376*effb32e9SAswath Govindraju status = "disabled"; 377*effb32e9SAswath Govindraju}; 378*effb32e9SAswath Govindraju 379*effb32e9SAswath Govindraju&main_mcan6 { 380*effb32e9SAswath Govindraju status = "disabled"; 381*effb32e9SAswath Govindraju}; 382*effb32e9SAswath Govindraju 383*effb32e9SAswath Govindraju&main_mcan7 { 384*effb32e9SAswath Govindraju status = "disabled"; 385*effb32e9SAswath Govindraju}; 386*effb32e9SAswath Govindraju 387*effb32e9SAswath Govindraju&main_mcan8 { 388*effb32e9SAswath Govindraju status = "disabled"; 389*effb32e9SAswath Govindraju}; 390*effb32e9SAswath Govindraju 391*effb32e9SAswath Govindraju&main_mcan9 { 392*effb32e9SAswath Govindraju status = "disabled"; 393*effb32e9SAswath Govindraju}; 394*effb32e9SAswath Govindraju 395*effb32e9SAswath Govindraju&main_mcan10 { 396*effb32e9SAswath Govindraju status = "disabled"; 397*effb32e9SAswath Govindraju}; 398*effb32e9SAswath Govindraju 399*effb32e9SAswath Govindraju&main_mcan11 { 400*effb32e9SAswath Govindraju status = "disabled"; 401*effb32e9SAswath Govindraju}; 402*effb32e9SAswath Govindraju 403*effb32e9SAswath Govindraju&main_mcan12 { 404*effb32e9SAswath Govindraju status = "disabled"; 405*effb32e9SAswath Govindraju}; 406*effb32e9SAswath Govindraju 407*effb32e9SAswath Govindraju&main_mcan13 { 408*effb32e9SAswath Govindraju status = "disabled"; 409*effb32e9SAswath Govindraju}; 410*effb32e9SAswath Govindraju 411*effb32e9SAswath Govindraju&main_mcan14 { 412*effb32e9SAswath Govindraju status = "disabled"; 413*effb32e9SAswath Govindraju}; 414*effb32e9SAswath Govindraju 415*effb32e9SAswath Govindraju&main_mcan15 { 416*effb32e9SAswath Govindraju status = "disabled"; 417*effb32e9SAswath Govindraju}; 418*effb32e9SAswath Govindraju 419*effb32e9SAswath Govindraju&main_mcan17 { 420*effb32e9SAswath Govindraju status = "disabled"; 421*effb32e9SAswath Govindraju}; 422