1effb32e9SAswath Govindraju// SPDX-License-Identifier: GPL-2.0 2effb32e9SAswath Govindraju/* 3effb32e9SAswath Govindraju * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ 4effb32e9SAswath Govindraju * 5effb32e9SAswath Govindraju * Common Processor Board: https://www.ti.com/tool/J721EXCPXEVM 6effb32e9SAswath Govindraju */ 7effb32e9SAswath Govindraju 8effb32e9SAswath Govindraju/dts-v1/; 9effb32e9SAswath Govindraju 10effb32e9SAswath Govindraju#include "k3-j721s2-som-p0.dtsi" 11effb32e9SAswath Govindraju#include <dt-bindings/net/ti-dp83867.h> 12da61731dSAswath Govindraju#include <dt-bindings/phy/phy-cadence.h> 13da61731dSAswath Govindraju#include <dt-bindings/phy/phy.h> 148d08d7aaSJayesh Choudhary 158d08d7aaSJayesh Choudhary#include "k3-serdes.h" 16effb32e9SAswath Govindraju 17effb32e9SAswath Govindraju/ { 18effb32e9SAswath Govindraju compatible = "ti,j721s2-evm", "ti,j721s2"; 19effb32e9SAswath Govindraju model = "Texas Instruments J721S2 EVM"; 20effb32e9SAswath Govindraju 21effb32e9SAswath Govindraju chosen { 22aee744a3SAswath Govindraju stdout-path = "serial2:115200n8"; 23effb32e9SAswath Govindraju }; 24effb32e9SAswath Govindraju 2516521653SAswath Govindraju aliases { 2616521653SAswath Govindraju serial1 = &mcu_uart0; 27aee744a3SAswath Govindraju serial2 = &main_uart8; 2816521653SAswath Govindraju mmc0 = &main_sdhci0; 2916521653SAswath Govindraju mmc1 = &main_sdhci1; 3016521653SAswath Govindraju can0 = &main_mcan16; 3116521653SAswath Govindraju can1 = &mcu_mcan0; 3216521653SAswath Govindraju can2 = &mcu_mcan1; 3398f3b667SBhavya Kapoor can3 = &main_mcan3; 3498f3b667SBhavya Kapoor can4 = &main_mcan5; 3516521653SAswath Govindraju }; 3616521653SAswath Govindraju 37effb32e9SAswath Govindraju evm_12v0: fixedregulator-evm12v0 { 38effb32e9SAswath Govindraju /* main supply */ 39effb32e9SAswath Govindraju compatible = "regulator-fixed"; 40effb32e9SAswath Govindraju regulator-name = "evm_12v0"; 41effb32e9SAswath Govindraju regulator-min-microvolt = <12000000>; 42effb32e9SAswath Govindraju regulator-max-microvolt = <12000000>; 43effb32e9SAswath Govindraju regulator-always-on; 44effb32e9SAswath Govindraju regulator-boot-on; 45effb32e9SAswath Govindraju }; 46effb32e9SAswath Govindraju 47effb32e9SAswath Govindraju vsys_3v3: fixedregulator-vsys3v3 { 48effb32e9SAswath Govindraju /* Output of LM5140 */ 49effb32e9SAswath Govindraju compatible = "regulator-fixed"; 50effb32e9SAswath Govindraju regulator-name = "vsys_3v3"; 51effb32e9SAswath Govindraju regulator-min-microvolt = <3300000>; 52effb32e9SAswath Govindraju regulator-max-microvolt = <3300000>; 53effb32e9SAswath Govindraju vin-supply = <&evm_12v0>; 54effb32e9SAswath Govindraju regulator-always-on; 55effb32e9SAswath Govindraju regulator-boot-on; 56effb32e9SAswath Govindraju }; 57effb32e9SAswath Govindraju 58effb32e9SAswath Govindraju vsys_5v0: fixedregulator-vsys5v0 { 59effb32e9SAswath Govindraju /* Output of LM5140 */ 60effb32e9SAswath Govindraju compatible = "regulator-fixed"; 61effb32e9SAswath Govindraju regulator-name = "vsys_5v0"; 62effb32e9SAswath Govindraju regulator-min-microvolt = <5000000>; 63effb32e9SAswath Govindraju regulator-max-microvolt = <5000000>; 64effb32e9SAswath Govindraju vin-supply = <&evm_12v0>; 65effb32e9SAswath Govindraju regulator-always-on; 66effb32e9SAswath Govindraju regulator-boot-on; 67effb32e9SAswath Govindraju }; 68effb32e9SAswath Govindraju 69effb32e9SAswath Govindraju vdd_mmc1: fixedregulator-sd { 70effb32e9SAswath Govindraju /* Output of TPS22918 */ 71effb32e9SAswath Govindraju compatible = "regulator-fixed"; 72effb32e9SAswath Govindraju regulator-name = "vdd_mmc1"; 73effb32e9SAswath Govindraju regulator-min-microvolt = <3300000>; 74effb32e9SAswath Govindraju regulator-max-microvolt = <3300000>; 75effb32e9SAswath Govindraju regulator-boot-on; 76effb32e9SAswath Govindraju enable-active-high; 77effb32e9SAswath Govindraju vin-supply = <&vsys_3v3>; 78effb32e9SAswath Govindraju gpio = <&exp2 2 GPIO_ACTIVE_HIGH>; 79effb32e9SAswath Govindraju }; 80effb32e9SAswath Govindraju 81effb32e9SAswath Govindraju vdd_sd_dv: gpio-regulator-TLV71033 { 82effb32e9SAswath Govindraju /* Output of TLV71033 */ 83effb32e9SAswath Govindraju compatible = "regulator-gpio"; 84effb32e9SAswath Govindraju regulator-name = "tlv71033"; 85effb32e9SAswath Govindraju pinctrl-names = "default"; 86effb32e9SAswath Govindraju pinctrl-0 = <&vdd_sd_dv_pins_default>; 87effb32e9SAswath Govindraju regulator-min-microvolt = <1800000>; 88effb32e9SAswath Govindraju regulator-max-microvolt = <3300000>; 89effb32e9SAswath Govindraju regulator-boot-on; 90effb32e9SAswath Govindraju vin-supply = <&vsys_5v0>; 91effb32e9SAswath Govindraju gpios = <&main_gpio0 8 GPIO_ACTIVE_HIGH>; 92effb32e9SAswath Govindraju states = <1800000 0x0>, 93effb32e9SAswath Govindraju <3300000 0x1>; 94effb32e9SAswath Govindraju }; 95effb32e9SAswath Govindraju 96effb32e9SAswath Govindraju transceiver1: can-phy1 { 97effb32e9SAswath Govindraju compatible = "ti,tcan1043"; 98effb32e9SAswath Govindraju #phy-cells = <0>; 99effb32e9SAswath Govindraju max-bitrate = <5000000>; 100effb32e9SAswath Govindraju pinctrl-names = "default"; 101effb32e9SAswath Govindraju pinctrl-0 = <&mcu_mcan0_gpio_pins_default>; 102effb32e9SAswath Govindraju standby-gpios = <&wkup_gpio0 69 GPIO_ACTIVE_LOW>; 103effb32e9SAswath Govindraju enable-gpios = <&wkup_gpio0 0 GPIO_ACTIVE_HIGH>; 104effb32e9SAswath Govindraju }; 105effb32e9SAswath Govindraju 106effb32e9SAswath Govindraju transceiver2: can-phy2 { 107effb32e9SAswath Govindraju compatible = "ti,tcan1042"; 108effb32e9SAswath Govindraju #phy-cells = <0>; 109effb32e9SAswath Govindraju max-bitrate = <5000000>; 110effb32e9SAswath Govindraju pinctrl-names = "default"; 111effb32e9SAswath Govindraju pinctrl-0 = <&mcu_mcan1_gpio_pins_default>; 112effb32e9SAswath Govindraju standby-gpios = <&wkup_gpio0 2 GPIO_ACTIVE_HIGH>; 113effb32e9SAswath Govindraju }; 114effb32e9SAswath Govindraju 11598f3b667SBhavya Kapoor transceiver3: can-phy3 { 11698f3b667SBhavya Kapoor compatible = "ti,tcan1043"; 11798f3b667SBhavya Kapoor #phy-cells = <0>; 11898f3b667SBhavya Kapoor max-bitrate = <5000000>; 11998f3b667SBhavya Kapoor standby-gpios = <&exp2 7 GPIO_ACTIVE_LOW>; 12098f3b667SBhavya Kapoor enable-gpios = <&exp2 6 GPIO_ACTIVE_HIGH>; 12198f3b667SBhavya Kapoor mux-states = <&mux0 1>; 12298f3b667SBhavya Kapoor }; 12398f3b667SBhavya Kapoor 12498f3b667SBhavya Kapoor transceiver4: can-phy4 { 12598f3b667SBhavya Kapoor compatible = "ti,tcan1042"; 12698f3b667SBhavya Kapoor #phy-cells = <0>; 12798f3b667SBhavya Kapoor max-bitrate = <5000000>; 12898f3b667SBhavya Kapoor standby-gpios = <&exp_som 7 GPIO_ACTIVE_HIGH>; 12998f3b667SBhavya Kapoor mux-states = <&mux1 1>; 13098f3b667SBhavya Kapoor }; 131effb32e9SAswath Govindraju}; 132effb32e9SAswath Govindraju 133effb32e9SAswath Govindraju&main_pmx0 { 134a4956811STony Lindgren main_uart8_pins_default: main-uart8-default-pins { 135effb32e9SAswath Govindraju pinctrl-single,pins = < 136effb32e9SAswath Govindraju J721S2_IOPAD(0x040, PIN_INPUT, 14) /* (AC28) MCASP0_AXR0.UART8_CTSn */ 137effb32e9SAswath Govindraju J721S2_IOPAD(0x044, PIN_OUTPUT, 14) /* (Y26) MCASP0_AXR1.UART8_RTSn */ 138effb32e9SAswath Govindraju J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */ 139effb32e9SAswath Govindraju J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */ 140effb32e9SAswath Govindraju >; 141effb32e9SAswath Govindraju }; 142effb32e9SAswath Govindraju 143a4956811STony Lindgren main_i2c3_pins_default: main-i2c3-default-pins { 144effb32e9SAswath Govindraju pinctrl-single,pins = < 145effb32e9SAswath Govindraju J721S2_IOPAD(0x064, PIN_INPUT_PULLUP, 13) /* (W28) MCAN0_TX.I2C3_SCL */ 146effb32e9SAswath Govindraju J721S2_IOPAD(0x060, PIN_INPUT_PULLUP, 13) /* (AC27) MCASP2_AXR1.I2C3_SDA */ 147effb32e9SAswath Govindraju >; 148effb32e9SAswath Govindraju }; 149effb32e9SAswath Govindraju 150a4956811STony Lindgren main_mmc1_pins_default: main-mmc1-default-pins { 151effb32e9SAswath Govindraju pinctrl-single,pins = < 152effb32e9SAswath Govindraju J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */ 153effb32e9SAswath Govindraju J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */ 154effb32e9SAswath Govindraju J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */ 155effb32e9SAswath Govindraju J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */ 156effb32e9SAswath Govindraju J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */ 157effb32e9SAswath Govindraju J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */ 158effb32e9SAswath Govindraju J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */ 159effb32e9SAswath Govindraju J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */ 160effb32e9SAswath Govindraju >; 161effb32e9SAswath Govindraju }; 162effb32e9SAswath Govindraju 163a4956811STony Lindgren vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { 164effb32e9SAswath Govindraju pinctrl-single,pins = < 165effb32e9SAswath Govindraju J721S2_IOPAD(0x020, PIN_INPUT, 7) /* (AA23) MCAN15_RX.GPIO0_8 */ 166effb32e9SAswath Govindraju >; 167effb32e9SAswath Govindraju }; 1687743a9d7SAswath Govindraju 169a4956811STony Lindgren main_usbss0_pins_default: main-usbss0-default-pins { 1707743a9d7SAswath Govindraju pinctrl-single,pins = < 1717743a9d7SAswath Govindraju J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AG25) TIMER_IO1.USB0_DRVVBUS */ 1727743a9d7SAswath Govindraju >; 1737743a9d7SAswath Govindraju }; 17498f3b667SBhavya Kapoor 17598f3b667SBhavya Kapoor main_mcan3_pins_default: main-mcan3-default-pins { 17698f3b667SBhavya Kapoor pinctrl-single,pins = < 17798f3b667SBhavya Kapoor J721S2_IOPAD(0x080, PIN_INPUT, 0) /* (U26) MCASP0_AXR4.MCAN3_RX */ 17898f3b667SBhavya Kapoor J721S2_IOPAD(0x07c, PIN_OUTPUT, 0) /* (T27) MCASP0_AXR3.MCAN3_TX */ 17998f3b667SBhavya Kapoor >; 18098f3b667SBhavya Kapoor }; 18198f3b667SBhavya Kapoor 18298f3b667SBhavya Kapoor main_mcan5_pins_default: main-mcan5-default-pins { 18398f3b667SBhavya Kapoor pinctrl-single,pins = < 18498f3b667SBhavya Kapoor J721S2_IOPAD(0x03c, PIN_INPUT, 0) /* (U27) MCASP0_AFSX.MCAN5_RX */ 18598f3b667SBhavya Kapoor J721S2_IOPAD(0x038, PIN_OUTPUT, 0) /* (AB28) MCASP0_ACLKX.MCAN5_TX */ 18698f3b667SBhavya Kapoor >; 18798f3b667SBhavya Kapoor }; 188effb32e9SAswath Govindraju}; 189effb32e9SAswath Govindraju 1906bc829ceSSinthu Raja&wkup_pmx2 { 191a4956811STony Lindgren wkup_uart0_pins_default: wkup-uart0-default-pins { 192f5e9ee0bSNishanth Menon pinctrl-single,pins = < 193f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (E25) WKUP_GPIO0_6.WKUP_UART0_CTSn */ 194f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (F28) WKUP_GPIO0_7.WKUP_UART0_RTSn */ 195f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (D28) WKUP_UART0_RXD */ 196f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (D27) WKUP_UART0_TXD */ 197f5e9ee0bSNishanth Menon >; 198f5e9ee0bSNishanth Menon }; 199f5e9ee0bSNishanth Menon 200a4956811STony Lindgren mcu_uart0_pins_default: mcu-uart0-default-pins { 201f5e9ee0bSNishanth Menon pinctrl-single,pins = < 202f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B24) WKUP_GPIO0_14.MCU_UART0_CTSn */ 203f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x094, PIN_OUTPUT, 0) /* (D25) WKUP_GPIO0_15.MCU_UART0_RTSn */ 204f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C24) WKUP_GPIO0_13.MCU_UART0_RXD */ 205f5e9ee0bSNishanth Menon J721S2_WKUP_IOPAD(0x088, PIN_OUTPUT, 0) /* (C25) WKUP_GPIO0_12.MCU_UART0_TXD */ 206f5e9ee0bSNishanth Menon >; 207f5e9ee0bSNishanth Menon }; 208f5e9ee0bSNishanth Menon 209a4956811STony Lindgren mcu_cpsw_pins_default: mcu-cpsw-default-pins { 210effb32e9SAswath Govindraju pinctrl-single,pins = < 2116bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x02c, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */ 2126bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */ 2136bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */ 2146bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */ 2156bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */ 2166bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */ 2176bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */ 2186bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */ 2196bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x00c, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */ 2206bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */ 2216bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */ 2226bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */ 223effb32e9SAswath Govindraju >; 224effb32e9SAswath Govindraju }; 225effb32e9SAswath Govindraju 226a4956811STony Lindgren mcu_mdio_pins_default: mcu-mdio-default-pins { 227effb32e9SAswath Govindraju pinctrl-single,pins = < 2286bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */ 2296bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */ 230effb32e9SAswath Govindraju >; 231effb32e9SAswath Govindraju }; 232effb32e9SAswath Govindraju 233a4956811STony Lindgren mcu_mcan0_pins_default: mcu-mcan0-default-pins { 234effb32e9SAswath Govindraju pinctrl-single,pins = < 2356bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (E28) MCU_MCAN0_RX */ 2366bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x050, PIN_OUTPUT, 0) /* (E27) MCU_MCAN0_TX */ 237effb32e9SAswath Govindraju >; 238effb32e9SAswath Govindraju }; 239effb32e9SAswath Govindraju 240a4956811STony Lindgren mcu_mcan1_pins_default: mcu-mcan1-default-pins { 241effb32e9SAswath Govindraju pinctrl-single,pins = < 2426bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (F26) WKUP_GPIO0_5.MCU_MCAN1_RX */ 2436bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /*(C23) WKUP_GPIO0_4.MCU_MCAN1_TX */ 244effb32e9SAswath Govindraju >; 245effb32e9SAswath Govindraju }; 246effb32e9SAswath Govindraju 247a4956811STony Lindgren mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins { 248effb32e9SAswath Govindraju pinctrl-single,pins = < 2496bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x058, PIN_INPUT, 7) /* (D26) WKUP_GPIO0_0 */ 2506bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x040, PIN_INPUT, 7) /* (B25) MCU_SPI0_D1.WKUP_GPIO0_69 */ 251effb32e9SAswath Govindraju >; 252effb32e9SAswath Govindraju }; 253effb32e9SAswath Govindraju 254a4956811STony Lindgren mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-default-pins { 255effb32e9SAswath Govindraju pinctrl-single,pins = < 2566bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x060, PIN_INPUT, 7) /* (C28) WKUP_GPIO0_2 */ 257effb32e9SAswath Govindraju >; 258effb32e9SAswath Govindraju }; 259cf2aacfeSBhavya Kapoor 260a4956811STony Lindgren mcu_adc0_pins_default: mcu-adc0-default-pins { 261cf2aacfeSBhavya Kapoor pinctrl-single,pins = < 2626bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0cc, PIN_INPUT, 0) /* (L25) MCU_ADC0_AIN0 */ 2636bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0d0, PIN_INPUT, 0) /* (K25) MCU_ADC0_AIN1 */ 2646bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0d4, PIN_INPUT, 0) /* (M24) MCU_ADC0_AIN2 */ 2656bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0d8, PIN_INPUT, 0) /* (L24) MCU_ADC0_AIN3 */ 2666bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0dc, PIN_INPUT, 0) /* (L27) MCU_ADC0_AIN4 */ 2676bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0e0, PIN_INPUT, 0) /* (K24) MCU_ADC0_AIN5 */ 2686bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0e4, PIN_INPUT, 0) /* (M27) MCU_ADC0_AIN6 */ 2696bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0e8, PIN_INPUT, 0) /* (M26) MCU_ADC0_AIN7 */ 270cf2aacfeSBhavya Kapoor >; 271cf2aacfeSBhavya Kapoor }; 272cf2aacfeSBhavya Kapoor 273a4956811STony Lindgren mcu_adc1_pins_default: mcu-adc1-default-pins { 274cf2aacfeSBhavya Kapoor pinctrl-single,pins = < 2756bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0ec, PIN_INPUT, 0) /* (P25) MCU_ADC1_AIN0 */ 2766bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0f0, PIN_INPUT, 0) /* (R25) MCU_ADC1_AIN1 */ 2776bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0f4, PIN_INPUT, 0) /* (P28) MCU_ADC1_AIN2 */ 2786bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0f8, PIN_INPUT, 0) /* (P27) MCU_ADC1_AIN3 */ 2796bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x0fc, PIN_INPUT, 0) /* (N25) MCU_ADC1_AIN4 */ 2806bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x100, PIN_INPUT, 0) /* (P26) MCU_ADC1_AIN5 */ 2816bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x104, PIN_INPUT, 0) /* (N26) MCU_ADC1_AIN6 */ 2826bc829ceSSinthu Raja J721S2_WKUP_IOPAD(0x108, PIN_INPUT, 0) /* (N27) MCU_ADC1_AIN7 */ 283cf2aacfeSBhavya Kapoor >; 284cf2aacfeSBhavya Kapoor }; 28506c4e7aaSUdit Kumar}; 286bbabba4eSAswath Govindraju 28706c4e7aaSUdit Kumar&wkup_pmx1 { 288a4956811STony Lindgren mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins { 289bbabba4eSAswath Govindraju pinctrl-single,pins = < 29006c4e7aaSUdit Kumar J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (A19) MCU_OSPI1_CLK */ 29106c4e7aaSUdit Kumar J721S2_WKUP_IOPAD(0x024, PIN_OUTPUT, 0) /* (D20) MCU_OSPI1_CSn0 */ 29206c4e7aaSUdit Kumar J721S2_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (D21) MCU_OSPI1_D0 */ 29306c4e7aaSUdit Kumar J721S2_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (G20) MCU_OSPI1_D1 */ 29406c4e7aaSUdit Kumar J721S2_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (C20) MCU_OSPI1_D2 */ 29506c4e7aaSUdit Kumar J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (A20) MCU_OSPI1_D3 */ 29606c4e7aaSUdit Kumar J721S2_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (B19) MCU_OSPI1_DQS */ 29706c4e7aaSUdit Kumar J721S2_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (B20) MCU_OSPI1_LBCLKO */ 298bbabba4eSAswath Govindraju >; 299bbabba4eSAswath Govindraju }; 300effb32e9SAswath Govindraju}; 301effb32e9SAswath Govindraju 302*578bf4d0SAndrew Davis&main_gpio0 { 303*578bf4d0SAndrew Davis status = "okay"; 304effb32e9SAswath Govindraju}; 305effb32e9SAswath Govindraju 306*578bf4d0SAndrew Davis&wkup_gpio0 { 307*578bf4d0SAndrew Davis status = "okay"; 308effb32e9SAswath Govindraju}; 309effb32e9SAswath Govindraju 310effb32e9SAswath Govindraju&wkup_uart0 { 311effb32e9SAswath Govindraju status = "reserved"; 312f5e9ee0bSNishanth Menon pinctrl-names = "default"; 313f5e9ee0bSNishanth Menon pinctrl-0 = <&wkup_uart0_pins_default>; 314effb32e9SAswath Govindraju}; 315effb32e9SAswath Govindraju 3160e63f35aSAndrew Davis&mcu_uart0 { 3170e63f35aSAndrew Davis status = "okay"; 318f5e9ee0bSNishanth Menon pinctrl-names = "default"; 319f5e9ee0bSNishanth Menon pinctrl-0 = <&mcu_uart0_pins_default>; 320effb32e9SAswath Govindraju}; 321effb32e9SAswath Govindraju 322effb32e9SAswath Govindraju&main_uart8 { 3230e63f35aSAndrew Davis status = "okay"; 324effb32e9SAswath Govindraju pinctrl-names = "default"; 325effb32e9SAswath Govindraju pinctrl-0 = <&main_uart8_pins_default>; 326effb32e9SAswath Govindraju /* Shared with TFA on this platform */ 327effb32e9SAswath Govindraju power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>; 328effb32e9SAswath Govindraju}; 329effb32e9SAswath Govindraju 330effb32e9SAswath Govindraju&main_i2c0 { 331effb32e9SAswath Govindraju clock-frequency = <400000>; 332effb32e9SAswath Govindraju 333effb32e9SAswath Govindraju exp1: gpio@20 { 334effb32e9SAswath Govindraju compatible = "ti,tca6416"; 335effb32e9SAswath Govindraju reg = <0x20>; 336effb32e9SAswath Govindraju gpio-controller; 337effb32e9SAswath Govindraju #gpio-cells = <2>; 338effb32e9SAswath Govindraju gpio-line-names = "PCIE_2L_MODE_SEL", "PCIE_2L_PERSTZ", "PCIE_2L_RC_RSTZ", 339effb32e9SAswath Govindraju "PCIE_2L_EP_RST_EN", "PCIE_1L_MODE_SEL", "PCIE_1L_PERSTZ", 340effb32e9SAswath Govindraju "PCIE_1L_RC_RSTZ", "PCIE_1L_EP_RST_EN", "PCIE_2L_PRSNT#", 341effb32e9SAswath Govindraju "PCIE_1L_PRSNT#", "CDCI1_OE1/OE4", "CDCI1_OE2/OE3", "EXP_MUX1", 342effb32e9SAswath Govindraju "EXP_MUX2", "EXP_MUX3", "GESI_EXP_PHY_RSTz"; 343effb32e9SAswath Govindraju }; 344effb32e9SAswath Govindraju 345effb32e9SAswath Govindraju exp2: gpio@22 { 346effb32e9SAswath Govindraju compatible = "ti,tca6424"; 347effb32e9SAswath Govindraju reg = <0x22>; 348effb32e9SAswath Govindraju gpio-controller; 349effb32e9SAswath Govindraju #gpio-cells = <2>; 350effb32e9SAswath Govindraju gpio-line-names = "APPLE_AUTH_RSTZ", "MLB_RSTZ", "GPIO_USD_PWR_EN", "USBC_PWR_EN", 351effb32e9SAswath Govindraju "USBC_MODE_SEL1", "USBC_MODE_SEL0", "MCAN0_EN", "MCAN0_STB#", 352effb32e9SAswath Govindraju "MUX_SPAREMUX_SPARE", "MCASP/TRACE_MUX_S0", "MCASP/TRACE_MUX_S1", 353effb32e9SAswath Govindraju "MLB_MUX_SEL", "MCAN_MUX_SEL", "MCASP2/SPI3_MUX_SEL", "PCIe_CLKREQn_MUX_SEL", 354effb32e9SAswath Govindraju "CDCI2_RSTZ", "ENET_EXP_PWRDN", "ENET_EXP_RESETZ", "ENET_I2CMUX_SEL", 355effb32e9SAswath Govindraju "ENET_EXP_SPARE2", "M2PCIE_RTSZ", "USER_INPUT1", "USER_LED1", "USER_LED2"; 356effb32e9SAswath Govindraju }; 357effb32e9SAswath Govindraju}; 358effb32e9SAswath Govindraju 359effb32e9SAswath Govindraju&main_sdhci0 { 360effb32e9SAswath Govindraju /* eMMC */ 3615f715be3SAndrew Davis status = "okay"; 362effb32e9SAswath Govindraju non-removable; 363effb32e9SAswath Govindraju ti,driver-strength-ohm = <50>; 364effb32e9SAswath Govindraju disable-wp; 365effb32e9SAswath Govindraju}; 366effb32e9SAswath Govindraju 367effb32e9SAswath Govindraju&main_sdhci1 { 368effb32e9SAswath Govindraju /* SD card */ 3695f715be3SAndrew Davis status = "okay"; 370effb32e9SAswath Govindraju pinctrl-0 = <&main_mmc1_pins_default>; 371effb32e9SAswath Govindraju pinctrl-names = "default"; 372effb32e9SAswath Govindraju disable-wp; 373effb32e9SAswath Govindraju vmmc-supply = <&vdd_mmc1>; 374effb32e9SAswath Govindraju vqmmc-supply = <&vdd_sd_dv>; 375effb32e9SAswath Govindraju}; 376effb32e9SAswath Govindraju 377effb32e9SAswath Govindraju&mcu_cpsw { 378effb32e9SAswath Govindraju pinctrl-names = "default"; 3796a2baa85SNishanth Menon pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>; 380effb32e9SAswath Govindraju}; 381effb32e9SAswath Govindraju 382effb32e9SAswath Govindraju&davinci_mdio { 383effb32e9SAswath Govindraju phy0: ethernet-phy@0 { 384effb32e9SAswath Govindraju reg = <0>; 385effb32e9SAswath Govindraju ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 386effb32e9SAswath Govindraju ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 387effb32e9SAswath Govindraju ti,min-output-impedance; 388effb32e9SAswath Govindraju }; 389effb32e9SAswath Govindraju}; 390effb32e9SAswath Govindraju 391effb32e9SAswath Govindraju&cpsw_port1 { 392effb32e9SAswath Govindraju phy-mode = "rgmii-rxid"; 393effb32e9SAswath Govindraju phy-handle = <&phy0>; 394effb32e9SAswath Govindraju}; 395effb32e9SAswath Govindraju 396da61731dSAswath Govindraju&serdes_ln_ctrl { 397da61731dSAswath Govindraju idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_USB>, 398da61731dSAswath Govindraju <J721S2_SERDES0_LANE2_EDP_LANE2>, <J721S2_SERDES0_LANE3_EDP_LANE3>; 399da61731dSAswath Govindraju}; 400da61731dSAswath Govindraju 401da61731dSAswath Govindraju&serdes_refclk { 402da61731dSAswath Govindraju clock-frequency = <100000000>; 403da61731dSAswath Govindraju}; 404da61731dSAswath Govindraju 405da61731dSAswath Govindraju&serdes0 { 406da61731dSAswath Govindraju status = "okay"; 407da61731dSAswath Govindraju serdes0_pcie_link: phy@0 { 408da61731dSAswath Govindraju reg = <0>; 409da61731dSAswath Govindraju cdns,num-lanes = <1>; 410da61731dSAswath Govindraju #phy-cells = <0>; 411da61731dSAswath Govindraju cdns,phy-type = <PHY_TYPE_PCIE>; 412da61731dSAswath Govindraju resets = <&serdes_wiz0 1>; 413da61731dSAswath Govindraju }; 414da61731dSAswath Govindraju}; 415da61731dSAswath Govindraju 4167743a9d7SAswath Govindraju&usb_serdes_mux { 4177743a9d7SAswath Govindraju idle-states = <1>; /* USB0 to SERDES lane 1 */ 4187743a9d7SAswath Govindraju}; 4197743a9d7SAswath Govindraju 4207743a9d7SAswath Govindraju&usbss0 { 4217743a9d7SAswath Govindraju status = "okay"; 4227743a9d7SAswath Govindraju pinctrl-0 = <&main_usbss0_pins_default>; 4237743a9d7SAswath Govindraju pinctrl-names = "default"; 4247743a9d7SAswath Govindraju ti,vbus-divider; 4257743a9d7SAswath Govindraju ti,usb2-only; 4267743a9d7SAswath Govindraju}; 4277743a9d7SAswath Govindraju 4287743a9d7SAswath Govindraju&usb0 { 4297743a9d7SAswath Govindraju dr_mode = "otg"; 4307743a9d7SAswath Govindraju maximum-speed = "high-speed"; 4317743a9d7SAswath Govindraju}; 4327743a9d7SAswath Govindraju 433bbabba4eSAswath Govindraju&ospi1 { 434bbabba4eSAswath Govindraju status = "okay"; 435bbabba4eSAswath Govindraju pinctrl-names = "default"; 436bbabba4eSAswath Govindraju pinctrl-0 = <&mcu_fss0_ospi1_pins_default>; 437bbabba4eSAswath Govindraju 438bbabba4eSAswath Govindraju flash@0 { 439bbabba4eSAswath Govindraju compatible = "jedec,spi-nor"; 440bbabba4eSAswath Govindraju reg = <0x0>; 441bbabba4eSAswath Govindraju spi-tx-bus-width = <1>; 442bbabba4eSAswath Govindraju spi-rx-bus-width = <4>; 443bbabba4eSAswath Govindraju spi-max-frequency = <40000000>; 444bbabba4eSAswath Govindraju cdns,tshsl-ns = <60>; 445bbabba4eSAswath Govindraju cdns,tsd2d-ns = <60>; 446bbabba4eSAswath Govindraju cdns,tchsh-ns = <60>; 447bbabba4eSAswath Govindraju cdns,tslch-ns = <60>; 448bbabba4eSAswath Govindraju cdns,read-delay = <2>; 449bbabba4eSAswath Govindraju }; 450bbabba4eSAswath Govindraju}; 451bbabba4eSAswath Govindraju 452715084ecSAswath Govindraju&pcie1_rc { 453715084ecSAswath Govindraju status = "okay"; 454715084ecSAswath Govindraju reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>; 455715084ecSAswath Govindraju phys = <&serdes0_pcie_link>; 456715084ecSAswath Govindraju phy-names = "pcie-phy"; 457715084ecSAswath Govindraju num-lanes = <1>; 458715084ecSAswath Govindraju}; 459715084ecSAswath Govindraju 460effb32e9SAswath Govindraju&mcu_mcan0 { 46106639b8aSAndrew Davis status = "okay"; 462effb32e9SAswath Govindraju pinctrl-names = "default"; 463effb32e9SAswath Govindraju pinctrl-0 = <&mcu_mcan0_pins_default>; 464effb32e9SAswath Govindraju phys = <&transceiver1>; 465effb32e9SAswath Govindraju}; 466effb32e9SAswath Govindraju 467effb32e9SAswath Govindraju&mcu_mcan1 { 46806639b8aSAndrew Davis status = "okay"; 469effb32e9SAswath Govindraju pinctrl-names = "default"; 470effb32e9SAswath Govindraju pinctrl-0 = <&mcu_mcan1_pins_default>; 471effb32e9SAswath Govindraju phys = <&transceiver2>; 472effb32e9SAswath Govindraju}; 473cf2aacfeSBhavya Kapoor 474cf2aacfeSBhavya Kapoor&tscadc0 { 475cf2aacfeSBhavya Kapoor pinctrl-0 = <&mcu_adc0_pins_default>; 476cf2aacfeSBhavya Kapoor pinctrl-names = "default"; 477cf2aacfeSBhavya Kapoor status = "okay"; 478cf2aacfeSBhavya Kapoor adc { 479cf2aacfeSBhavya Kapoor ti,adc-channels = <0 1 2 3 4 5 6 7>; 480cf2aacfeSBhavya Kapoor }; 481cf2aacfeSBhavya Kapoor}; 482cf2aacfeSBhavya Kapoor 483cf2aacfeSBhavya Kapoor&tscadc1 { 484cf2aacfeSBhavya Kapoor pinctrl-0 = <&mcu_adc1_pins_default>; 485cf2aacfeSBhavya Kapoor pinctrl-names = "default"; 486cf2aacfeSBhavya Kapoor status = "okay"; 487cf2aacfeSBhavya Kapoor adc { 488cf2aacfeSBhavya Kapoor ti,adc-channels = <0 1 2 3 4 5 6 7>; 489cf2aacfeSBhavya Kapoor }; 490cf2aacfeSBhavya Kapoor}; 49198f3b667SBhavya Kapoor 49298f3b667SBhavya Kapoor&main_mcan3 { 49398f3b667SBhavya Kapoor status = "okay"; 49498f3b667SBhavya Kapoor pinctrl-names = "default"; 49598f3b667SBhavya Kapoor pinctrl-0 = <&main_mcan3_pins_default>; 49698f3b667SBhavya Kapoor phys = <&transceiver3>; 49798f3b667SBhavya Kapoor}; 49898f3b667SBhavya Kapoor 49998f3b667SBhavya Kapoor&main_mcan5 { 50098f3b667SBhavya Kapoor status = "okay"; 50198f3b667SBhavya Kapoor pinctrl-names = "default"; 50298f3b667SBhavya Kapoor pinctrl-0 = <&main_mcan5_pins_default>; 50398f3b667SBhavya Kapoor phys = <&transceiver4>; 50498f3b667SBhavya Kapoor}; 505