126bd3f31SLokesh Vutla// SPDX-License-Identifier: GPL-2.0
226bd3f31SLokesh Vutla/*
326bd3f31SLokesh Vutla * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
426bd3f31SLokesh Vutla */
526bd3f31SLokesh Vutla
626bd3f31SLokesh Vutla/dts-v1/;
726bd3f31SLokesh Vutla
826bd3f31SLokesh Vutla#include "k3-j7200-som-p0.dtsi"
9fc3b1550SGrygorii Strashko#include <dt-bindings/net/ti-dp83867.h>
1026bd3f31SLokesh Vutla
1126bd3f31SLokesh Vutla/ {
1226bd3f31SLokesh Vutla	chosen {
1326bd3f31SLokesh Vutla		stdout-path = "serial2:115200n8";
1426bd3f31SLokesh Vutla		bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
1526bd3f31SLokesh Vutla	};
1626bd3f31SLokesh Vutla};
1726bd3f31SLokesh Vutla
18fc3b1550SGrygorii Strashko&wkup_pmx0 {
19fc3b1550SGrygorii Strashko	mcu_cpsw_pins_default: mcu-cpsw-pins-default {
20fc3b1550SGrygorii Strashko		pinctrl-single,pins = <
21fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */
22fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x006c, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */
23fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */
24fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x0074, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */
25fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x0078, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */
26fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x007c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */
27fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */
28fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x008c, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */
29fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x0090, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */
30fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x0094, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */
31fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* MCU_RGMII1_TXC */
32fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* MCU_RGMII1_RXC */
33fc3b1550SGrygorii Strashko		>;
34fc3b1550SGrygorii Strashko	};
35fc3b1550SGrygorii Strashko
36fc3b1550SGrygorii Strashko	mcu_mdio_pins_default: mcu-mdio1-pins-default {
37fc3b1550SGrygorii Strashko		pinctrl-single,pins = <
38fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
39fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x0098, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
40fc3b1550SGrygorii Strashko		>;
41fc3b1550SGrygorii Strashko	};
42fc3b1550SGrygorii Strashko};
43fc3b1550SGrygorii Strashko
4426bd3f31SLokesh Vutla&wkup_uart0 {
4526bd3f31SLokesh Vutla	/* Wakeup UART is used by System firmware */
4626bd3f31SLokesh Vutla	status = "disabled";
4726bd3f31SLokesh Vutla};
4826bd3f31SLokesh Vutla
4926bd3f31SLokesh Vutla&main_uart0 {
5026bd3f31SLokesh Vutla	/* Shared with ATF on this platform */
5126bd3f31SLokesh Vutla	power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
5226bd3f31SLokesh Vutla};
5326bd3f31SLokesh Vutla
5426bd3f31SLokesh Vutla&main_uart2 {
5526bd3f31SLokesh Vutla	/* MAIN UART 2 is used by R5F firmware */
5626bd3f31SLokesh Vutla	status = "disabled";
5726bd3f31SLokesh Vutla};
5826bd3f31SLokesh Vutla
5926bd3f31SLokesh Vutla&main_uart3 {
6026bd3f31SLokesh Vutla	/* UART not brought out */
6126bd3f31SLokesh Vutla	status = "disabled";
6226bd3f31SLokesh Vutla};
6326bd3f31SLokesh Vutla
6426bd3f31SLokesh Vutla&main_uart4 {
6526bd3f31SLokesh Vutla	/* UART not brought out */
6626bd3f31SLokesh Vutla	status = "disabled";
6726bd3f31SLokesh Vutla};
6826bd3f31SLokesh Vutla
6926bd3f31SLokesh Vutla&main_uart5 {
7026bd3f31SLokesh Vutla	/* UART not brought out */
7126bd3f31SLokesh Vutla	status = "disabled";
7226bd3f31SLokesh Vutla};
7326bd3f31SLokesh Vutla
7426bd3f31SLokesh Vutla&main_uart6 {
7526bd3f31SLokesh Vutla	/* UART not brought out */
7626bd3f31SLokesh Vutla	status = "disabled";
7726bd3f31SLokesh Vutla};
7826bd3f31SLokesh Vutla
7926bd3f31SLokesh Vutla&main_uart7 {
8026bd3f31SLokesh Vutla	/* UART not brought out */
8126bd3f31SLokesh Vutla	status = "disabled";
8226bd3f31SLokesh Vutla};
8326bd3f31SLokesh Vutla
8426bd3f31SLokesh Vutla&main_uart8 {
8526bd3f31SLokesh Vutla	/* UART not brought out */
8626bd3f31SLokesh Vutla	status = "disabled";
8726bd3f31SLokesh Vutla};
8826bd3f31SLokesh Vutla
8926bd3f31SLokesh Vutla&main_uart9 {
9026bd3f31SLokesh Vutla	/* UART not brought out */
9126bd3f31SLokesh Vutla	status = "disabled";
9226bd3f31SLokesh Vutla};
93fc3b1550SGrygorii Strashko
94fc3b1550SGrygorii Strashko&mcu_cpsw {
95fc3b1550SGrygorii Strashko	pinctrl-names = "default";
96fc3b1550SGrygorii Strashko	pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
97fc3b1550SGrygorii Strashko};
98fc3b1550SGrygorii Strashko
99fc3b1550SGrygorii Strashko&davinci_mdio {
100fc3b1550SGrygorii Strashko	phy0: ethernet-phy@0 {
101fc3b1550SGrygorii Strashko		reg = <0>;
102fc3b1550SGrygorii Strashko		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
103fc3b1550SGrygorii Strashko		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
104fc3b1550SGrygorii Strashko	};
105fc3b1550SGrygorii Strashko};
106fc3b1550SGrygorii Strashko
107fc3b1550SGrygorii Strashko&cpsw_port1 {
108fc3b1550SGrygorii Strashko	phy-mode = "rgmii-rxid";
109fc3b1550SGrygorii Strashko	phy-handle = <&phy0>;
110fc3b1550SGrygorii Strashko};
111