126bd3f31SLokesh Vutla// SPDX-License-Identifier: GPL-2.0 226bd3f31SLokesh Vutla/* 326bd3f31SLokesh Vutla * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ 426bd3f31SLokesh Vutla */ 526bd3f31SLokesh Vutla 626bd3f31SLokesh Vutla/dts-v1/; 726bd3f31SLokesh Vutla 826bd3f31SLokesh Vutla#include "k3-j7200-som-p0.dtsi" 9fc3b1550SGrygorii Strashko#include <dt-bindings/net/ti-dp83867.h> 10e38a45b0SKishon Vijay Abraham I#include <dt-bindings/mux/ti-serdes.h> 1126bd3f31SLokesh Vutla 1226bd3f31SLokesh Vutla/ { 1326bd3f31SLokesh Vutla chosen { 1426bd3f31SLokesh Vutla stdout-path = "serial2:115200n8"; 1526bd3f31SLokesh Vutla bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000"; 1626bd3f31SLokesh Vutla }; 1726bd3f31SLokesh Vutla}; 1826bd3f31SLokesh Vutla 19fc3b1550SGrygorii Strashko&wkup_pmx0 { 20fc3b1550SGrygorii Strashko mcu_cpsw_pins_default: mcu-cpsw-pins-default { 21fc3b1550SGrygorii Strashko pinctrl-single,pins = < 22fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */ 23fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x006c, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */ 24fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */ 25fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x0074, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */ 26fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x0078, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */ 27fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x007c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */ 28fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */ 29fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x008c, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */ 30fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x0090, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */ 31fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x0094, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */ 32fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* MCU_RGMII1_TXC */ 33fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* MCU_RGMII1_RXC */ 34fc3b1550SGrygorii Strashko >; 35fc3b1550SGrygorii Strashko }; 36fc3b1550SGrygorii Strashko 37fc3b1550SGrygorii Strashko mcu_mdio_pins_default: mcu-mdio1-pins-default { 38fc3b1550SGrygorii Strashko pinctrl-single,pins = < 39fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */ 40fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x0098, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */ 41fc3b1550SGrygorii Strashko >; 42fc3b1550SGrygorii Strashko }; 43fc3b1550SGrygorii Strashko}; 44fc3b1550SGrygorii Strashko 45e25889f8SVignesh Raghavendra&main_pmx0 { 46e25889f8SVignesh Raghavendra main_i2c0_pins_default: main-i2c0-pins-default { 47e25889f8SVignesh Raghavendra pinctrl-single,pins = < 48e25889f8SVignesh Raghavendra J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */ 49e25889f8SVignesh Raghavendra J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */ 50e25889f8SVignesh Raghavendra >; 51e25889f8SVignesh Raghavendra }; 52e25889f8SVignesh Raghavendra 53e25889f8SVignesh Raghavendra main_i2c1_pins_default: main-i2c1-pins-default { 54e25889f8SVignesh Raghavendra pinctrl-single,pins = < 55e25889f8SVignesh Raghavendra J721E_IOPAD(0xdc, PIN_INPUT_PULLUP, 3) /* (U3) ECAP0_IN_APWM_OUT.I2C1_SCL */ 56e25889f8SVignesh Raghavendra J721E_IOPAD(0xe0, PIN_INPUT_PULLUP, 3) /* (T3) EXT_REFCLK1.I2C1_SDA */ 57e25889f8SVignesh Raghavendra >; 58e25889f8SVignesh Raghavendra }; 59a2178b83SFaiz Abbas 60a2178b83SFaiz Abbas main_mmc1_pins_default: main-mmc1-pins-default { 61a2178b83SFaiz Abbas pinctrl-single,pins = < 62a2178b83SFaiz Abbas J721E_IOPAD(0x104, PIN_INPUT, 0) /* (M20) MMC1_CMD */ 63a2178b83SFaiz Abbas J721E_IOPAD(0x100, PIN_INPUT, 0) /* (P21) MMC1_CLK */ 64a2178b83SFaiz Abbas J721E_IOPAD(0xfc, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */ 65a2178b83SFaiz Abbas J721E_IOPAD(0xf8, PIN_INPUT, 0) /* (M19) MMC1_DAT0 */ 66a2178b83SFaiz Abbas J721E_IOPAD(0xf4, PIN_INPUT, 0) /* (N21) MMC1_DAT1 */ 67a2178b83SFaiz Abbas J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */ 68a2178b83SFaiz Abbas J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */ 69a2178b83SFaiz Abbas J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */ 70a2178b83SFaiz Abbas >; 71a2178b83SFaiz Abbas }; 72e25889f8SVignesh Raghavendra}; 73e25889f8SVignesh Raghavendra 7426bd3f31SLokesh Vutla&wkup_uart0 { 7526bd3f31SLokesh Vutla /* Wakeup UART is used by System firmware */ 7626bd3f31SLokesh Vutla status = "disabled"; 7726bd3f31SLokesh Vutla}; 7826bd3f31SLokesh Vutla 7926bd3f31SLokesh Vutla&main_uart0 { 8026bd3f31SLokesh Vutla /* Shared with ATF on this platform */ 8126bd3f31SLokesh Vutla power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>; 8226bd3f31SLokesh Vutla}; 8326bd3f31SLokesh Vutla 8426bd3f31SLokesh Vutla&main_uart2 { 8526bd3f31SLokesh Vutla /* MAIN UART 2 is used by R5F firmware */ 8626bd3f31SLokesh Vutla status = "disabled"; 8726bd3f31SLokesh Vutla}; 8826bd3f31SLokesh Vutla 8926bd3f31SLokesh Vutla&main_uart3 { 9026bd3f31SLokesh Vutla /* UART not brought out */ 9126bd3f31SLokesh Vutla status = "disabled"; 9226bd3f31SLokesh Vutla}; 9326bd3f31SLokesh Vutla 9426bd3f31SLokesh Vutla&main_uart4 { 9526bd3f31SLokesh Vutla /* UART not brought out */ 9626bd3f31SLokesh Vutla status = "disabled"; 9726bd3f31SLokesh Vutla}; 9826bd3f31SLokesh Vutla 9926bd3f31SLokesh Vutla&main_uart5 { 10026bd3f31SLokesh Vutla /* UART not brought out */ 10126bd3f31SLokesh Vutla status = "disabled"; 10226bd3f31SLokesh Vutla}; 10326bd3f31SLokesh Vutla 10426bd3f31SLokesh Vutla&main_uart6 { 10526bd3f31SLokesh Vutla /* UART not brought out */ 10626bd3f31SLokesh Vutla status = "disabled"; 10726bd3f31SLokesh Vutla}; 10826bd3f31SLokesh Vutla 10926bd3f31SLokesh Vutla&main_uart7 { 11026bd3f31SLokesh Vutla /* UART not brought out */ 11126bd3f31SLokesh Vutla status = "disabled"; 11226bd3f31SLokesh Vutla}; 11326bd3f31SLokesh Vutla 11426bd3f31SLokesh Vutla&main_uart8 { 11526bd3f31SLokesh Vutla /* UART not brought out */ 11626bd3f31SLokesh Vutla status = "disabled"; 11726bd3f31SLokesh Vutla}; 11826bd3f31SLokesh Vutla 11926bd3f31SLokesh Vutla&main_uart9 { 12026bd3f31SLokesh Vutla /* UART not brought out */ 12126bd3f31SLokesh Vutla status = "disabled"; 12226bd3f31SLokesh Vutla}; 123fc3b1550SGrygorii Strashko 124fc3b1550SGrygorii Strashko&mcu_cpsw { 125fc3b1550SGrygorii Strashko pinctrl-names = "default"; 126fc3b1550SGrygorii Strashko pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>; 127fc3b1550SGrygorii Strashko}; 128fc3b1550SGrygorii Strashko 129fc3b1550SGrygorii Strashko&davinci_mdio { 130fc3b1550SGrygorii Strashko phy0: ethernet-phy@0 { 131fc3b1550SGrygorii Strashko reg = <0>; 132fc3b1550SGrygorii Strashko ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 133fc3b1550SGrygorii Strashko ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 134fc3b1550SGrygorii Strashko }; 135fc3b1550SGrygorii Strashko}; 136fc3b1550SGrygorii Strashko 137fc3b1550SGrygorii Strashko&cpsw_port1 { 138fc3b1550SGrygorii Strashko phy-mode = "rgmii-rxid"; 139fc3b1550SGrygorii Strashko phy-handle = <&phy0>; 140fc3b1550SGrygorii Strashko}; 141e25889f8SVignesh Raghavendra 142e25889f8SVignesh Raghavendra&main_i2c0 { 143e25889f8SVignesh Raghavendra pinctrl-names = "default"; 144e25889f8SVignesh Raghavendra pinctrl-0 = <&main_i2c0_pins_default>; 145e25889f8SVignesh Raghavendra clock-frequency = <400000>; 146e25889f8SVignesh Raghavendra 147e25889f8SVignesh Raghavendra exp1: gpio@20 { 148e25889f8SVignesh Raghavendra compatible = "ti,tca6416"; 149e25889f8SVignesh Raghavendra reg = <0x20>; 150e25889f8SVignesh Raghavendra gpio-controller; 151e25889f8SVignesh Raghavendra #gpio-cells = <2>; 152e25889f8SVignesh Raghavendra }; 153e25889f8SVignesh Raghavendra 154e25889f8SVignesh Raghavendra exp2: gpio@22 { 155e25889f8SVignesh Raghavendra compatible = "ti,tca6424"; 156e25889f8SVignesh Raghavendra reg = <0x22>; 157e25889f8SVignesh Raghavendra gpio-controller; 158e25889f8SVignesh Raghavendra #gpio-cells = <2>; 159e25889f8SVignesh Raghavendra }; 160e25889f8SVignesh Raghavendra}; 161e25889f8SVignesh Raghavendra 162e25889f8SVignesh Raghavendra&main_i2c1 { 163e25889f8SVignesh Raghavendra pinctrl-names = "default"; 164e25889f8SVignesh Raghavendra pinctrl-0 = <&main_i2c1_pins_default>; 165e25889f8SVignesh Raghavendra clock-frequency = <400000>; 166e25889f8SVignesh Raghavendra 167e25889f8SVignesh Raghavendra exp4: gpio@20 { 168e25889f8SVignesh Raghavendra compatible = "ti,tca6408"; 169e25889f8SVignesh Raghavendra reg = <0x20>; 170e25889f8SVignesh Raghavendra gpio-controller; 171e25889f8SVignesh Raghavendra #gpio-cells = <2>; 172e25889f8SVignesh Raghavendra }; 173e25889f8SVignesh Raghavendra}; 174a2178b83SFaiz Abbas 175a2178b83SFaiz Abbas&main_sdhci0 { 176a2178b83SFaiz Abbas /* eMMC */ 177a2178b83SFaiz Abbas non-removable; 178a2178b83SFaiz Abbas ti,driver-strength-ohm = <50>; 179a2178b83SFaiz Abbas disable-wp; 180a2178b83SFaiz Abbas}; 181a2178b83SFaiz Abbas 182a2178b83SFaiz Abbas&main_sdhci1 { 183a2178b83SFaiz Abbas /* SD card */ 184a2178b83SFaiz Abbas pinctrl-0 = <&main_mmc1_pins_default>; 185a2178b83SFaiz Abbas pinctrl-names = "default"; 186a2178b83SFaiz Abbas ti,driver-strength-ohm = <50>; 187a2178b83SFaiz Abbas disable-wp; 188a2178b83SFaiz Abbas}; 189e38a45b0SKishon Vijay Abraham I 190e38a45b0SKishon Vijay Abraham I&serdes_ln_ctrl { 191e38a45b0SKishon Vijay Abraham I idle-states = <J7200_SERDES0_LANE0_PCIE1_LANE0>, <J7200_SERDES0_LANE1_PCIE1_LANE1>, 192e38a45b0SKishon Vijay Abraham I <J7200_SERDES0_LANE2_QSGMII_LANE1>, <J7200_SERDES0_LANE3_IP4_UNUSED>; 193e38a45b0SKishon Vijay Abraham I}; 194