126bd3f31SLokesh Vutla// SPDX-License-Identifier: GPL-2.0
226bd3f31SLokesh Vutla/*
326bd3f31SLokesh Vutla * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
426bd3f31SLokesh Vutla */
526bd3f31SLokesh Vutla
626bd3f31SLokesh Vutla/dts-v1/;
726bd3f31SLokesh Vutla
826bd3f31SLokesh Vutla#include "k3-j7200-som-p0.dtsi"
93a6319dfSKishon Vijay Abraham I#include <dt-bindings/gpio/gpio.h>
10fc3b1550SGrygorii Strashko#include <dt-bindings/net/ti-dp83867.h>
11429c0259SKishon Vijay Abraham I#include <dt-bindings/phy/phy.h>
1226bd3f31SLokesh Vutla
138d08d7aaSJayesh Choudhary#include "k3-serdes.h"
148d08d7aaSJayesh Choudhary
1526bd3f31SLokesh Vutla/ {
162cf3213dSNishanth Menon	compatible = "ti,j7200-evm", "ti,j7200";
172cf3213dSNishanth Menon	model = "Texas Instruments J7200 EVM";
182cf3213dSNishanth Menon
19c4ba159fSUdit Kumar	aliases {
20c4ba159fSUdit Kumar		serial0 = &wkup_uart0;
21c4ba159fSUdit Kumar		serial1 = &mcu_uart0;
22c4ba159fSUdit Kumar		serial2 = &main_uart0;
23c4ba159fSUdit Kumar		serial3 = &main_uart1;
24c4ba159fSUdit Kumar		serial5 = &main_uart3;
25c4ba159fSUdit Kumar		mmc0 = &main_sdhci0;
26c4ba159fSUdit Kumar		mmc1 = &main_sdhci1;
27c4ba159fSUdit Kumar	};
28c4ba159fSUdit Kumar
2926bd3f31SLokesh Vutla	chosen {
3026bd3f31SLokesh Vutla		stdout-path = "serial2:115200n8";
3126bd3f31SLokesh Vutla	};
3294374990SAswath Govindraju
3394374990SAswath Govindraju	evm_12v0: fixedregulator-evm12v0 {
3494374990SAswath Govindraju		/* main supply */
3594374990SAswath Govindraju		compatible = "regulator-fixed";
3694374990SAswath Govindraju		regulator-name = "evm_12v0";
3794374990SAswath Govindraju		regulator-min-microvolt = <12000000>;
3894374990SAswath Govindraju		regulator-max-microvolt = <12000000>;
3994374990SAswath Govindraju		regulator-always-on;
4094374990SAswath Govindraju		regulator-boot-on;
4194374990SAswath Govindraju	};
4294374990SAswath Govindraju
4394374990SAswath Govindraju	vsys_3v3: fixedregulator-vsys3v3 {
4494374990SAswath Govindraju		/* Output of LM5140 */
4594374990SAswath Govindraju		compatible = "regulator-fixed";
4694374990SAswath Govindraju		regulator-name = "vsys_3v3";
4794374990SAswath Govindraju		regulator-min-microvolt = <3300000>;
4894374990SAswath Govindraju		regulator-max-microvolt = <3300000>;
4994374990SAswath Govindraju		vin-supply = <&evm_12v0>;
5094374990SAswath Govindraju		regulator-always-on;
5194374990SAswath Govindraju		regulator-boot-on;
5294374990SAswath Govindraju	};
5394374990SAswath Govindraju
5494374990SAswath Govindraju	vsys_5v0: fixedregulator-vsys5v0 {
5594374990SAswath Govindraju		/* Output of LM5140 */
5694374990SAswath Govindraju		compatible = "regulator-fixed";
5794374990SAswath Govindraju		regulator-name = "vsys_5v0";
5894374990SAswath Govindraju		regulator-min-microvolt = <5000000>;
5994374990SAswath Govindraju		regulator-max-microvolt = <5000000>;
6094374990SAswath Govindraju		vin-supply = <&evm_12v0>;
6194374990SAswath Govindraju		regulator-always-on;
6294374990SAswath Govindraju		regulator-boot-on;
6394374990SAswath Govindraju	};
6494374990SAswath Govindraju
6594374990SAswath Govindraju	vdd_mmc1: fixedregulator-sd {
6694374990SAswath Govindraju		/* Output of TPS22918 */
6794374990SAswath Govindraju		compatible = "regulator-fixed";
6894374990SAswath Govindraju		regulator-name = "vdd_mmc1";
6994374990SAswath Govindraju		regulator-min-microvolt = <3300000>;
7094374990SAswath Govindraju		regulator-max-microvolt = <3300000>;
7194374990SAswath Govindraju		regulator-boot-on;
7294374990SAswath Govindraju		enable-active-high;
7394374990SAswath Govindraju		vin-supply = <&vsys_3v3>;
7494374990SAswath Govindraju		gpio = <&exp2 2 GPIO_ACTIVE_HIGH>;
7594374990SAswath Govindraju	};
7694374990SAswath Govindraju
7794374990SAswath Govindraju	vdd_sd_dv: gpio-regulator-TLV71033 {
7894374990SAswath Govindraju		/* Output of TLV71033 */
7994374990SAswath Govindraju		compatible = "regulator-gpio";
8094374990SAswath Govindraju		regulator-name = "tlv71033";
8194374990SAswath Govindraju		pinctrl-names = "default";
8294374990SAswath Govindraju		pinctrl-0 = <&vdd_sd_dv_pins_default>;
8394374990SAswath Govindraju		regulator-min-microvolt = <1800000>;
8494374990SAswath Govindraju		regulator-max-microvolt = <3300000>;
8594374990SAswath Govindraju		regulator-boot-on;
8694374990SAswath Govindraju		vin-supply = <&vsys_5v0>;
8794374990SAswath Govindraju		gpios = <&main_gpio0 55 GPIO_ACTIVE_HIGH>;
8894374990SAswath Govindraju		states = <1800000 0x0>,
8994374990SAswath Govindraju			 <3300000 0x1>;
9094374990SAswath Govindraju	};
9126bd3f31SLokesh Vutla};
9226bd3f31SLokesh Vutla
933709ea7fSUdit Kumar&wkup_pmx0 {
94*c9fc538fSBhavya Kapoor};
95*c9fc538fSBhavya Kapoor
96*c9fc538fSBhavya Kapoor&wkup_pmx2 {
97a4956811STony Lindgren	mcu_uart0_pins_default: mcu-uart0-default-pins {
983709ea7fSUdit Kumar		pinctrl-single,pins = <
99*c9fc538fSBhavya Kapoor			J721E_WKUP_IOPAD(0x90, PIN_INPUT, 0) /* (E20) MCU_UART0_CTSn */
100*c9fc538fSBhavya Kapoor			J721E_WKUP_IOPAD(0x94, PIN_OUTPUT, 0) /* (E21) MCU_UART0_RTSn */
101*c9fc538fSBhavya Kapoor			J721E_WKUP_IOPAD(0x8c, PIN_INPUT, 0) /* (D20) MCU_UART0_RXD */
102*c9fc538fSBhavya Kapoor			J721E_WKUP_IOPAD(0x88, PIN_OUTPUT, 0) /* (D19) MCU_UART0_TXD */
1033709ea7fSUdit Kumar		>;
1043709ea7fSUdit Kumar	};
1053709ea7fSUdit Kumar
106a4956811STony Lindgren	wkup_uart0_pins_default: wkup-uart0-default-pins {
1073709ea7fSUdit Kumar		pinctrl-single,pins = <
108*c9fc538fSBhavya Kapoor			J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (B14) WKUP_UART0_RXD */
109*c9fc538fSBhavya Kapoor			J721E_WKUP_IOPAD(0x4c, PIN_OUTPUT, 0) /* (A14) WKUP_UART0_TXD */
1103709ea7fSUdit Kumar		>;
1113709ea7fSUdit Kumar	};
1123709ea7fSUdit Kumar
113a4956811STony Lindgren	mcu_cpsw_pins_default: mcu-cpsw-default-pins {
114fc3b1550SGrygorii Strashko		pinctrl-single,pins = <
1153d011933SKeerthy			J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */
1163d011933SKeerthy			J721E_WKUP_IOPAD(0x0004, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */
1173d011933SKeerthy			J721E_WKUP_IOPAD(0x0008, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */
1183d011933SKeerthy			J721E_WKUP_IOPAD(0x000c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */
1193d011933SKeerthy			J721E_WKUP_IOPAD(0x0010, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */
1203d011933SKeerthy			J721E_WKUP_IOPAD(0x0014, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */
1213d011933SKeerthy			J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */
1223d011933SKeerthy			J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */
1233d011933SKeerthy			J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */
1243d011933SKeerthy			J721E_WKUP_IOPAD(0x002c, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */
1253d011933SKeerthy			J721E_WKUP_IOPAD(0x0018, PIN_OUTPUT, 0) /* MCU_RGMII1_TXC */
1263d011933SKeerthy			J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_RGMII1_RXC */
127fc3b1550SGrygorii Strashko		>;
128fc3b1550SGrygorii Strashko	};
129fc3b1550SGrygorii Strashko
130a4956811STony Lindgren	wkup_gpio_pins_default: wkup-gpio-default-pins {
131be8be0d0SVaishnav Achath		pinctrl-single,pins = <
132be8be0d0SVaishnav Achath			J721E_WKUP_IOPAD(0x70, PIN_INPUT, 7) /* (C14) WKUP_GPIO0_6 */
133be8be0d0SVaishnav Achath		>;
134be8be0d0SVaishnav Achath	};
135be8be0d0SVaishnav Achath
136a4956811STony Lindgren	mcu_mdio_pins_default: mcu-mdio1-default-pins {
137fc3b1550SGrygorii Strashko		pinctrl-single,pins = <
1383d011933SKeerthy			J721E_WKUP_IOPAD(0x0034, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
1393d011933SKeerthy			J721E_WKUP_IOPAD(0x0030, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
140fc3b1550SGrygorii Strashko		>;
141fc3b1550SGrygorii Strashko	};
142fc3b1550SGrygorii Strashko};
143fc3b1550SGrygorii Strashko
144e25889f8SVignesh Raghavendra&main_pmx0 {
145a4956811STony Lindgren	main_uart0_pins_default: main-uart0-default-pins {
1463709ea7fSUdit Kumar		pinctrl-single,pins = <
1473709ea7fSUdit Kumar			J721E_IOPAD(0xb0, PIN_INPUT, 0) /* (T16) UART0_RXD */
1483709ea7fSUdit Kumar			J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */
1493709ea7fSUdit Kumar			J721E_IOPAD(0xc0, PIN_INPUT, 2) /* (W3) SPI0_CS0.UART0_CTSn */
1503709ea7fSUdit Kumar			J721E_IOPAD(0xc4, PIN_OUTPUT, 2) /* (U5) SPI0_CS1.UART0_RTSn */
1513709ea7fSUdit Kumar		>;
1523709ea7fSUdit Kumar	};
1533709ea7fSUdit Kumar
154a4956811STony Lindgren	main_uart1_pins_default: main-uart1-default-pins {
1553709ea7fSUdit Kumar		pinctrl-single,pins = <
1563709ea7fSUdit Kumar			J721E_IOPAD(0xb8, PIN_INPUT, 0) /* (T18) UART1_RXD */
1573709ea7fSUdit Kumar			J721E_IOPAD(0xbc, PIN_INPUT, 0) /* (T20) UART1_TXD */
1583709ea7fSUdit Kumar		>;
1593709ea7fSUdit Kumar	};
1603709ea7fSUdit Kumar
161a4956811STony Lindgren	main_uart3_pins_default: main-uart3-default-pins {
1623709ea7fSUdit Kumar		pinctrl-single,pins = <
1633709ea7fSUdit Kumar			J721E_IOPAD(0x60, PIN_INPUT, 11) /* (T15) MCAN8_TX.UART3_CTSn */
1643709ea7fSUdit Kumar			J721E_IOPAD(0x30, PIN_INPUT, 11) /* (Y18) MCAN2_TX.UART3_RXD */
1653709ea7fSUdit Kumar		>;
1663709ea7fSUdit Kumar	};
1673709ea7fSUdit Kumar
168a4956811STony Lindgren	main_i2c1_pins_default: main-i2c1-default-pins {
169e25889f8SVignesh Raghavendra		pinctrl-single,pins = <
170e25889f8SVignesh Raghavendra			J721E_IOPAD(0xdc, PIN_INPUT_PULLUP, 3) /* (U3) ECAP0_IN_APWM_OUT.I2C1_SCL */
171e25889f8SVignesh Raghavendra			J721E_IOPAD(0xe0, PIN_INPUT_PULLUP, 3) /* (T3) EXT_REFCLK1.I2C1_SDA */
172e25889f8SVignesh Raghavendra		>;
173e25889f8SVignesh Raghavendra	};
174a2178b83SFaiz Abbas
175a4956811STony Lindgren	main_mmc1_pins_default: main-mmc1-default-pins {
176a2178b83SFaiz Abbas		pinctrl-single,pins = <
177a2178b83SFaiz Abbas			J721E_IOPAD(0x104, PIN_INPUT, 0) /* (M20) MMC1_CMD */
178a2178b83SFaiz Abbas			J721E_IOPAD(0x100, PIN_INPUT, 0) /* (P21) MMC1_CLK */
179a2178b83SFaiz Abbas			J721E_IOPAD(0xfc, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */
180a2178b83SFaiz Abbas			J721E_IOPAD(0xf8, PIN_INPUT, 0) /* (M19) MMC1_DAT0 */
181a2178b83SFaiz Abbas			J721E_IOPAD(0xf4, PIN_INPUT, 0) /* (N21) MMC1_DAT1 */
182a2178b83SFaiz Abbas			J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */
183a2178b83SFaiz Abbas			J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */
184a2178b83SFaiz Abbas			J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */
185a2178b83SFaiz Abbas		>;
186a2178b83SFaiz Abbas	};
187bbcb0522SRoger Quadros
188a4956811STony Lindgren	vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
18994374990SAswath Govindraju		pinctrl-single,pins = <
19094374990SAswath Govindraju			J721E_IOPAD(0xd0, PIN_OUTPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */
19194374990SAswath Govindraju		>;
19294374990SAswath Govindraju	};
193e25889f8SVignesh Raghavendra};
194e25889f8SVignesh Raghavendra
1950d0a0b44SMatt Ranostay&main_pmx1 {
196a4956811STony Lindgren	main_usbss0_pins_default: main-usbss0-default-pins {
1970d0a0b44SMatt Ranostay		pinctrl-single,pins = <
1980d0a0b44SMatt Ranostay			J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
1990d0a0b44SMatt Ranostay		>;
2000d0a0b44SMatt Ranostay	};
2010d0a0b44SMatt Ranostay};
2020d0a0b44SMatt Ranostay
20326bd3f31SLokesh Vutla&wkup_uart0 {
20426bd3f31SLokesh Vutla	/* Wakeup UART is used by System firmware */
2054cc34aa8SNishanth Menon	status = "reserved";
2063709ea7fSUdit Kumar	pinctrl-names = "default";
2073709ea7fSUdit Kumar	pinctrl-0 = <&wkup_uart0_pins_default>;
20826bd3f31SLokesh Vutla};
20926bd3f31SLokesh Vutla
210dae322f8SAndrew Davis&mcu_uart0 {
211dae322f8SAndrew Davis	status = "okay";
2123709ea7fSUdit Kumar	pinctrl-names = "default";
2133709ea7fSUdit Kumar	pinctrl-0 = <&mcu_uart0_pins_default>;
2143709ea7fSUdit Kumar	clock-frequency = <96000000>;
215dae322f8SAndrew Davis};
216dae322f8SAndrew Davis
21726bd3f31SLokesh Vutla&main_uart0 {
218dae322f8SAndrew Davis	status = "okay";
21926bd3f31SLokesh Vutla	/* Shared with ATF on this platform */
22026bd3f31SLokesh Vutla	power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
2213709ea7fSUdit Kumar	pinctrl-names = "default";
2223709ea7fSUdit Kumar	pinctrl-0 = <&main_uart0_pins_default>;
22326bd3f31SLokesh Vutla};
22426bd3f31SLokesh Vutla
225dae322f8SAndrew Davis&main_uart1 {
226dae322f8SAndrew Davis	status = "okay";
227dae322f8SAndrew Davis	/* Default pinmux */
2283709ea7fSUdit Kumar	pinctrl-names = "default";
2293709ea7fSUdit Kumar	pinctrl-0 = <&main_uart1_pins_default>;
230dae322f8SAndrew Davis};
231dae322f8SAndrew Davis
23226bd3f31SLokesh Vutla&main_uart2 {
23326bd3f31SLokesh Vutla	/* MAIN UART 2 is used by R5F firmware */
2344cc34aa8SNishanth Menon	status = "reserved";
23526bd3f31SLokesh Vutla};
23626bd3f31SLokesh Vutla
2373709ea7fSUdit Kumar&main_uart3 {
2383709ea7fSUdit Kumar	/* Shared with MCAN Interface */
2393709ea7fSUdit Kumar	status = "okay";
2403709ea7fSUdit Kumar	pinctrl-names = "default";
2413709ea7fSUdit Kumar	pinctrl-0 = <&main_uart3_pins_default>;
2423709ea7fSUdit Kumar};
2433709ea7fSUdit Kumar
244d9fe476dSAndrew Davis&main_gpio0 {
245d9fe476dSAndrew Davis	status = "okay";
246f4cc7dafSFaiz Abbas};
247f4cc7dafSFaiz Abbas
248be8be0d0SVaishnav Achath&wkup_gpio0 {
249d9fe476dSAndrew Davis	status = "okay";
250be8be0d0SVaishnav Achath	pinctrl-names = "default";
251be8be0d0SVaishnav Achath	pinctrl-0 = <&wkup_gpio_pins_default>;
252be8be0d0SVaishnav Achath};
253be8be0d0SVaishnav Achath
254fc3b1550SGrygorii Strashko&mcu_cpsw {
255fc3b1550SGrygorii Strashko	pinctrl-names = "default";
256a6550e25SNishanth Menon	pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
257fc3b1550SGrygorii Strashko};
258fc3b1550SGrygorii Strashko
259fc3b1550SGrygorii Strashko&davinci_mdio {
260fc3b1550SGrygorii Strashko	phy0: ethernet-phy@0 {
261fc3b1550SGrygorii Strashko		reg = <0>;
262fc3b1550SGrygorii Strashko		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
263fc3b1550SGrygorii Strashko		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
264fc3b1550SGrygorii Strashko	};
265fc3b1550SGrygorii Strashko};
266fc3b1550SGrygorii Strashko
267fc3b1550SGrygorii Strashko&cpsw_port1 {
268fc3b1550SGrygorii Strashko	phy-mode = "rgmii-rxid";
269fc3b1550SGrygorii Strashko	phy-handle = <&phy0>;
270fc3b1550SGrygorii Strashko};
271e25889f8SVignesh Raghavendra
272e25889f8SVignesh Raghavendra&main_i2c0 {
273a9ed915cSAndrew Davis	status = "okay";
27494374990SAswath Govindraju	pinctrl-names = "default";
27594374990SAswath Govindraju	pinctrl-0 = <&main_i2c0_pins_default>;
27694374990SAswath Govindraju	clock-frequency = <400000>;
27794374990SAswath Govindraju
278e25889f8SVignesh Raghavendra	exp1: gpio@20 {
279e25889f8SVignesh Raghavendra		compatible = "ti,tca6416";
280e25889f8SVignesh Raghavendra		reg = <0x20>;
281e25889f8SVignesh Raghavendra		gpio-controller;
282e25889f8SVignesh Raghavendra		#gpio-cells = <2>;
283e25889f8SVignesh Raghavendra	};
284e25889f8SVignesh Raghavendra
285e25889f8SVignesh Raghavendra	exp2: gpio@22 {
286e25889f8SVignesh Raghavendra		compatible = "ti,tca6424";
287e25889f8SVignesh Raghavendra		reg = <0x22>;
288e25889f8SVignesh Raghavendra		gpio-controller;
289e25889f8SVignesh Raghavendra		#gpio-cells = <2>;
290e25889f8SVignesh Raghavendra	};
291e25889f8SVignesh Raghavendra};
292e25889f8SVignesh Raghavendra
2932eefbf5fSPeter Ujfalusi/*
2942eefbf5fSPeter Ujfalusi * The j7200 CPB board is identical to the CPB used for J721E, the SOMs can be
2952eefbf5fSPeter Ujfalusi * swapped on the CPB.
2962eefbf5fSPeter Ujfalusi *
2972eefbf5fSPeter Ujfalusi * main_i2c1 of J7200 is connected to the CPB i2c bus labeled as i2c3.
2982eefbf5fSPeter Ujfalusi * The i2c1 of the CPB (as it is labeled) is not connected to j7200.
2992eefbf5fSPeter Ujfalusi */
300e25889f8SVignesh Raghavendra&main_i2c1 {
301a9ed915cSAndrew Davis	status = "okay";
302e25889f8SVignesh Raghavendra	pinctrl-names = "default";
303e25889f8SVignesh Raghavendra	pinctrl-0 = <&main_i2c1_pins_default>;
304e25889f8SVignesh Raghavendra	clock-frequency = <400000>;
305e25889f8SVignesh Raghavendra
3062eefbf5fSPeter Ujfalusi	exp3: gpio@20 {
307e25889f8SVignesh Raghavendra		compatible = "ti,tca6408";
308e25889f8SVignesh Raghavendra		reg = <0x20>;
309e25889f8SVignesh Raghavendra		gpio-controller;
310e25889f8SVignesh Raghavendra		#gpio-cells = <2>;
3112eefbf5fSPeter Ujfalusi		gpio-line-names = "CODEC_RSTz", "CODEC_SPARE1", "UB926_RESETn",
3122eefbf5fSPeter Ujfalusi				  "UB926_LOCK", "UB926_PWR_SW_CNTRL",
3132eefbf5fSPeter Ujfalusi				  "UB926_TUNER_RESET", "UB926_GPIO_SPARE", "";
314e25889f8SVignesh Raghavendra	};
315e25889f8SVignesh Raghavendra};
316a2178b83SFaiz Abbas
317a2178b83SFaiz Abbas&main_sdhci0 {
318a2178b83SFaiz Abbas	/* eMMC */
319013b7dd3SAndrew Davis	status = "okay";
320a2178b83SFaiz Abbas	non-removable;
321a2178b83SFaiz Abbas	ti,driver-strength-ohm = <50>;
322a2178b83SFaiz Abbas	disable-wp;
323a2178b83SFaiz Abbas};
324a2178b83SFaiz Abbas
325a2178b83SFaiz Abbas&main_sdhci1 {
326a2178b83SFaiz Abbas	/* SD card */
327013b7dd3SAndrew Davis	status = "okay";
328a2178b83SFaiz Abbas	pinctrl-0 = <&main_mmc1_pins_default>;
329a2178b83SFaiz Abbas	pinctrl-names = "default";
33094374990SAswath Govindraju	vmmc-supply = <&vdd_mmc1>;
33194374990SAswath Govindraju	vqmmc-supply = <&vdd_sd_dv>;
332a2178b83SFaiz Abbas	ti,driver-strength-ohm = <50>;
333a2178b83SFaiz Abbas	disable-wp;
334a2178b83SFaiz Abbas};
335e38a45b0SKishon Vijay Abraham I
336e38a45b0SKishon Vijay Abraham I&serdes_ln_ctrl {
337e38a45b0SKishon Vijay Abraham I	idle-states = <J7200_SERDES0_LANE0_PCIE1_LANE0>, <J7200_SERDES0_LANE1_PCIE1_LANE1>,
338e38a45b0SKishon Vijay Abraham I		      <J7200_SERDES0_LANE2_QSGMII_LANE1>, <J7200_SERDES0_LANE3_IP4_UNUSED>;
339e38a45b0SKishon Vijay Abraham I};
340bbcb0522SRoger Quadros
341bbcb0522SRoger Quadros&usb_serdes_mux {
342bbcb0522SRoger Quadros	idle-states = <1>; /* USB0 to SERDES lane 3 */
343bbcb0522SRoger Quadros};
344bbcb0522SRoger Quadros
345bbcb0522SRoger Quadros&usbss0 {
346bbcb0522SRoger Quadros	pinctrl-names = "default";
347bbcb0522SRoger Quadros	pinctrl-0 = <&main_usbss0_pins_default>;
348bbcb0522SRoger Quadros	ti,vbus-divider;
349bbcb0522SRoger Quadros	ti,usb2-only;
350bbcb0522SRoger Quadros};
351bbcb0522SRoger Quadros
352bbcb0522SRoger Quadros&usb0 {
353bbcb0522SRoger Quadros	dr_mode = "otg";
354bbcb0522SRoger Quadros	maximum-speed = "high-speed";
355bbcb0522SRoger Quadros};
356e6b45168SVignesh Raghavendra
357e6b45168SVignesh Raghavendra&tscadc0 {
358e6b45168SVignesh Raghavendra	adc {
359e6b45168SVignesh Raghavendra		ti,adc-channels = <0 1 2 3 4 5 6 7>;
360e6b45168SVignesh Raghavendra	};
361e6b45168SVignesh Raghavendra};
362429c0259SKishon Vijay Abraham I
363429c0259SKishon Vijay Abraham I&serdes_refclk {
364429c0259SKishon Vijay Abraham I	clock-frequency = <100000000>;
365429c0259SKishon Vijay Abraham I};
366429c0259SKishon Vijay Abraham I
367429c0259SKishon Vijay Abraham I&serdes0 {
368429c0259SKishon Vijay Abraham I	serdes0_pcie_link: phy@0 {
369429c0259SKishon Vijay Abraham I		reg = <0>;
370429c0259SKishon Vijay Abraham I		cdns,num-lanes = <2>;
371429c0259SKishon Vijay Abraham I		#phy-cells = <0>;
372429c0259SKishon Vijay Abraham I		cdns,phy-type = <PHY_TYPE_PCIE>;
373429c0259SKishon Vijay Abraham I		resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>;
374429c0259SKishon Vijay Abraham I	};
375429c0259SKishon Vijay Abraham I
376429c0259SKishon Vijay Abraham I	serdes0_qsgmii_link: phy@1 {
377429c0259SKishon Vijay Abraham I		reg = <2>;
378429c0259SKishon Vijay Abraham I		cdns,num-lanes = <1>;
379429c0259SKishon Vijay Abraham I		#phy-cells = <0>;
380429c0259SKishon Vijay Abraham I		cdns,phy-type = <PHY_TYPE_QSGMII>;
381429c0259SKishon Vijay Abraham I		resets = <&serdes_wiz0 3>;
382429c0259SKishon Vijay Abraham I	};
383429c0259SKishon Vijay Abraham I};
3843a6319dfSKishon Vijay Abraham I
3853a6319dfSKishon Vijay Abraham I&pcie1_rc {
3863a6319dfSKishon Vijay Abraham I	reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>;
3873a6319dfSKishon Vijay Abraham I	phys = <&serdes0_pcie_link>;
3883a6319dfSKishon Vijay Abraham I	phy-names = "pcie-phy";
3893a6319dfSKishon Vijay Abraham I	num-lanes = <2>;
3903a6319dfSKishon Vijay Abraham I};
3913a6319dfSKishon Vijay Abraham I
3923a6319dfSKishon Vijay Abraham I&pcie1_ep {
3933a6319dfSKishon Vijay Abraham I	phys = <&serdes0_pcie_link>;
3943a6319dfSKishon Vijay Abraham I	phy-names = "pcie-phy";
3953a6319dfSKishon Vijay Abraham I	num-lanes = <2>;
3963a6319dfSKishon Vijay Abraham I	status = "disabled";
3973a6319dfSKishon Vijay Abraham I};
398