126bd3f31SLokesh Vutla// SPDX-License-Identifier: GPL-2.0
226bd3f31SLokesh Vutla/*
326bd3f31SLokesh Vutla * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
426bd3f31SLokesh Vutla */
526bd3f31SLokesh Vutla
626bd3f31SLokesh Vutla/dts-v1/;
726bd3f31SLokesh Vutla
826bd3f31SLokesh Vutla#include "k3-j7200-som-p0.dtsi"
93a6319dfSKishon Vijay Abraham I#include <dt-bindings/gpio/gpio.h>
10fc3b1550SGrygorii Strashko#include <dt-bindings/net/ti-dp83867.h>
11e38a45b0SKishon Vijay Abraham I#include <dt-bindings/mux/ti-serdes.h>
12429c0259SKishon Vijay Abraham I#include <dt-bindings/phy/phy.h>
1326bd3f31SLokesh Vutla
1426bd3f31SLokesh Vutla/ {
152cf3213dSNishanth Menon	compatible = "ti,j7200-evm", "ti,j7200";
162cf3213dSNishanth Menon	model = "Texas Instruments J7200 EVM";
172cf3213dSNishanth Menon
18*c4ba159fSUdit Kumar	aliases {
19*c4ba159fSUdit Kumar		serial0 = &wkup_uart0;
20*c4ba159fSUdit Kumar		serial1 = &mcu_uart0;
21*c4ba159fSUdit Kumar		serial2 = &main_uart0;
22*c4ba159fSUdit Kumar		serial3 = &main_uart1;
23*c4ba159fSUdit Kumar		serial5 = &main_uart3;
24*c4ba159fSUdit Kumar		mmc0 = &main_sdhci0;
25*c4ba159fSUdit Kumar		mmc1 = &main_sdhci1;
26*c4ba159fSUdit Kumar	};
27*c4ba159fSUdit Kumar
2826bd3f31SLokesh Vutla	chosen {
2926bd3f31SLokesh Vutla		stdout-path = "serial2:115200n8";
3026bd3f31SLokesh Vutla	};
3194374990SAswath Govindraju
3294374990SAswath Govindraju	evm_12v0: fixedregulator-evm12v0 {
3394374990SAswath Govindraju		/* main supply */
3494374990SAswath Govindraju		compatible = "regulator-fixed";
3594374990SAswath Govindraju		regulator-name = "evm_12v0";
3694374990SAswath Govindraju		regulator-min-microvolt = <12000000>;
3794374990SAswath Govindraju		regulator-max-microvolt = <12000000>;
3894374990SAswath Govindraju		regulator-always-on;
3994374990SAswath Govindraju		regulator-boot-on;
4094374990SAswath Govindraju	};
4194374990SAswath Govindraju
4294374990SAswath Govindraju	vsys_3v3: fixedregulator-vsys3v3 {
4394374990SAswath Govindraju		/* Output of LM5140 */
4494374990SAswath Govindraju		compatible = "regulator-fixed";
4594374990SAswath Govindraju		regulator-name = "vsys_3v3";
4694374990SAswath Govindraju		regulator-min-microvolt = <3300000>;
4794374990SAswath Govindraju		regulator-max-microvolt = <3300000>;
4894374990SAswath Govindraju		vin-supply = <&evm_12v0>;
4994374990SAswath Govindraju		regulator-always-on;
5094374990SAswath Govindraju		regulator-boot-on;
5194374990SAswath Govindraju	};
5294374990SAswath Govindraju
5394374990SAswath Govindraju	vsys_5v0: fixedregulator-vsys5v0 {
5494374990SAswath Govindraju		/* Output of LM5140 */
5594374990SAswath Govindraju		compatible = "regulator-fixed";
5694374990SAswath Govindraju		regulator-name = "vsys_5v0";
5794374990SAswath Govindraju		regulator-min-microvolt = <5000000>;
5894374990SAswath Govindraju		regulator-max-microvolt = <5000000>;
5994374990SAswath Govindraju		vin-supply = <&evm_12v0>;
6094374990SAswath Govindraju		regulator-always-on;
6194374990SAswath Govindraju		regulator-boot-on;
6294374990SAswath Govindraju	};
6394374990SAswath Govindraju
6494374990SAswath Govindraju	vdd_mmc1: fixedregulator-sd {
6594374990SAswath Govindraju		/* Output of TPS22918 */
6694374990SAswath Govindraju		compatible = "regulator-fixed";
6794374990SAswath Govindraju		regulator-name = "vdd_mmc1";
6894374990SAswath Govindraju		regulator-min-microvolt = <3300000>;
6994374990SAswath Govindraju		regulator-max-microvolt = <3300000>;
7094374990SAswath Govindraju		regulator-boot-on;
7194374990SAswath Govindraju		enable-active-high;
7294374990SAswath Govindraju		vin-supply = <&vsys_3v3>;
7394374990SAswath Govindraju		gpio = <&exp2 2 GPIO_ACTIVE_HIGH>;
7494374990SAswath Govindraju	};
7594374990SAswath Govindraju
7694374990SAswath Govindraju	vdd_sd_dv: gpio-regulator-TLV71033 {
7794374990SAswath Govindraju		/* Output of TLV71033 */
7894374990SAswath Govindraju		compatible = "regulator-gpio";
7994374990SAswath Govindraju		regulator-name = "tlv71033";
8094374990SAswath Govindraju		pinctrl-names = "default";
8194374990SAswath Govindraju		pinctrl-0 = <&vdd_sd_dv_pins_default>;
8294374990SAswath Govindraju		regulator-min-microvolt = <1800000>;
8394374990SAswath Govindraju		regulator-max-microvolt = <3300000>;
8494374990SAswath Govindraju		regulator-boot-on;
8594374990SAswath Govindraju		vin-supply = <&vsys_5v0>;
8694374990SAswath Govindraju		gpios = <&main_gpio0 55 GPIO_ACTIVE_HIGH>;
8794374990SAswath Govindraju		states = <1800000 0x0>,
8894374990SAswath Govindraju			 <3300000 0x1>;
8994374990SAswath Govindraju	};
9026bd3f31SLokesh Vutla};
9126bd3f31SLokesh Vutla
923709ea7fSUdit Kumar&wkup_pmx0 {
933709ea7fSUdit Kumar	mcu_uart0_pins_default: mcu-uart0-pins-default {
943709ea7fSUdit Kumar		pinctrl-single,pins = <
953709ea7fSUdit Kumar			J721E_WKUP_IOPAD(0xf4, PIN_INPUT, 0) /* (D20) MCU_UART0_RXD */
963709ea7fSUdit Kumar			J721E_WKUP_IOPAD(0xf0, PIN_OUTPUT, 0) /* (D19) MCU_UART0_TXD */
973709ea7fSUdit Kumar			J721E_WKUP_IOPAD(0xf8, PIN_INPUT, 0) /* (E20) MCU_UART0_CTSn */
983709ea7fSUdit Kumar			J721E_WKUP_IOPAD(0xfc, PIN_OUTPUT, 0) /* (E21) MCU_UART0_RTSn */
993709ea7fSUdit Kumar		>;
1003709ea7fSUdit Kumar	};
1013709ea7fSUdit Kumar
1023709ea7fSUdit Kumar	wkup_uart0_pins_default: wkup-uart0-pins-default {
1033709ea7fSUdit Kumar		pinctrl-single,pins = <
1043709ea7fSUdit Kumar			J721E_WKUP_IOPAD(0xb0, PIN_INPUT, 0) /* (B14) WKUP_UART0_RXD */
1053709ea7fSUdit Kumar			J721E_WKUP_IOPAD(0xb4, PIN_OUTPUT, 0) /* (A14) WKUP_UART0_TXD */
1063709ea7fSUdit Kumar		>;
1073709ea7fSUdit Kumar	};
1083709ea7fSUdit Kumar};
1093709ea7fSUdit Kumar
1109ae21ac4SVaishnav Achath&wkup_pmx2 {
111fc3b1550SGrygorii Strashko	mcu_cpsw_pins_default: mcu-cpsw-pins-default {
112fc3b1550SGrygorii Strashko		pinctrl-single,pins = <
1133d011933SKeerthy			J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */
1143d011933SKeerthy			J721E_WKUP_IOPAD(0x0004, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */
1153d011933SKeerthy			J721E_WKUP_IOPAD(0x0008, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */
1163d011933SKeerthy			J721E_WKUP_IOPAD(0x000c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */
1173d011933SKeerthy			J721E_WKUP_IOPAD(0x0010, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */
1183d011933SKeerthy			J721E_WKUP_IOPAD(0x0014, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */
1193d011933SKeerthy			J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */
1203d011933SKeerthy			J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */
1213d011933SKeerthy			J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */
1223d011933SKeerthy			J721E_WKUP_IOPAD(0x002c, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */
1233d011933SKeerthy			J721E_WKUP_IOPAD(0x0018, PIN_OUTPUT, 0) /* MCU_RGMII1_TXC */
1243d011933SKeerthy			J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_RGMII1_RXC */
125fc3b1550SGrygorii Strashko		>;
126fc3b1550SGrygorii Strashko	};
127fc3b1550SGrygorii Strashko
128be8be0d0SVaishnav Achath	wkup_gpio_pins_default: wkup-gpio-pins-default {
129be8be0d0SVaishnav Achath		pinctrl-single,pins = <
130be8be0d0SVaishnav Achath			J721E_WKUP_IOPAD(0x70, PIN_INPUT, 7) /* (C14) WKUP_GPIO0_6 */
131be8be0d0SVaishnav Achath		>;
132be8be0d0SVaishnav Achath	};
133be8be0d0SVaishnav Achath
134fc3b1550SGrygorii Strashko	mcu_mdio_pins_default: mcu-mdio1-pins-default {
135fc3b1550SGrygorii Strashko		pinctrl-single,pins = <
1363d011933SKeerthy			J721E_WKUP_IOPAD(0x0034, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
1373d011933SKeerthy			J721E_WKUP_IOPAD(0x0030, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
138fc3b1550SGrygorii Strashko		>;
139fc3b1550SGrygorii Strashko	};
140fc3b1550SGrygorii Strashko};
141fc3b1550SGrygorii Strashko
142e25889f8SVignesh Raghavendra&main_pmx0 {
1433709ea7fSUdit Kumar	main_uart0_pins_default: main-uart0-pins-default {
1443709ea7fSUdit Kumar		pinctrl-single,pins = <
1453709ea7fSUdit Kumar			J721E_IOPAD(0xb0, PIN_INPUT, 0) /* (T16) UART0_RXD */
1463709ea7fSUdit Kumar			J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */
1473709ea7fSUdit Kumar			J721E_IOPAD(0xc0, PIN_INPUT, 2) /* (W3) SPI0_CS0.UART0_CTSn */
1483709ea7fSUdit Kumar			J721E_IOPAD(0xc4, PIN_OUTPUT, 2) /* (U5) SPI0_CS1.UART0_RTSn */
1493709ea7fSUdit Kumar		>;
1503709ea7fSUdit Kumar	};
1513709ea7fSUdit Kumar
1523709ea7fSUdit Kumar	main_uart1_pins_default: main-uart1-pins-default {
1533709ea7fSUdit Kumar		pinctrl-single,pins = <
1543709ea7fSUdit Kumar			J721E_IOPAD(0xb8, PIN_INPUT, 0) /* (T18) UART1_RXD */
1553709ea7fSUdit Kumar			J721E_IOPAD(0xbc, PIN_INPUT, 0) /* (T20) UART1_TXD */
1563709ea7fSUdit Kumar		>;
1573709ea7fSUdit Kumar	};
1583709ea7fSUdit Kumar
1593709ea7fSUdit Kumar	main_uart3_pins_default: main-uart3-pins-default {
1603709ea7fSUdit Kumar		pinctrl-single,pins = <
1613709ea7fSUdit Kumar			J721E_IOPAD(0x60, PIN_INPUT, 11) /* (T15) MCAN8_TX.UART3_CTSn */
1623709ea7fSUdit Kumar			J721E_IOPAD(0x30, PIN_INPUT, 11) /* (Y18) MCAN2_TX.UART3_RXD */
1633709ea7fSUdit Kumar		>;
1643709ea7fSUdit Kumar	};
1653709ea7fSUdit Kumar
166e25889f8SVignesh Raghavendra	main_i2c1_pins_default: main-i2c1-pins-default {
167e25889f8SVignesh Raghavendra		pinctrl-single,pins = <
168e25889f8SVignesh Raghavendra			J721E_IOPAD(0xdc, PIN_INPUT_PULLUP, 3) /* (U3) ECAP0_IN_APWM_OUT.I2C1_SCL */
169e25889f8SVignesh Raghavendra			J721E_IOPAD(0xe0, PIN_INPUT_PULLUP, 3) /* (T3) EXT_REFCLK1.I2C1_SDA */
170e25889f8SVignesh Raghavendra		>;
171e25889f8SVignesh Raghavendra	};
172a2178b83SFaiz Abbas
173a2178b83SFaiz Abbas	main_mmc1_pins_default: main-mmc1-pins-default {
174a2178b83SFaiz Abbas		pinctrl-single,pins = <
175a2178b83SFaiz Abbas			J721E_IOPAD(0x104, PIN_INPUT, 0) /* (M20) MMC1_CMD */
176a2178b83SFaiz Abbas			J721E_IOPAD(0x100, PIN_INPUT, 0) /* (P21) MMC1_CLK */
177a2178b83SFaiz Abbas			J721E_IOPAD(0xfc, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */
178a2178b83SFaiz Abbas			J721E_IOPAD(0xf8, PIN_INPUT, 0) /* (M19) MMC1_DAT0 */
179a2178b83SFaiz Abbas			J721E_IOPAD(0xf4, PIN_INPUT, 0) /* (N21) MMC1_DAT1 */
180a2178b83SFaiz Abbas			J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */
181a2178b83SFaiz Abbas			J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */
182a2178b83SFaiz Abbas			J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */
183a2178b83SFaiz Abbas		>;
184a2178b83SFaiz Abbas	};
185bbcb0522SRoger Quadros
18694374990SAswath Govindraju	vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
18794374990SAswath Govindraju		pinctrl-single,pins = <
18894374990SAswath Govindraju			J721E_IOPAD(0xd0, PIN_OUTPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */
18994374990SAswath Govindraju		>;
19094374990SAswath Govindraju	};
191e25889f8SVignesh Raghavendra};
192e25889f8SVignesh Raghavendra
1930d0a0b44SMatt Ranostay&main_pmx1 {
1940d0a0b44SMatt Ranostay	main_usbss0_pins_default: main-usbss0-pins-default {
1950d0a0b44SMatt Ranostay		pinctrl-single,pins = <
1960d0a0b44SMatt Ranostay			J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
1970d0a0b44SMatt Ranostay		>;
1980d0a0b44SMatt Ranostay	};
1990d0a0b44SMatt Ranostay};
2000d0a0b44SMatt Ranostay
20126bd3f31SLokesh Vutla&wkup_uart0 {
20226bd3f31SLokesh Vutla	/* Wakeup UART is used by System firmware */
2034cc34aa8SNishanth Menon	status = "reserved";
2043709ea7fSUdit Kumar	pinctrl-names = "default";
2053709ea7fSUdit Kumar	pinctrl-0 = <&wkup_uart0_pins_default>;
20626bd3f31SLokesh Vutla};
20726bd3f31SLokesh Vutla
208dae322f8SAndrew Davis&mcu_uart0 {
209dae322f8SAndrew Davis	status = "okay";
2103709ea7fSUdit Kumar	pinctrl-names = "default";
2113709ea7fSUdit Kumar	pinctrl-0 = <&mcu_uart0_pins_default>;
2123709ea7fSUdit Kumar	clock-frequency = <96000000>;
213dae322f8SAndrew Davis};
214dae322f8SAndrew Davis
21526bd3f31SLokesh Vutla&main_uart0 {
216dae322f8SAndrew Davis	status = "okay";
21726bd3f31SLokesh Vutla	/* Shared with ATF on this platform */
21826bd3f31SLokesh Vutla	power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
2193709ea7fSUdit Kumar	pinctrl-names = "default";
2203709ea7fSUdit Kumar	pinctrl-0 = <&main_uart0_pins_default>;
22126bd3f31SLokesh Vutla};
22226bd3f31SLokesh Vutla
223dae322f8SAndrew Davis&main_uart1 {
224dae322f8SAndrew Davis	status = "okay";
225dae322f8SAndrew Davis	/* Default pinmux */
2263709ea7fSUdit Kumar	pinctrl-names = "default";
2273709ea7fSUdit Kumar	pinctrl-0 = <&main_uart1_pins_default>;
228dae322f8SAndrew Davis};
229dae322f8SAndrew Davis
23026bd3f31SLokesh Vutla&main_uart2 {
23126bd3f31SLokesh Vutla	/* MAIN UART 2 is used by R5F firmware */
2324cc34aa8SNishanth Menon	status = "reserved";
23326bd3f31SLokesh Vutla};
23426bd3f31SLokesh Vutla
2353709ea7fSUdit Kumar&main_uart3 {
2363709ea7fSUdit Kumar	/* Shared with MCAN Interface */
2373709ea7fSUdit Kumar	status = "okay";
2383709ea7fSUdit Kumar	pinctrl-names = "default";
2393709ea7fSUdit Kumar	pinctrl-0 = <&main_uart3_pins_default>;
2403709ea7fSUdit Kumar};
2413709ea7fSUdit Kumar
242f4cc7dafSFaiz Abbas&main_gpio2 {
243f4cc7dafSFaiz Abbas	status = "disabled";
244f4cc7dafSFaiz Abbas};
245f4cc7dafSFaiz Abbas
246f4cc7dafSFaiz Abbas&main_gpio4 {
247f4cc7dafSFaiz Abbas	status = "disabled";
248f4cc7dafSFaiz Abbas};
249f4cc7dafSFaiz Abbas
250f4cc7dafSFaiz Abbas&main_gpio6 {
251f4cc7dafSFaiz Abbas	status = "disabled";
252f4cc7dafSFaiz Abbas};
253f4cc7dafSFaiz Abbas
254be8be0d0SVaishnav Achath&wkup_gpio0 {
255be8be0d0SVaishnav Achath	pinctrl-names = "default";
256be8be0d0SVaishnav Achath	pinctrl-0 = <&wkup_gpio_pins_default>;
257be8be0d0SVaishnav Achath};
258be8be0d0SVaishnav Achath
259f4cc7dafSFaiz Abbas&wkup_gpio1 {
260f4cc7dafSFaiz Abbas	status = "disabled";
261f4cc7dafSFaiz Abbas};
262f4cc7dafSFaiz Abbas
263fc3b1550SGrygorii Strashko&mcu_cpsw {
264fc3b1550SGrygorii Strashko	pinctrl-names = "default";
265a6550e25SNishanth Menon	pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
266fc3b1550SGrygorii Strashko};
267fc3b1550SGrygorii Strashko
268fc3b1550SGrygorii Strashko&davinci_mdio {
269fc3b1550SGrygorii Strashko	phy0: ethernet-phy@0 {
270fc3b1550SGrygorii Strashko		reg = <0>;
271fc3b1550SGrygorii Strashko		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
272fc3b1550SGrygorii Strashko		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
273fc3b1550SGrygorii Strashko	};
274fc3b1550SGrygorii Strashko};
275fc3b1550SGrygorii Strashko
276fc3b1550SGrygorii Strashko&cpsw_port1 {
277fc3b1550SGrygorii Strashko	phy-mode = "rgmii-rxid";
278fc3b1550SGrygorii Strashko	phy-handle = <&phy0>;
279fc3b1550SGrygorii Strashko};
280e25889f8SVignesh Raghavendra
281e25889f8SVignesh Raghavendra&main_i2c0 {
282a9ed915cSAndrew Davis	status = "okay";
28394374990SAswath Govindraju	pinctrl-names = "default";
28494374990SAswath Govindraju	pinctrl-0 = <&main_i2c0_pins_default>;
28594374990SAswath Govindraju	clock-frequency = <400000>;
28694374990SAswath Govindraju
287e25889f8SVignesh Raghavendra	exp1: gpio@20 {
288e25889f8SVignesh Raghavendra		compatible = "ti,tca6416";
289e25889f8SVignesh Raghavendra		reg = <0x20>;
290e25889f8SVignesh Raghavendra		gpio-controller;
291e25889f8SVignesh Raghavendra		#gpio-cells = <2>;
292e25889f8SVignesh Raghavendra	};
293e25889f8SVignesh Raghavendra
294e25889f8SVignesh Raghavendra	exp2: gpio@22 {
295e25889f8SVignesh Raghavendra		compatible = "ti,tca6424";
296e25889f8SVignesh Raghavendra		reg = <0x22>;
297e25889f8SVignesh Raghavendra		gpio-controller;
298e25889f8SVignesh Raghavendra		#gpio-cells = <2>;
299e25889f8SVignesh Raghavendra	};
300e25889f8SVignesh Raghavendra};
301e25889f8SVignesh Raghavendra
3022eefbf5fSPeter Ujfalusi/*
3032eefbf5fSPeter Ujfalusi * The j7200 CPB board is identical to the CPB used for J721E, the SOMs can be
3042eefbf5fSPeter Ujfalusi * swapped on the CPB.
3052eefbf5fSPeter Ujfalusi *
3062eefbf5fSPeter Ujfalusi * main_i2c1 of J7200 is connected to the CPB i2c bus labeled as i2c3.
3072eefbf5fSPeter Ujfalusi * The i2c1 of the CPB (as it is labeled) is not connected to j7200.
3082eefbf5fSPeter Ujfalusi */
309e25889f8SVignesh Raghavendra&main_i2c1 {
310a9ed915cSAndrew Davis	status = "okay";
311e25889f8SVignesh Raghavendra	pinctrl-names = "default";
312e25889f8SVignesh Raghavendra	pinctrl-0 = <&main_i2c1_pins_default>;
313e25889f8SVignesh Raghavendra	clock-frequency = <400000>;
314e25889f8SVignesh Raghavendra
3152eefbf5fSPeter Ujfalusi	exp3: gpio@20 {
316e25889f8SVignesh Raghavendra		compatible = "ti,tca6408";
317e25889f8SVignesh Raghavendra		reg = <0x20>;
318e25889f8SVignesh Raghavendra		gpio-controller;
319e25889f8SVignesh Raghavendra		#gpio-cells = <2>;
3202eefbf5fSPeter Ujfalusi		gpio-line-names = "CODEC_RSTz", "CODEC_SPARE1", "UB926_RESETn",
3212eefbf5fSPeter Ujfalusi				  "UB926_LOCK", "UB926_PWR_SW_CNTRL",
3222eefbf5fSPeter Ujfalusi				  "UB926_TUNER_RESET", "UB926_GPIO_SPARE", "";
323e25889f8SVignesh Raghavendra	};
324e25889f8SVignesh Raghavendra};
325a2178b83SFaiz Abbas
326a2178b83SFaiz Abbas&main_sdhci0 {
327a2178b83SFaiz Abbas	/* eMMC */
328a2178b83SFaiz Abbas	non-removable;
329a2178b83SFaiz Abbas	ti,driver-strength-ohm = <50>;
330a2178b83SFaiz Abbas	disable-wp;
331a2178b83SFaiz Abbas};
332a2178b83SFaiz Abbas
333a2178b83SFaiz Abbas&main_sdhci1 {
334a2178b83SFaiz Abbas	/* SD card */
335a2178b83SFaiz Abbas	pinctrl-0 = <&main_mmc1_pins_default>;
336a2178b83SFaiz Abbas	pinctrl-names = "default";
33794374990SAswath Govindraju	vmmc-supply = <&vdd_mmc1>;
33894374990SAswath Govindraju	vqmmc-supply = <&vdd_sd_dv>;
339a2178b83SFaiz Abbas	ti,driver-strength-ohm = <50>;
340a2178b83SFaiz Abbas	disable-wp;
341a2178b83SFaiz Abbas};
342e38a45b0SKishon Vijay Abraham I
343e38a45b0SKishon Vijay Abraham I&serdes_ln_ctrl {
344e38a45b0SKishon Vijay Abraham I	idle-states = <J7200_SERDES0_LANE0_PCIE1_LANE0>, <J7200_SERDES0_LANE1_PCIE1_LANE1>,
345e38a45b0SKishon Vijay Abraham I		      <J7200_SERDES0_LANE2_QSGMII_LANE1>, <J7200_SERDES0_LANE3_IP4_UNUSED>;
346e38a45b0SKishon Vijay Abraham I};
347bbcb0522SRoger Quadros
348bbcb0522SRoger Quadros&usb_serdes_mux {
349bbcb0522SRoger Quadros	idle-states = <1>; /* USB0 to SERDES lane 3 */
350bbcb0522SRoger Quadros};
351bbcb0522SRoger Quadros
352bbcb0522SRoger Quadros&usbss0 {
353bbcb0522SRoger Quadros	pinctrl-names = "default";
354bbcb0522SRoger Quadros	pinctrl-0 = <&main_usbss0_pins_default>;
355bbcb0522SRoger Quadros	ti,vbus-divider;
356bbcb0522SRoger Quadros	ti,usb2-only;
357bbcb0522SRoger Quadros};
358bbcb0522SRoger Quadros
359bbcb0522SRoger Quadros&usb0 {
360bbcb0522SRoger Quadros	dr_mode = "otg";
361bbcb0522SRoger Quadros	maximum-speed = "high-speed";
362bbcb0522SRoger Quadros};
363e6b45168SVignesh Raghavendra
364e6b45168SVignesh Raghavendra&tscadc0 {
365e6b45168SVignesh Raghavendra	adc {
366e6b45168SVignesh Raghavendra		ti,adc-channels = <0 1 2 3 4 5 6 7>;
367e6b45168SVignesh Raghavendra	};
368e6b45168SVignesh Raghavendra};
369429c0259SKishon Vijay Abraham I
370429c0259SKishon Vijay Abraham I&serdes_refclk {
371429c0259SKishon Vijay Abraham I	clock-frequency = <100000000>;
372429c0259SKishon Vijay Abraham I};
373429c0259SKishon Vijay Abraham I
374429c0259SKishon Vijay Abraham I&serdes0 {
375429c0259SKishon Vijay Abraham I	serdes0_pcie_link: phy@0 {
376429c0259SKishon Vijay Abraham I		reg = <0>;
377429c0259SKishon Vijay Abraham I		cdns,num-lanes = <2>;
378429c0259SKishon Vijay Abraham I		#phy-cells = <0>;
379429c0259SKishon Vijay Abraham I		cdns,phy-type = <PHY_TYPE_PCIE>;
380429c0259SKishon Vijay Abraham I		resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>;
381429c0259SKishon Vijay Abraham I	};
382429c0259SKishon Vijay Abraham I
383429c0259SKishon Vijay Abraham I	serdes0_qsgmii_link: phy@1 {
384429c0259SKishon Vijay Abraham I		reg = <2>;
385429c0259SKishon Vijay Abraham I		cdns,num-lanes = <1>;
386429c0259SKishon Vijay Abraham I		#phy-cells = <0>;
387429c0259SKishon Vijay Abraham I		cdns,phy-type = <PHY_TYPE_QSGMII>;
388429c0259SKishon Vijay Abraham I		resets = <&serdes_wiz0 3>;
389429c0259SKishon Vijay Abraham I	};
390429c0259SKishon Vijay Abraham I};
3913a6319dfSKishon Vijay Abraham I
3923a6319dfSKishon Vijay Abraham I&pcie1_rc {
3933a6319dfSKishon Vijay Abraham I	reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>;
3943a6319dfSKishon Vijay Abraham I	phys = <&serdes0_pcie_link>;
3953a6319dfSKishon Vijay Abraham I	phy-names = "pcie-phy";
3963a6319dfSKishon Vijay Abraham I	num-lanes = <2>;
3973a6319dfSKishon Vijay Abraham I};
3983a6319dfSKishon Vijay Abraham I
3993a6319dfSKishon Vijay Abraham I&pcie1_ep {
4003a6319dfSKishon Vijay Abraham I	phys = <&serdes0_pcie_link>;
4013a6319dfSKishon Vijay Abraham I	phy-names = "pcie-phy";
4023a6319dfSKishon Vijay Abraham I	num-lanes = <2>;
4033a6319dfSKishon Vijay Abraham I	status = "disabled";
4043a6319dfSKishon Vijay Abraham I};
405