126bd3f31SLokesh Vutla// SPDX-License-Identifier: GPL-2.0
226bd3f31SLokesh Vutla/*
326bd3f31SLokesh Vutla * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
426bd3f31SLokesh Vutla */
526bd3f31SLokesh Vutla
626bd3f31SLokesh Vutla/dts-v1/;
726bd3f31SLokesh Vutla
826bd3f31SLokesh Vutla#include "k3-j7200-som-p0.dtsi"
9fc3b1550SGrygorii Strashko#include <dt-bindings/net/ti-dp83867.h>
1026bd3f31SLokesh Vutla
1126bd3f31SLokesh Vutla/ {
1226bd3f31SLokesh Vutla	chosen {
1326bd3f31SLokesh Vutla		stdout-path = "serial2:115200n8";
1426bd3f31SLokesh Vutla		bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
1526bd3f31SLokesh Vutla	};
1626bd3f31SLokesh Vutla};
1726bd3f31SLokesh Vutla
18fc3b1550SGrygorii Strashko&wkup_pmx0 {
19fc3b1550SGrygorii Strashko	mcu_cpsw_pins_default: mcu-cpsw-pins-default {
20fc3b1550SGrygorii Strashko		pinctrl-single,pins = <
21fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */
22fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x006c, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */
23fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */
24fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x0074, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */
25fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x0078, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */
26fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x007c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */
27fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */
28fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x008c, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */
29fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x0090, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */
30fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x0094, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */
31fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* MCU_RGMII1_TXC */
32fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* MCU_RGMII1_RXC */
33fc3b1550SGrygorii Strashko		>;
34fc3b1550SGrygorii Strashko	};
35fc3b1550SGrygorii Strashko
36fc3b1550SGrygorii Strashko	mcu_mdio_pins_default: mcu-mdio1-pins-default {
37fc3b1550SGrygorii Strashko		pinctrl-single,pins = <
38fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
39fc3b1550SGrygorii Strashko			J721E_WKUP_IOPAD(0x0098, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
40fc3b1550SGrygorii Strashko		>;
41fc3b1550SGrygorii Strashko	};
42fc3b1550SGrygorii Strashko};
43fc3b1550SGrygorii Strashko
44e25889f8SVignesh Raghavendra&main_pmx0 {
45e25889f8SVignesh Raghavendra	main_i2c0_pins_default: main-i2c0-pins-default {
46e25889f8SVignesh Raghavendra		pinctrl-single,pins = <
47e25889f8SVignesh Raghavendra			J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */
48e25889f8SVignesh Raghavendra			J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */
49e25889f8SVignesh Raghavendra		>;
50e25889f8SVignesh Raghavendra	};
51e25889f8SVignesh Raghavendra
52e25889f8SVignesh Raghavendra	main_i2c1_pins_default: main-i2c1-pins-default {
53e25889f8SVignesh Raghavendra		pinctrl-single,pins = <
54e25889f8SVignesh Raghavendra			J721E_IOPAD(0xdc, PIN_INPUT_PULLUP, 3) /* (U3) ECAP0_IN_APWM_OUT.I2C1_SCL */
55e25889f8SVignesh Raghavendra			J721E_IOPAD(0xe0, PIN_INPUT_PULLUP, 3) /* (T3) EXT_REFCLK1.I2C1_SDA */
56e25889f8SVignesh Raghavendra		>;
57e25889f8SVignesh Raghavendra	};
58a2178b83SFaiz Abbas
59a2178b83SFaiz Abbas	main_mmc1_pins_default: main-mmc1-pins-default {
60a2178b83SFaiz Abbas		pinctrl-single,pins = <
61a2178b83SFaiz Abbas			J721E_IOPAD(0x104, PIN_INPUT, 0) /* (M20) MMC1_CMD */
62a2178b83SFaiz Abbas			J721E_IOPAD(0x100, PIN_INPUT, 0) /* (P21) MMC1_CLK */
63a2178b83SFaiz Abbas			J721E_IOPAD(0xfc, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */
64a2178b83SFaiz Abbas			J721E_IOPAD(0xf8, PIN_INPUT, 0) /* (M19) MMC1_DAT0 */
65a2178b83SFaiz Abbas			J721E_IOPAD(0xf4, PIN_INPUT, 0) /* (N21) MMC1_DAT1 */
66a2178b83SFaiz Abbas			J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */
67a2178b83SFaiz Abbas			J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */
68a2178b83SFaiz Abbas			J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */
69a2178b83SFaiz Abbas		>;
70a2178b83SFaiz Abbas	};
71e25889f8SVignesh Raghavendra};
72e25889f8SVignesh Raghavendra
7326bd3f31SLokesh Vutla&wkup_uart0 {
7426bd3f31SLokesh Vutla	/* Wakeup UART is used by System firmware */
7526bd3f31SLokesh Vutla	status = "disabled";
7626bd3f31SLokesh Vutla};
7726bd3f31SLokesh Vutla
7826bd3f31SLokesh Vutla&main_uart0 {
7926bd3f31SLokesh Vutla	/* Shared with ATF on this platform */
8026bd3f31SLokesh Vutla	power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
8126bd3f31SLokesh Vutla};
8226bd3f31SLokesh Vutla
8326bd3f31SLokesh Vutla&main_uart2 {
8426bd3f31SLokesh Vutla	/* MAIN UART 2 is used by R5F firmware */
8526bd3f31SLokesh Vutla	status = "disabled";
8626bd3f31SLokesh Vutla};
8726bd3f31SLokesh Vutla
8826bd3f31SLokesh Vutla&main_uart3 {
8926bd3f31SLokesh Vutla	/* UART not brought out */
9026bd3f31SLokesh Vutla	status = "disabled";
9126bd3f31SLokesh Vutla};
9226bd3f31SLokesh Vutla
9326bd3f31SLokesh Vutla&main_uart4 {
9426bd3f31SLokesh Vutla	/* UART not brought out */
9526bd3f31SLokesh Vutla	status = "disabled";
9626bd3f31SLokesh Vutla};
9726bd3f31SLokesh Vutla
9826bd3f31SLokesh Vutla&main_uart5 {
9926bd3f31SLokesh Vutla	/* UART not brought out */
10026bd3f31SLokesh Vutla	status = "disabled";
10126bd3f31SLokesh Vutla};
10226bd3f31SLokesh Vutla
10326bd3f31SLokesh Vutla&main_uart6 {
10426bd3f31SLokesh Vutla	/* UART not brought out */
10526bd3f31SLokesh Vutla	status = "disabled";
10626bd3f31SLokesh Vutla};
10726bd3f31SLokesh Vutla
10826bd3f31SLokesh Vutla&main_uart7 {
10926bd3f31SLokesh Vutla	/* UART not brought out */
11026bd3f31SLokesh Vutla	status = "disabled";
11126bd3f31SLokesh Vutla};
11226bd3f31SLokesh Vutla
11326bd3f31SLokesh Vutla&main_uart8 {
11426bd3f31SLokesh Vutla	/* UART not brought out */
11526bd3f31SLokesh Vutla	status = "disabled";
11626bd3f31SLokesh Vutla};
11726bd3f31SLokesh Vutla
11826bd3f31SLokesh Vutla&main_uart9 {
11926bd3f31SLokesh Vutla	/* UART not brought out */
12026bd3f31SLokesh Vutla	status = "disabled";
12126bd3f31SLokesh Vutla};
122fc3b1550SGrygorii Strashko
123fc3b1550SGrygorii Strashko&mcu_cpsw {
124fc3b1550SGrygorii Strashko	pinctrl-names = "default";
125fc3b1550SGrygorii Strashko	pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
126fc3b1550SGrygorii Strashko};
127fc3b1550SGrygorii Strashko
128fc3b1550SGrygorii Strashko&davinci_mdio {
129fc3b1550SGrygorii Strashko	phy0: ethernet-phy@0 {
130fc3b1550SGrygorii Strashko		reg = <0>;
131fc3b1550SGrygorii Strashko		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
132fc3b1550SGrygorii Strashko		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
133fc3b1550SGrygorii Strashko	};
134fc3b1550SGrygorii Strashko};
135fc3b1550SGrygorii Strashko
136fc3b1550SGrygorii Strashko&cpsw_port1 {
137fc3b1550SGrygorii Strashko	phy-mode = "rgmii-rxid";
138fc3b1550SGrygorii Strashko	phy-handle = <&phy0>;
139fc3b1550SGrygorii Strashko};
140e25889f8SVignesh Raghavendra
141e25889f8SVignesh Raghavendra&main_i2c0 {
142e25889f8SVignesh Raghavendra	pinctrl-names = "default";
143e25889f8SVignesh Raghavendra	pinctrl-0 = <&main_i2c0_pins_default>;
144e25889f8SVignesh Raghavendra	clock-frequency = <400000>;
145e25889f8SVignesh Raghavendra
146e25889f8SVignesh Raghavendra	exp1: gpio@20 {
147e25889f8SVignesh Raghavendra		compatible = "ti,tca6416";
148e25889f8SVignesh Raghavendra		reg = <0x20>;
149e25889f8SVignesh Raghavendra		gpio-controller;
150e25889f8SVignesh Raghavendra		#gpio-cells = <2>;
151e25889f8SVignesh Raghavendra	};
152e25889f8SVignesh Raghavendra
153e25889f8SVignesh Raghavendra	exp2: gpio@22 {
154e25889f8SVignesh Raghavendra		compatible = "ti,tca6424";
155e25889f8SVignesh Raghavendra		reg = <0x22>;
156e25889f8SVignesh Raghavendra		gpio-controller;
157e25889f8SVignesh Raghavendra		#gpio-cells = <2>;
158e25889f8SVignesh Raghavendra	};
159e25889f8SVignesh Raghavendra};
160e25889f8SVignesh Raghavendra
161e25889f8SVignesh Raghavendra&main_i2c1 {
162e25889f8SVignesh Raghavendra	pinctrl-names = "default";
163e25889f8SVignesh Raghavendra	pinctrl-0 = <&main_i2c1_pins_default>;
164e25889f8SVignesh Raghavendra	clock-frequency = <400000>;
165e25889f8SVignesh Raghavendra
166e25889f8SVignesh Raghavendra	exp4: gpio@20 {
167e25889f8SVignesh Raghavendra		compatible = "ti,tca6408";
168e25889f8SVignesh Raghavendra		reg = <0x20>;
169e25889f8SVignesh Raghavendra		gpio-controller;
170e25889f8SVignesh Raghavendra		#gpio-cells = <2>;
171e25889f8SVignesh Raghavendra	};
172e25889f8SVignesh Raghavendra};
173a2178b83SFaiz Abbas
174a2178b83SFaiz Abbas&main_sdhci0 {
175a2178b83SFaiz Abbas	/* eMMC */
176a2178b83SFaiz Abbas	non-removable;
177a2178b83SFaiz Abbas	ti,driver-strength-ohm = <50>;
178a2178b83SFaiz Abbas	disable-wp;
179a2178b83SFaiz Abbas};
180a2178b83SFaiz Abbas
181a2178b83SFaiz Abbas&main_sdhci1 {
182a2178b83SFaiz Abbas	/* SD card */
183a2178b83SFaiz Abbas	pinctrl-0 = <&main_mmc1_pins_default>;
184a2178b83SFaiz Abbas	pinctrl-names = "default";
185a2178b83SFaiz Abbas	ti,driver-strength-ohm = <50>;
186a2178b83SFaiz Abbas	disable-wp;
187a2178b83SFaiz Abbas};
188