126bd3f31SLokesh Vutla// SPDX-License-Identifier: GPL-2.0 226bd3f31SLokesh Vutla/* 326bd3f31SLokesh Vutla * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ 426bd3f31SLokesh Vutla */ 526bd3f31SLokesh Vutla 626bd3f31SLokesh Vutla/dts-v1/; 726bd3f31SLokesh Vutla 826bd3f31SLokesh Vutla#include "k3-j7200-som-p0.dtsi" 93a6319dfSKishon Vijay Abraham I#include <dt-bindings/gpio/gpio.h> 10fc3b1550SGrygorii Strashko#include <dt-bindings/net/ti-dp83867.h> 11e38a45b0SKishon Vijay Abraham I#include <dt-bindings/mux/ti-serdes.h> 12429c0259SKishon Vijay Abraham I#include <dt-bindings/phy/phy.h> 1326bd3f31SLokesh Vutla 1426bd3f31SLokesh Vutla/ { 15*2cf3213dSNishanth Menon compatible = "ti,j7200-evm", "ti,j7200"; 16*2cf3213dSNishanth Menon model = "Texas Instruments J7200 EVM"; 17*2cf3213dSNishanth Menon 1826bd3f31SLokesh Vutla chosen { 1926bd3f31SLokesh Vutla stdout-path = "serial2:115200n8"; 2026bd3f31SLokesh Vutla bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000"; 2126bd3f31SLokesh Vutla }; 2294374990SAswath Govindraju 2394374990SAswath Govindraju evm_12v0: fixedregulator-evm12v0 { 2494374990SAswath Govindraju /* main supply */ 2594374990SAswath Govindraju compatible = "regulator-fixed"; 2694374990SAswath Govindraju regulator-name = "evm_12v0"; 2794374990SAswath Govindraju regulator-min-microvolt = <12000000>; 2894374990SAswath Govindraju regulator-max-microvolt = <12000000>; 2994374990SAswath Govindraju regulator-always-on; 3094374990SAswath Govindraju regulator-boot-on; 3194374990SAswath Govindraju }; 3294374990SAswath Govindraju 3394374990SAswath Govindraju vsys_3v3: fixedregulator-vsys3v3 { 3494374990SAswath Govindraju /* Output of LM5140 */ 3594374990SAswath Govindraju compatible = "regulator-fixed"; 3694374990SAswath Govindraju regulator-name = "vsys_3v3"; 3794374990SAswath Govindraju regulator-min-microvolt = <3300000>; 3894374990SAswath Govindraju regulator-max-microvolt = <3300000>; 3994374990SAswath Govindraju vin-supply = <&evm_12v0>; 4094374990SAswath Govindraju regulator-always-on; 4194374990SAswath Govindraju regulator-boot-on; 4294374990SAswath Govindraju }; 4394374990SAswath Govindraju 4494374990SAswath Govindraju vsys_5v0: fixedregulator-vsys5v0 { 4594374990SAswath Govindraju /* Output of LM5140 */ 4694374990SAswath Govindraju compatible = "regulator-fixed"; 4794374990SAswath Govindraju regulator-name = "vsys_5v0"; 4894374990SAswath Govindraju regulator-min-microvolt = <5000000>; 4994374990SAswath Govindraju regulator-max-microvolt = <5000000>; 5094374990SAswath Govindraju vin-supply = <&evm_12v0>; 5194374990SAswath Govindraju regulator-always-on; 5294374990SAswath Govindraju regulator-boot-on; 5394374990SAswath Govindraju }; 5494374990SAswath Govindraju 5594374990SAswath Govindraju vdd_mmc1: fixedregulator-sd { 5694374990SAswath Govindraju /* Output of TPS22918 */ 5794374990SAswath Govindraju compatible = "regulator-fixed"; 5894374990SAswath Govindraju regulator-name = "vdd_mmc1"; 5994374990SAswath Govindraju regulator-min-microvolt = <3300000>; 6094374990SAswath Govindraju regulator-max-microvolt = <3300000>; 6194374990SAswath Govindraju regulator-boot-on; 6294374990SAswath Govindraju enable-active-high; 6394374990SAswath Govindraju vin-supply = <&vsys_3v3>; 6494374990SAswath Govindraju gpio = <&exp2 2 GPIO_ACTIVE_HIGH>; 6594374990SAswath Govindraju }; 6694374990SAswath Govindraju 6794374990SAswath Govindraju vdd_sd_dv: gpio-regulator-TLV71033 { 6894374990SAswath Govindraju /* Output of TLV71033 */ 6994374990SAswath Govindraju compatible = "regulator-gpio"; 7094374990SAswath Govindraju regulator-name = "tlv71033"; 7194374990SAswath Govindraju pinctrl-names = "default"; 7294374990SAswath Govindraju pinctrl-0 = <&vdd_sd_dv_pins_default>; 7394374990SAswath Govindraju regulator-min-microvolt = <1800000>; 7494374990SAswath Govindraju regulator-max-microvolt = <3300000>; 7594374990SAswath Govindraju regulator-boot-on; 7694374990SAswath Govindraju vin-supply = <&vsys_5v0>; 7794374990SAswath Govindraju gpios = <&main_gpio0 55 GPIO_ACTIVE_HIGH>; 7894374990SAswath Govindraju states = <1800000 0x0>, 7994374990SAswath Govindraju <3300000 0x1>; 8094374990SAswath Govindraju }; 8126bd3f31SLokesh Vutla}; 8226bd3f31SLokesh Vutla 83fc3b1550SGrygorii Strashko&wkup_pmx0 { 84fc3b1550SGrygorii Strashko mcu_cpsw_pins_default: mcu-cpsw-pins-default { 85fc3b1550SGrygorii Strashko pinctrl-single,pins = < 86fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */ 87fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x006c, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */ 88fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */ 89fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x0074, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */ 90fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x0078, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */ 91fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x007c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */ 92fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */ 93fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x008c, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */ 94fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x0090, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */ 95fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x0094, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */ 9669db725cSGrygorii Strashko J721E_WKUP_IOPAD(0x0080, PIN_OUTPUT, 0) /* MCU_RGMII1_TXC */ 97fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* MCU_RGMII1_RXC */ 98fc3b1550SGrygorii Strashko >; 99fc3b1550SGrygorii Strashko }; 100fc3b1550SGrygorii Strashko 101fc3b1550SGrygorii Strashko mcu_mdio_pins_default: mcu-mdio1-pins-default { 102fc3b1550SGrygorii Strashko pinctrl-single,pins = < 103fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */ 104fc3b1550SGrygorii Strashko J721E_WKUP_IOPAD(0x0098, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */ 105fc3b1550SGrygorii Strashko >; 106fc3b1550SGrygorii Strashko }; 107fc3b1550SGrygorii Strashko}; 108fc3b1550SGrygorii Strashko 109e25889f8SVignesh Raghavendra&main_pmx0 { 11094374990SAswath Govindraju main_i2c0_pins_default: main-i2c0-pins-default { 11194374990SAswath Govindraju pinctrl-single,pins = < 11294374990SAswath Govindraju J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */ 11394374990SAswath Govindraju J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */ 11494374990SAswath Govindraju >; 11594374990SAswath Govindraju }; 11694374990SAswath Govindraju 117e25889f8SVignesh Raghavendra main_i2c1_pins_default: main-i2c1-pins-default { 118e25889f8SVignesh Raghavendra pinctrl-single,pins = < 119e25889f8SVignesh Raghavendra J721E_IOPAD(0xdc, PIN_INPUT_PULLUP, 3) /* (U3) ECAP0_IN_APWM_OUT.I2C1_SCL */ 120e25889f8SVignesh Raghavendra J721E_IOPAD(0xe0, PIN_INPUT_PULLUP, 3) /* (T3) EXT_REFCLK1.I2C1_SDA */ 121e25889f8SVignesh Raghavendra >; 122e25889f8SVignesh Raghavendra }; 123a2178b83SFaiz Abbas 124a2178b83SFaiz Abbas main_mmc1_pins_default: main-mmc1-pins-default { 125a2178b83SFaiz Abbas pinctrl-single,pins = < 126a2178b83SFaiz Abbas J721E_IOPAD(0x104, PIN_INPUT, 0) /* (M20) MMC1_CMD */ 127a2178b83SFaiz Abbas J721E_IOPAD(0x100, PIN_INPUT, 0) /* (P21) MMC1_CLK */ 128a2178b83SFaiz Abbas J721E_IOPAD(0xfc, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */ 129a2178b83SFaiz Abbas J721E_IOPAD(0xf8, PIN_INPUT, 0) /* (M19) MMC1_DAT0 */ 130a2178b83SFaiz Abbas J721E_IOPAD(0xf4, PIN_INPUT, 0) /* (N21) MMC1_DAT1 */ 131a2178b83SFaiz Abbas J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */ 132a2178b83SFaiz Abbas J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */ 133a2178b83SFaiz Abbas J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */ 134a2178b83SFaiz Abbas >; 135a2178b83SFaiz Abbas }; 136bbcb0522SRoger Quadros 137bbcb0522SRoger Quadros main_usbss0_pins_default: main-usbss0-pins-default { 138bbcb0522SRoger Quadros pinctrl-single,pins = < 139bbcb0522SRoger Quadros J721E_IOPAD(0x120, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */ 140bbcb0522SRoger Quadros >; 141bbcb0522SRoger Quadros }; 14294374990SAswath Govindraju 14394374990SAswath Govindraju vdd_sd_dv_pins_default: vdd-sd-dv-pins-default { 14494374990SAswath Govindraju pinctrl-single,pins = < 14594374990SAswath Govindraju J721E_IOPAD(0xd0, PIN_OUTPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */ 14694374990SAswath Govindraju >; 14794374990SAswath Govindraju }; 148e25889f8SVignesh Raghavendra}; 149e25889f8SVignesh Raghavendra 15026bd3f31SLokesh Vutla&wkup_uart0 { 15126bd3f31SLokesh Vutla /* Wakeup UART is used by System firmware */ 1524cc34aa8SNishanth Menon status = "reserved"; 15326bd3f31SLokesh Vutla}; 15426bd3f31SLokesh Vutla 15526bd3f31SLokesh Vutla&main_uart0 { 15626bd3f31SLokesh Vutla /* Shared with ATF on this platform */ 15726bd3f31SLokesh Vutla power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>; 15826bd3f31SLokesh Vutla}; 15926bd3f31SLokesh Vutla 16026bd3f31SLokesh Vutla&main_uart2 { 16126bd3f31SLokesh Vutla /* MAIN UART 2 is used by R5F firmware */ 1624cc34aa8SNishanth Menon status = "reserved"; 16326bd3f31SLokesh Vutla}; 16426bd3f31SLokesh Vutla 16526bd3f31SLokesh Vutla&main_uart3 { 16626bd3f31SLokesh Vutla /* UART not brought out */ 16726bd3f31SLokesh Vutla status = "disabled"; 16826bd3f31SLokesh Vutla}; 16926bd3f31SLokesh Vutla 17026bd3f31SLokesh Vutla&main_uart4 { 17126bd3f31SLokesh Vutla /* UART not brought out */ 17226bd3f31SLokesh Vutla status = "disabled"; 17326bd3f31SLokesh Vutla}; 17426bd3f31SLokesh Vutla 17526bd3f31SLokesh Vutla&main_uart5 { 17626bd3f31SLokesh Vutla /* UART not brought out */ 17726bd3f31SLokesh Vutla status = "disabled"; 17826bd3f31SLokesh Vutla}; 17926bd3f31SLokesh Vutla 18026bd3f31SLokesh Vutla&main_uart6 { 18126bd3f31SLokesh Vutla /* UART not brought out */ 18226bd3f31SLokesh Vutla status = "disabled"; 18326bd3f31SLokesh Vutla}; 18426bd3f31SLokesh Vutla 18526bd3f31SLokesh Vutla&main_uart7 { 18626bd3f31SLokesh Vutla /* UART not brought out */ 18726bd3f31SLokesh Vutla status = "disabled"; 18826bd3f31SLokesh Vutla}; 18926bd3f31SLokesh Vutla 19026bd3f31SLokesh Vutla&main_uart8 { 19126bd3f31SLokesh Vutla /* UART not brought out */ 19226bd3f31SLokesh Vutla status = "disabled"; 19326bd3f31SLokesh Vutla}; 19426bd3f31SLokesh Vutla 19526bd3f31SLokesh Vutla&main_uart9 { 19626bd3f31SLokesh Vutla /* UART not brought out */ 19726bd3f31SLokesh Vutla status = "disabled"; 19826bd3f31SLokesh Vutla}; 199fc3b1550SGrygorii Strashko 200f4cc7dafSFaiz Abbas&main_gpio2 { 201f4cc7dafSFaiz Abbas status = "disabled"; 202f4cc7dafSFaiz Abbas}; 203f4cc7dafSFaiz Abbas 204f4cc7dafSFaiz Abbas&main_gpio4 { 205f4cc7dafSFaiz Abbas status = "disabled"; 206f4cc7dafSFaiz Abbas}; 207f4cc7dafSFaiz Abbas 208f4cc7dafSFaiz Abbas&main_gpio6 { 209f4cc7dafSFaiz Abbas status = "disabled"; 210f4cc7dafSFaiz Abbas}; 211f4cc7dafSFaiz Abbas 212f4cc7dafSFaiz Abbas&wkup_gpio1 { 213f4cc7dafSFaiz Abbas status = "disabled"; 214f4cc7dafSFaiz Abbas}; 215f4cc7dafSFaiz Abbas 216fc3b1550SGrygorii Strashko&mcu_cpsw { 217fc3b1550SGrygorii Strashko pinctrl-names = "default"; 218fc3b1550SGrygorii Strashko pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>; 219fc3b1550SGrygorii Strashko}; 220fc3b1550SGrygorii Strashko 221fc3b1550SGrygorii Strashko&davinci_mdio { 222fc3b1550SGrygorii Strashko phy0: ethernet-phy@0 { 223fc3b1550SGrygorii Strashko reg = <0>; 224fc3b1550SGrygorii Strashko ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 225fc3b1550SGrygorii Strashko ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 226fc3b1550SGrygorii Strashko }; 227fc3b1550SGrygorii Strashko}; 228fc3b1550SGrygorii Strashko 229fc3b1550SGrygorii Strashko&cpsw_port1 { 230fc3b1550SGrygorii Strashko phy-mode = "rgmii-rxid"; 231fc3b1550SGrygorii Strashko phy-handle = <&phy0>; 232fc3b1550SGrygorii Strashko}; 233e25889f8SVignesh Raghavendra 234e25889f8SVignesh Raghavendra&main_i2c0 { 23594374990SAswath Govindraju pinctrl-names = "default"; 23694374990SAswath Govindraju pinctrl-0 = <&main_i2c0_pins_default>; 23794374990SAswath Govindraju clock-frequency = <400000>; 23894374990SAswath Govindraju 239e25889f8SVignesh Raghavendra exp1: gpio@20 { 240e25889f8SVignesh Raghavendra compatible = "ti,tca6416"; 241e25889f8SVignesh Raghavendra reg = <0x20>; 242e25889f8SVignesh Raghavendra gpio-controller; 243e25889f8SVignesh Raghavendra #gpio-cells = <2>; 244e25889f8SVignesh Raghavendra }; 245e25889f8SVignesh Raghavendra 246e25889f8SVignesh Raghavendra exp2: gpio@22 { 247e25889f8SVignesh Raghavendra compatible = "ti,tca6424"; 248e25889f8SVignesh Raghavendra reg = <0x22>; 249e25889f8SVignesh Raghavendra gpio-controller; 250e25889f8SVignesh Raghavendra #gpio-cells = <2>; 251e25889f8SVignesh Raghavendra }; 252e25889f8SVignesh Raghavendra}; 253e25889f8SVignesh Raghavendra 2542eefbf5fSPeter Ujfalusi/* 2552eefbf5fSPeter Ujfalusi * The j7200 CPB board is identical to the CPB used for J721E, the SOMs can be 2562eefbf5fSPeter Ujfalusi * swapped on the CPB. 2572eefbf5fSPeter Ujfalusi * 2582eefbf5fSPeter Ujfalusi * main_i2c1 of J7200 is connected to the CPB i2c bus labeled as i2c3. 2592eefbf5fSPeter Ujfalusi * The i2c1 of the CPB (as it is labeled) is not connected to j7200. 2602eefbf5fSPeter Ujfalusi */ 261e25889f8SVignesh Raghavendra&main_i2c1 { 262e25889f8SVignesh Raghavendra pinctrl-names = "default"; 263e25889f8SVignesh Raghavendra pinctrl-0 = <&main_i2c1_pins_default>; 264e25889f8SVignesh Raghavendra clock-frequency = <400000>; 265e25889f8SVignesh Raghavendra 2662eefbf5fSPeter Ujfalusi exp3: gpio@20 { 267e25889f8SVignesh Raghavendra compatible = "ti,tca6408"; 268e25889f8SVignesh Raghavendra reg = <0x20>; 269e25889f8SVignesh Raghavendra gpio-controller; 270e25889f8SVignesh Raghavendra #gpio-cells = <2>; 2712eefbf5fSPeter Ujfalusi gpio-line-names = "CODEC_RSTz", "CODEC_SPARE1", "UB926_RESETn", 2722eefbf5fSPeter Ujfalusi "UB926_LOCK", "UB926_PWR_SW_CNTRL", 2732eefbf5fSPeter Ujfalusi "UB926_TUNER_RESET", "UB926_GPIO_SPARE", ""; 274e25889f8SVignesh Raghavendra }; 275e25889f8SVignesh Raghavendra}; 276a2178b83SFaiz Abbas 277a2178b83SFaiz Abbas&main_sdhci0 { 278a2178b83SFaiz Abbas /* eMMC */ 279a2178b83SFaiz Abbas non-removable; 280a2178b83SFaiz Abbas ti,driver-strength-ohm = <50>; 281a2178b83SFaiz Abbas disable-wp; 282a2178b83SFaiz Abbas}; 283a2178b83SFaiz Abbas 284a2178b83SFaiz Abbas&main_sdhci1 { 285a2178b83SFaiz Abbas /* SD card */ 286a2178b83SFaiz Abbas pinctrl-0 = <&main_mmc1_pins_default>; 287a2178b83SFaiz Abbas pinctrl-names = "default"; 28894374990SAswath Govindraju vmmc-supply = <&vdd_mmc1>; 28994374990SAswath Govindraju vqmmc-supply = <&vdd_sd_dv>; 290a2178b83SFaiz Abbas ti,driver-strength-ohm = <50>; 291a2178b83SFaiz Abbas disable-wp; 292a2178b83SFaiz Abbas}; 293e38a45b0SKishon Vijay Abraham I 294e38a45b0SKishon Vijay Abraham I&serdes_ln_ctrl { 295e38a45b0SKishon Vijay Abraham I idle-states = <J7200_SERDES0_LANE0_PCIE1_LANE0>, <J7200_SERDES0_LANE1_PCIE1_LANE1>, 296e38a45b0SKishon Vijay Abraham I <J7200_SERDES0_LANE2_QSGMII_LANE1>, <J7200_SERDES0_LANE3_IP4_UNUSED>; 297e38a45b0SKishon Vijay Abraham I}; 298bbcb0522SRoger Quadros 299bbcb0522SRoger Quadros&usb_serdes_mux { 300bbcb0522SRoger Quadros idle-states = <1>; /* USB0 to SERDES lane 3 */ 301bbcb0522SRoger Quadros}; 302bbcb0522SRoger Quadros 303bbcb0522SRoger Quadros&usbss0 { 304bbcb0522SRoger Quadros pinctrl-names = "default"; 305bbcb0522SRoger Quadros pinctrl-0 = <&main_usbss0_pins_default>; 306bbcb0522SRoger Quadros ti,vbus-divider; 307bbcb0522SRoger Quadros ti,usb2-only; 308bbcb0522SRoger Quadros}; 309bbcb0522SRoger Quadros 310bbcb0522SRoger Quadros&usb0 { 311bbcb0522SRoger Quadros dr_mode = "otg"; 312bbcb0522SRoger Quadros maximum-speed = "high-speed"; 313bbcb0522SRoger Quadros}; 314e6b45168SVignesh Raghavendra 315e6b45168SVignesh Raghavendra&tscadc0 { 316e6b45168SVignesh Raghavendra adc { 317e6b45168SVignesh Raghavendra ti,adc-channels = <0 1 2 3 4 5 6 7>; 318e6b45168SVignesh Raghavendra }; 319e6b45168SVignesh Raghavendra}; 320429c0259SKishon Vijay Abraham I 321429c0259SKishon Vijay Abraham I&serdes_refclk { 322429c0259SKishon Vijay Abraham I clock-frequency = <100000000>; 323429c0259SKishon Vijay Abraham I}; 324429c0259SKishon Vijay Abraham I 325429c0259SKishon Vijay Abraham I&serdes0 { 326429c0259SKishon Vijay Abraham I serdes0_pcie_link: phy@0 { 327429c0259SKishon Vijay Abraham I reg = <0>; 328429c0259SKishon Vijay Abraham I cdns,num-lanes = <2>; 329429c0259SKishon Vijay Abraham I #phy-cells = <0>; 330429c0259SKishon Vijay Abraham I cdns,phy-type = <PHY_TYPE_PCIE>; 331429c0259SKishon Vijay Abraham I resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>; 332429c0259SKishon Vijay Abraham I }; 333429c0259SKishon Vijay Abraham I 334429c0259SKishon Vijay Abraham I serdes0_qsgmii_link: phy@1 { 335429c0259SKishon Vijay Abraham I reg = <2>; 336429c0259SKishon Vijay Abraham I cdns,num-lanes = <1>; 337429c0259SKishon Vijay Abraham I #phy-cells = <0>; 338429c0259SKishon Vijay Abraham I cdns,phy-type = <PHY_TYPE_QSGMII>; 339429c0259SKishon Vijay Abraham I resets = <&serdes_wiz0 3>; 340429c0259SKishon Vijay Abraham I }; 341429c0259SKishon Vijay Abraham I}; 3423a6319dfSKishon Vijay Abraham I 3433a6319dfSKishon Vijay Abraham I&pcie1_rc { 3443a6319dfSKishon Vijay Abraham I reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>; 3453a6319dfSKishon Vijay Abraham I phys = <&serdes0_pcie_link>; 3463a6319dfSKishon Vijay Abraham I phy-names = "pcie-phy"; 3473a6319dfSKishon Vijay Abraham I num-lanes = <2>; 3483a6319dfSKishon Vijay Abraham I}; 3493a6319dfSKishon Vijay Abraham I 3503a6319dfSKishon Vijay Abraham I&pcie1_ep { 3513a6319dfSKishon Vijay Abraham I phys = <&serdes0_pcie_link>; 3523a6319dfSKishon Vijay Abraham I phy-names = "pcie-phy"; 3533a6319dfSKishon Vijay Abraham I num-lanes = <2>; 3543a6319dfSKishon Vijay Abraham I status = "disabled"; 3553a6319dfSKishon Vijay Abraham I}; 356