1ea47eed3SNishanth Menon// SPDX-License-Identifier: GPL-2.0 2ea47eed3SNishanth Menon/* 3ea47eed3SNishanth Menon * Device Tree Source for AM6 SoC family in Quad core configuration 4ea47eed3SNishanth Menon * 5303d6f62SAlexander A. Klimov * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/ 6ea47eed3SNishanth Menon */ 7ea47eed3SNishanth Menon 8ea47eed3SNishanth Menon#include "k3-am65.dtsi" 9ea47eed3SNishanth Menon 10ea47eed3SNishanth Menon/ { 11ea47eed3SNishanth Menon cpus { 12ea47eed3SNishanth Menon #address-cells = <1>; 13ea47eed3SNishanth Menon #size-cells = <0>; 14ea47eed3SNishanth Menon cpu-map { 15ea47eed3SNishanth Menon cluster0: cluster0 { 16ea47eed3SNishanth Menon core0 { 17ea47eed3SNishanth Menon cpu = <&cpu0>; 18ea47eed3SNishanth Menon }; 19ea47eed3SNishanth Menon 20ea47eed3SNishanth Menon core1 { 21ea47eed3SNishanth Menon cpu = <&cpu1>; 22ea47eed3SNishanth Menon }; 23ea47eed3SNishanth Menon }; 24ea47eed3SNishanth Menon 25ea47eed3SNishanth Menon cluster1: cluster1 { 26ea47eed3SNishanth Menon core0 { 27ea47eed3SNishanth Menon cpu = <&cpu2>; 28ea47eed3SNishanth Menon }; 29ea47eed3SNishanth Menon 30ea47eed3SNishanth Menon core1 { 31ea47eed3SNishanth Menon cpu = <&cpu3>; 32ea47eed3SNishanth Menon }; 33ea47eed3SNishanth Menon }; 34ea47eed3SNishanth Menon }; 35ea47eed3SNishanth Menon 36ea47eed3SNishanth Menon cpu0: cpu@0 { 3731af04cdSRob Herring compatible = "arm,cortex-a53"; 38ea47eed3SNishanth Menon reg = <0x000>; 39ea47eed3SNishanth Menon device_type = "cpu"; 40ea47eed3SNishanth Menon enable-method = "psci"; 41ea47eed3SNishanth Menon i-cache-size = <0x8000>; 42ea47eed3SNishanth Menon i-cache-line-size = <64>; 43ea47eed3SNishanth Menon i-cache-sets = <256>; 44ea47eed3SNishanth Menon d-cache-size = <0x8000>; 45ea47eed3SNishanth Menon d-cache-line-size = <64>; 46ea47eed3SNishanth Menon d-cache-sets = <128>; 47ea47eed3SNishanth Menon next-level-cache = <&L2_0>; 48ea47eed3SNishanth Menon }; 49ea47eed3SNishanth Menon 50ea47eed3SNishanth Menon cpu1: cpu@1 { 5131af04cdSRob Herring compatible = "arm,cortex-a53"; 52ea47eed3SNishanth Menon reg = <0x001>; 53ea47eed3SNishanth Menon device_type = "cpu"; 54ea47eed3SNishanth Menon enable-method = "psci"; 55ea47eed3SNishanth Menon i-cache-size = <0x8000>; 56ea47eed3SNishanth Menon i-cache-line-size = <64>; 57ea47eed3SNishanth Menon i-cache-sets = <256>; 58ea47eed3SNishanth Menon d-cache-size = <0x8000>; 59ea47eed3SNishanth Menon d-cache-line-size = <64>; 60ea47eed3SNishanth Menon d-cache-sets = <128>; 61ea47eed3SNishanth Menon next-level-cache = <&L2_0>; 62ea47eed3SNishanth Menon }; 63ea47eed3SNishanth Menon 64ea47eed3SNishanth Menon cpu2: cpu@100 { 6531af04cdSRob Herring compatible = "arm,cortex-a53"; 66ea47eed3SNishanth Menon reg = <0x100>; 67ea47eed3SNishanth Menon device_type = "cpu"; 68ea47eed3SNishanth Menon enable-method = "psci"; 69ea47eed3SNishanth Menon i-cache-size = <0x8000>; 70ea47eed3SNishanth Menon i-cache-line-size = <64>; 71ea47eed3SNishanth Menon i-cache-sets = <256>; 72ea47eed3SNishanth Menon d-cache-size = <0x8000>; 73ea47eed3SNishanth Menon d-cache-line-size = <64>; 74ea47eed3SNishanth Menon d-cache-sets = <128>; 75ea47eed3SNishanth Menon next-level-cache = <&L2_1>; 76ea47eed3SNishanth Menon }; 77ea47eed3SNishanth Menon 78ea47eed3SNishanth Menon cpu3: cpu@101 { 7931af04cdSRob Herring compatible = "arm,cortex-a53"; 80ea47eed3SNishanth Menon reg = <0x101>; 81ea47eed3SNishanth Menon device_type = "cpu"; 82ea47eed3SNishanth Menon enable-method = "psci"; 83ea47eed3SNishanth Menon i-cache-size = <0x8000>; 84ea47eed3SNishanth Menon i-cache-line-size = <64>; 85ea47eed3SNishanth Menon i-cache-sets = <256>; 86ea47eed3SNishanth Menon d-cache-size = <0x8000>; 87ea47eed3SNishanth Menon d-cache-line-size = <64>; 88ea47eed3SNishanth Menon d-cache-sets = <128>; 89ea47eed3SNishanth Menon next-level-cache = <&L2_1>; 90ea47eed3SNishanth Menon }; 91ea47eed3SNishanth Menon }; 92ea47eed3SNishanth Menon 93ea47eed3SNishanth Menon L2_0: l2-cache0 { 94ea47eed3SNishanth Menon compatible = "cache"; 95ea47eed3SNishanth Menon cache-level = <2>; 96880932e6SPierre Gondois cache-unified; 97ea47eed3SNishanth Menon cache-size = <0x80000>; 98ea47eed3SNishanth Menon cache-line-size = <64>; 99ea47eed3SNishanth Menon cache-sets = <512>; 100ea47eed3SNishanth Menon next-level-cache = <&msmc_l3>; 101ea47eed3SNishanth Menon }; 102ea47eed3SNishanth Menon 103ea47eed3SNishanth Menon L2_1: l2-cache1 { 104ea47eed3SNishanth Menon compatible = "cache"; 105ea47eed3SNishanth Menon cache-level = <2>; 106880932e6SPierre Gondois cache-unified; 107ea47eed3SNishanth Menon cache-size = <0x80000>; 108ea47eed3SNishanth Menon cache-line-size = <64>; 109ea47eed3SNishanth Menon cache-sets = <512>; 110ea47eed3SNishanth Menon next-level-cache = <&msmc_l3>; 111ea47eed3SNishanth Menon }; 112ea47eed3SNishanth Menon 113ea47eed3SNishanth Menon msmc_l3: l3-cache0 { 114ea47eed3SNishanth Menon compatible = "cache"; 115ea47eed3SNishanth Menon cache-level = <3>; 116*9b8c6da0SKrzysztof Kozlowski cache-unified; 117ea47eed3SNishanth Menon }; 1186037c75bSNishanth Menon 1196037c75bSNishanth Menon thermal_zones: thermal-zones { 1206037c75bSNishanth Menon #include "k3-am654-industrial-thermal.dtsi" 1216037c75bSNishanth Menon }; 122ea47eed3SNishanth Menon}; 123