14201af25SNishanth Menon// SPDX-License-Identifier: GPL-2.0 24201af25SNishanth Menon/* 34201af25SNishanth Menon * Device Tree Source for AM6 SoC Family MCU Domain peripherals 44201af25SNishanth Menon * 54201af25SNishanth Menon * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/ 64201af25SNishanth Menon */ 74201af25SNishanth Menon 84201af25SNishanth Menon&cbass_mcu { 94201af25SNishanth Menon mcu_uart0: serial@40a00000 { 104201af25SNishanth Menon compatible = "ti,am654-uart"; 114201af25SNishanth Menon reg = <0x00 0x40a00000 0x00 0x100>; 124201af25SNishanth Menon reg-shift = <2>; 134201af25SNishanth Menon reg-io-width = <4>; 144201af25SNishanth Menon interrupts = <GIC_SPI 565 IRQ_TYPE_LEVEL_HIGH>; 154201af25SNishanth Menon clock-frequency = <96000000>; 164201af25SNishanth Menon current-speed = <115200>; 17c484fc95SVignesh R power-domains = <&k3_pds 149>; 184201af25SNishanth Menon }; 1919a1768fSVignesh R 2019a1768fSVignesh R mcu_i2c0: i2c@40b00000 { 2119a1768fSVignesh R compatible = "ti,am654-i2c", "ti,omap4-i2c"; 2219a1768fSVignesh R reg = <0x0 0x40b00000 0x0 0x100>; 2319a1768fSVignesh R interrupts = <GIC_SPI 564 IRQ_TYPE_LEVEL_HIGH>; 2419a1768fSVignesh R #address-cells = <1>; 2519a1768fSVignesh R #size-cells = <0>; 2619a1768fSVignesh R clock-names = "fck"; 2719a1768fSVignesh R clocks = <&k3_clks 114 1>; 2819a1768fSVignesh R power-domains = <&k3_pds 114>; 2919a1768fSVignesh R }; 302cd7d393SVignesh R 312cd7d393SVignesh R mcu_spi0: spi@40300000 { 322cd7d393SVignesh R compatible = "ti,am654-mcspi","ti,omap4-mcspi"; 332cd7d393SVignesh R reg = <0x0 0x40300000 0x0 0x400>; 342cd7d393SVignesh R interrupts = <GIC_SPI 560 IRQ_TYPE_LEVEL_HIGH>; 352cd7d393SVignesh R clocks = <&k3_clks 142 1>; 362cd7d393SVignesh R power-domains = <&k3_pds 142>; 372cd7d393SVignesh R #address-cells = <1>; 382cd7d393SVignesh R #size-cells = <0>; 392cd7d393SVignesh R }; 402cd7d393SVignesh R 412cd7d393SVignesh R mcu_spi1: spi@40310000 { 422cd7d393SVignesh R compatible = "ti,am654-mcspi","ti,omap4-mcspi"; 432cd7d393SVignesh R reg = <0x0 0x40310000 0x0 0x400>; 442cd7d393SVignesh R interrupts = <GIC_SPI 561 IRQ_TYPE_LEVEL_HIGH>; 452cd7d393SVignesh R clocks = <&k3_clks 143 1>; 462cd7d393SVignesh R power-domains = <&k3_pds 143>; 472cd7d393SVignesh R #address-cells = <1>; 482cd7d393SVignesh R #size-cells = <0>; 492cd7d393SVignesh R }; 502cd7d393SVignesh R 512cd7d393SVignesh R mcu_spi2: spi@40320000 { 522cd7d393SVignesh R compatible = "ti,am654-mcspi","ti,omap4-mcspi"; 532cd7d393SVignesh R reg = <0x0 0x40320000 0x0 0x400>; 542cd7d393SVignesh R interrupts = <GIC_SPI 562 IRQ_TYPE_LEVEL_HIGH>; 552cd7d393SVignesh R clocks = <&k3_clks 144 1>; 562cd7d393SVignesh R power-domains = <&k3_pds 144>; 572cd7d393SVignesh R #address-cells = <1>; 582cd7d393SVignesh R #size-cells = <0>; 592cd7d393SVignesh R }; 60aa6eaaa2SVignesh R 61aa6eaaa2SVignesh R tscadc0: tscadc@40200000 { 62aa6eaaa2SVignesh R compatible = "ti,am654-tscadc", "ti,am3359-tscadc"; 63aa6eaaa2SVignesh R reg = <0x0 0x40200000 0x0 0x1000>; 64aa6eaaa2SVignesh R interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>; 65aa6eaaa2SVignesh R clocks = <&k3_clks 0 2>; 66aa6eaaa2SVignesh R assigned-clocks = <&k3_clks 0 2>; 67aa6eaaa2SVignesh R assigned-clock-rates = <60000000>; 68aa6eaaa2SVignesh R clock-names = "adc_tsc_fck"; 69aa6eaaa2SVignesh R 70aa6eaaa2SVignesh R adc { 71aa6eaaa2SVignesh R #io-channel-cells = <1>; 72aa6eaaa2SVignesh R compatible = "ti,am654-adc", "ti,am3359-adc"; 73aa6eaaa2SVignesh R }; 74aa6eaaa2SVignesh R }; 75aa6eaaa2SVignesh R 76aa6eaaa2SVignesh R tscadc1: tscadc@40210000 { 77aa6eaaa2SVignesh R compatible = "ti,am654-tscadc", "ti,am3359-tscadc"; 78aa6eaaa2SVignesh R reg = <0x0 0x40210000 0x0 0x1000>; 79aa6eaaa2SVignesh R interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>; 80aa6eaaa2SVignesh R clocks = <&k3_clks 1 2>; 81aa6eaaa2SVignesh R assigned-clocks = <&k3_clks 1 2>; 82aa6eaaa2SVignesh R assigned-clock-rates = <60000000>; 83aa6eaaa2SVignesh R clock-names = "adc_tsc_fck"; 84aa6eaaa2SVignesh R 85aa6eaaa2SVignesh R adc { 86aa6eaaa2SVignesh R #io-channel-cells = <1>; 87aa6eaaa2SVignesh R compatible = "ti,am654-adc", "ti,am3359-adc"; 88aa6eaaa2SVignesh R }; 89aa6eaaa2SVignesh R }; 904201af25SNishanth Menon}; 91