14867caf4SLokesh Vutla// SPDX-License-Identifier: GPL-2.0 24867caf4SLokesh Vutla/* 34867caf4SLokesh Vutla * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ 44867caf4SLokesh Vutla */ 54867caf4SLokesh Vutla 64867caf4SLokesh Vutla/dts-v1/; 74867caf4SLokesh Vutla 84e8aa4e3SKishon Vijay Abraham I#include <dt-bindings/phy/phy.h> 94867caf4SLokesh Vutla#include <dt-bindings/gpio/gpio.h> 107fe968d2SVignesh Raghavendra#include <dt-bindings/net/ti-dp83867.h> 11b216dc1aSAparna M#include <dt-bindings/leds/common.h> 124867caf4SLokesh Vutla#include "k3-am642.dtsi" 134867caf4SLokesh Vutla 148d08d7aaSJayesh Choudhary#include "k3-serdes.h" 158d08d7aaSJayesh Choudhary 164867caf4SLokesh Vutla/ { 174867caf4SLokesh Vutla compatible = "ti,am642-sk", "ti,am642"; 184867caf4SLokesh Vutla model = "Texas Instruments AM642 SK"; 194867caf4SLokesh Vutla 204867caf4SLokesh Vutla chosen { 216b343136SAndrew Davis stdout-path = &main_uart0; 22bb3d6578SNishanth Menon }; 23bb3d6578SNishanth Menon 24bb3d6578SNishanth Menon aliases { 25bb3d6578SNishanth Menon serial0 = &mcu_uart0; 26bb3d6578SNishanth Menon serial1 = &main_uart1; 27bb3d6578SNishanth Menon serial2 = &main_uart0; 28bb3d6578SNishanth Menon i2c0 = &main_i2c0; 29bb3d6578SNishanth Menon i2c1 = &main_i2c1; 30bb3d6578SNishanth Menon mmc0 = &sdhci0; 31bb3d6578SNishanth Menon mmc1 = &sdhci1; 32bb3d6578SNishanth Menon ethernet0 = &cpsw_port1; 33bb3d6578SNishanth Menon ethernet1 = &cpsw_port2; 344867caf4SLokesh Vutla }; 354867caf4SLokesh Vutla 364867caf4SLokesh Vutla memory@80000000 { 374867caf4SLokesh Vutla device_type = "memory"; 384867caf4SLokesh Vutla /* 2G RAM */ 394867caf4SLokesh Vutla reg = <0x00000000 0x80000000 0x00000000 0x80000000>; 404867caf4SLokesh Vutla }; 414867caf4SLokesh Vutla 424867caf4SLokesh Vutla reserved-memory { 434867caf4SLokesh Vutla #address-cells = <2>; 444867caf4SLokesh Vutla #size-cells = <2>; 454867caf4SLokesh Vutla ranges; 464867caf4SLokesh Vutla 474867caf4SLokesh Vutla secure_ddr: optee@9e800000 { 484867caf4SLokesh Vutla reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ 494867caf4SLokesh Vutla alignment = <0x1000>; 504867caf4SLokesh Vutla no-map; 514867caf4SLokesh Vutla }; 52d71abfccSSuman Anna 53d71abfccSSuman Anna main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { 54d71abfccSSuman Anna compatible = "shared-dma-pool"; 55d71abfccSSuman Anna reg = <0x00 0xa0000000 0x00 0x100000>; 56d71abfccSSuman Anna no-map; 57d71abfccSSuman Anna }; 58d71abfccSSuman Anna 59d71abfccSSuman Anna main_r5fss0_core0_memory_region: r5f-memory@a0100000 { 60d71abfccSSuman Anna compatible = "shared-dma-pool"; 61d71abfccSSuman Anna reg = <0x00 0xa0100000 0x00 0xf00000>; 62d71abfccSSuman Anna no-map; 63d71abfccSSuman Anna }; 64d71abfccSSuman Anna 65d71abfccSSuman Anna main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { 66d71abfccSSuman Anna compatible = "shared-dma-pool"; 67d71abfccSSuman Anna reg = <0x00 0xa1000000 0x00 0x100000>; 68d71abfccSSuman Anna no-map; 69d71abfccSSuman Anna }; 70d71abfccSSuman Anna 71d71abfccSSuman Anna main_r5fss0_core1_memory_region: r5f-memory@a1100000 { 72d71abfccSSuman Anna compatible = "shared-dma-pool"; 73d71abfccSSuman Anna reg = <0x00 0xa1100000 0x00 0xf00000>; 74d71abfccSSuman Anna no-map; 75d71abfccSSuman Anna }; 76d71abfccSSuman Anna 77d71abfccSSuman Anna main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 { 78d71abfccSSuman Anna compatible = "shared-dma-pool"; 79d71abfccSSuman Anna reg = <0x00 0xa2000000 0x00 0x100000>; 80d71abfccSSuman Anna no-map; 81d71abfccSSuman Anna }; 82d71abfccSSuman Anna 83d71abfccSSuman Anna main_r5fss1_core0_memory_region: r5f-memory@a2100000 { 84d71abfccSSuman Anna compatible = "shared-dma-pool"; 85d71abfccSSuman Anna reg = <0x00 0xa2100000 0x00 0xf00000>; 86d71abfccSSuman Anna no-map; 87d71abfccSSuman Anna }; 88d71abfccSSuman Anna 89d71abfccSSuman Anna main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 { 90d71abfccSSuman Anna compatible = "shared-dma-pool"; 91d71abfccSSuman Anna reg = <0x00 0xa3000000 0x00 0x100000>; 92d71abfccSSuman Anna no-map; 93d71abfccSSuman Anna }; 94d71abfccSSuman Anna 95d71abfccSSuman Anna main_r5fss1_core1_memory_region: r5f-memory@a3100000 { 96d71abfccSSuman Anna compatible = "shared-dma-pool"; 97d71abfccSSuman Anna reg = <0x00 0xa3100000 0x00 0xf00000>; 98d71abfccSSuman Anna no-map; 99d71abfccSSuman Anna }; 100d71abfccSSuman Anna 101d71abfccSSuman Anna rtos_ipc_memory_region: ipc-memories@a5000000 { 102d71abfccSSuman Anna reg = <0x00 0xa5000000 0x00 0x00800000>; 103d71abfccSSuman Anna alignment = <0x1000>; 104d71abfccSSuman Anna no-map; 105d71abfccSSuman Anna }; 1064867caf4SLokesh Vutla }; 1074867caf4SLokesh Vutla 108826b6679SNishanth Menon vusb_main: regulator-0 { 1094867caf4SLokesh Vutla /* USB MAIN INPUT 5V DC */ 1104867caf4SLokesh Vutla compatible = "regulator-fixed"; 1114867caf4SLokesh Vutla regulator-name = "vusb_main5v0"; 1124867caf4SLokesh Vutla regulator-min-microvolt = <5000000>; 1134867caf4SLokesh Vutla regulator-max-microvolt = <5000000>; 1144867caf4SLokesh Vutla regulator-always-on; 1154867caf4SLokesh Vutla regulator-boot-on; 1164867caf4SLokesh Vutla }; 1174867caf4SLokesh Vutla 118826b6679SNishanth Menon vcc_3v3_sys: regulator-1 { 1194867caf4SLokesh Vutla /* output of LP8733xx */ 1204867caf4SLokesh Vutla compatible = "regulator-fixed"; 1214867caf4SLokesh Vutla regulator-name = "vcc_3v3_sys"; 1224867caf4SLokesh Vutla regulator-min-microvolt = <3300000>; 1234867caf4SLokesh Vutla regulator-max-microvolt = <3300000>; 1244867caf4SLokesh Vutla vin-supply = <&vusb_main>; 1254867caf4SLokesh Vutla regulator-always-on; 1264867caf4SLokesh Vutla regulator-boot-on; 1274867caf4SLokesh Vutla }; 1284867caf4SLokesh Vutla 129826b6679SNishanth Menon vdd_mmc1: regulator-2 { 1304867caf4SLokesh Vutla /* TPS2051BD */ 1314867caf4SLokesh Vutla compatible = "regulator-fixed"; 1324867caf4SLokesh Vutla regulator-name = "vdd_mmc1"; 1334867caf4SLokesh Vutla regulator-min-microvolt = <3300000>; 1344867caf4SLokesh Vutla regulator-max-microvolt = <3300000>; 1354867caf4SLokesh Vutla regulator-boot-on; 1364867caf4SLokesh Vutla enable-active-high; 1374867caf4SLokesh Vutla vin-supply = <&vcc_3v3_sys>; 1384867caf4SLokesh Vutla gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; 1394867caf4SLokesh Vutla }; 140065d6261SKishon Vijay Abraham I 141826b6679SNishanth Menon com8_ls_en: regulator-3 { 142065d6261SKishon Vijay Abraham I compatible = "regulator-fixed"; 143065d6261SKishon Vijay Abraham I regulator-name = "com8_ls_en"; 144065d6261SKishon Vijay Abraham I regulator-min-microvolt = <3300000>; 145065d6261SKishon Vijay Abraham I regulator-max-microvolt = <3300000>; 146065d6261SKishon Vijay Abraham I regulator-always-on; 147065d6261SKishon Vijay Abraham I regulator-boot-on; 148065d6261SKishon Vijay Abraham I pinctrl-0 = <&main_com8_ls_en_pins_default>; 149065d6261SKishon Vijay Abraham I pinctrl-names = "default"; 150065d6261SKishon Vijay Abraham I gpio = <&main_gpio0 62 GPIO_ACTIVE_LOW>; 151065d6261SKishon Vijay Abraham I }; 152065d6261SKishon Vijay Abraham I 153826b6679SNishanth Menon wlan_en: regulator-4 { 154065d6261SKishon Vijay Abraham I /* output of SN74AVC4T245RSVR */ 155065d6261SKishon Vijay Abraham I compatible = "regulator-fixed"; 156065d6261SKishon Vijay Abraham I regulator-name = "wlan_en"; 157065d6261SKishon Vijay Abraham I regulator-min-microvolt = <1800000>; 158065d6261SKishon Vijay Abraham I regulator-max-microvolt = <1800000>; 159065d6261SKishon Vijay Abraham I enable-active-high; 160065d6261SKishon Vijay Abraham I pinctrl-0 = <&main_wlan_en_pins_default>; 161065d6261SKishon Vijay Abraham I pinctrl-names = "default"; 162065d6261SKishon Vijay Abraham I vin-supply = <&com8_ls_en>; 163065d6261SKishon Vijay Abraham I gpio = <&main_gpio0 48 GPIO_ACTIVE_HIGH>; 164065d6261SKishon Vijay Abraham I }; 165b216dc1aSAparna M 166b216dc1aSAparna M led-controller { 167b216dc1aSAparna M compatible = "gpio-leds"; 168b216dc1aSAparna M 169b216dc1aSAparna M led-0 { 170b216dc1aSAparna M color = <LED_COLOR_ID_GREEN>; 171b216dc1aSAparna M function = LED_FUNCTION_INDICATOR; 172b216dc1aSAparna M function-enumerator = <1>; 173b216dc1aSAparna M gpios = <&exp2 0 GPIO_ACTIVE_HIGH>; 174b216dc1aSAparna M default-state = "off"; 175b216dc1aSAparna M }; 176b216dc1aSAparna M 177b216dc1aSAparna M led-1 { 178b216dc1aSAparna M color = <LED_COLOR_ID_RED>; 179b216dc1aSAparna M function = LED_FUNCTION_INDICATOR; 180b216dc1aSAparna M function-enumerator = <2>; 181b216dc1aSAparna M gpios = <&exp2 1 GPIO_ACTIVE_HIGH>; 182b216dc1aSAparna M default-state = "off"; 183b216dc1aSAparna M }; 184b216dc1aSAparna M 185b216dc1aSAparna M led-2 { 186b216dc1aSAparna M color = <LED_COLOR_ID_GREEN>; 187b216dc1aSAparna M function = LED_FUNCTION_INDICATOR; 188b216dc1aSAparna M function-enumerator = <3>; 189b216dc1aSAparna M gpios = <&exp2 2 GPIO_ACTIVE_HIGH>; 190b216dc1aSAparna M default-state = "off"; 191b216dc1aSAparna M }; 192b216dc1aSAparna M 193b216dc1aSAparna M led-3 { 194b216dc1aSAparna M color = <LED_COLOR_ID_AMBER>; 195b216dc1aSAparna M function = LED_FUNCTION_INDICATOR; 196b216dc1aSAparna M function-enumerator = <4>; 197b216dc1aSAparna M gpios = <&exp2 3 GPIO_ACTIVE_HIGH>; 198b216dc1aSAparna M default-state = "off"; 199b216dc1aSAparna M }; 200b216dc1aSAparna M 201b216dc1aSAparna M led-4 { 202b216dc1aSAparna M color = <LED_COLOR_ID_GREEN>; 203b216dc1aSAparna M function = LED_FUNCTION_INDICATOR; 204b216dc1aSAparna M function-enumerator = <5>; 205b216dc1aSAparna M gpios = <&exp2 4 GPIO_ACTIVE_HIGH>; 206b216dc1aSAparna M default-state = "off"; 207b216dc1aSAparna M }; 208b216dc1aSAparna M 209b216dc1aSAparna M led-5 { 210b216dc1aSAparna M color = <LED_COLOR_ID_RED>; 211b216dc1aSAparna M function = LED_FUNCTION_INDICATOR; 212b216dc1aSAparna M function-enumerator = <6>; 213b216dc1aSAparna M gpios = <&exp2 5 GPIO_ACTIVE_HIGH>; 214b216dc1aSAparna M default-state = "off"; 215b216dc1aSAparna M }; 216b216dc1aSAparna M 217b216dc1aSAparna M led-6 { 218b216dc1aSAparna M color = <LED_COLOR_ID_GREEN>; 219b216dc1aSAparna M function = LED_FUNCTION_INDICATOR; 220b216dc1aSAparna M function-enumerator = <7>; 221b216dc1aSAparna M gpios = <&exp2 6 GPIO_ACTIVE_HIGH>; 222b216dc1aSAparna M default-state = "off"; 223b216dc1aSAparna M }; 224b216dc1aSAparna M 225b216dc1aSAparna M led-7 { 226b216dc1aSAparna M color = <LED_COLOR_ID_AMBER>; 227b216dc1aSAparna M function = LED_FUNCTION_HEARTBEAT; 228b216dc1aSAparna M function-enumerator = <8>; 229b216dc1aSAparna M linux,default-trigger = "heartbeat"; 230b216dc1aSAparna M gpios = <&exp2 7 GPIO_ACTIVE_HIGH>; 231b216dc1aSAparna M }; 232b216dc1aSAparna M }; 2334867caf4SLokesh Vutla}; 2344867caf4SLokesh Vutla 2354867caf4SLokesh Vutla&main_pmx0 { 236a4956811STony Lindgren main_mmc1_pins_default: main-mmc1-default-pins { 2374867caf4SLokesh Vutla pinctrl-single,pins = < 238744545ffSNishanth Menon AM64X_IOPAD(0x029c, PIN_INPUT_PULLUP, 0) /* (C20) MMC1_SDWP */ 239744545ffSNishanth Menon AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */ 240744545ffSNishanth Menon AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */ 2414867caf4SLokesh Vutla AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* (#N/A) MMC1_CLKLB */ 242744545ffSNishanth Menon AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */ 243744545ffSNishanth Menon AM64X_IOPAD(0x0288, PIN_INPUT_PULLUP, 0) /* (K21) MMC1_DAT0 */ 244744545ffSNishanth Menon AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0) /* (L21) MMC1_DAT1 */ 245744545ffSNishanth Menon AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0) /* (K19) MMC1_DAT2 */ 246744545ffSNishanth Menon AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1_DAT3 */ 2474867caf4SLokesh Vutla >; 2484867caf4SLokesh Vutla }; 2494867caf4SLokesh Vutla 250a4956811STony Lindgren main_uart0_pins_default: main-uart0-default-pins { 251c553bf25SAswath Govindraju pinctrl-single,pins = < 252c553bf25SAswath Govindraju AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */ 253c553bf25SAswath Govindraju AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */ 254c553bf25SAswath Govindraju AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */ 255c553bf25SAswath Govindraju AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */ 256c553bf25SAswath Govindraju >; 257c553bf25SAswath Govindraju }; 258c553bf25SAswath Govindraju 259a4956811STony Lindgren main_uart1_pins_default: main-uart1-default-pins { 260c8da2f20SNishanth Menon pinctrl-single,pins = < 261c8da2f20SNishanth Menon AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */ 262c8da2f20SNishanth Menon AM64X_IOPAD(0x024c, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */ 263c8da2f20SNishanth Menon AM64X_IOPAD(0x0240, PIN_INPUT, 0) /* (E15) UART1_RXD */ 264c8da2f20SNishanth Menon AM64X_IOPAD(0x0244, PIN_OUTPUT, 0) /* (E14) UART1_TXD */ 265c8da2f20SNishanth Menon >; 266c8da2f20SNishanth Menon }; 267c8da2f20SNishanth Menon 268a4956811STony Lindgren main_usb0_pins_default: main-usb0-default-pins { 2694e8aa4e3SKishon Vijay Abraham I pinctrl-single,pins = < 2704e8aa4e3SKishon Vijay Abraham I AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */ 2714e8aa4e3SKishon Vijay Abraham I >; 2724e8aa4e3SKishon Vijay Abraham I }; 2734e8aa4e3SKishon Vijay Abraham I 274a4956811STony Lindgren main_i2c0_pins_default: main-i2c0-default-pins { 2751d79ca01SNishanth Menon pinctrl-single,pins = < 2761d79ca01SNishanth Menon AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */ 2771d79ca01SNishanth Menon AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */ 2781d79ca01SNishanth Menon >; 2791d79ca01SNishanth Menon }; 2801d79ca01SNishanth Menon 281a4956811STony Lindgren main_i2c1_pins_default: main-i2c1-default-pins { 2824867caf4SLokesh Vutla pinctrl-single,pins = < 2834867caf4SLokesh Vutla AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */ 2844867caf4SLokesh Vutla AM64X_IOPAD(0x026c, PIN_INPUT_PULLUP, 0) /* (B19) I2C1_SDA */ 2854867caf4SLokesh Vutla >; 2864867caf4SLokesh Vutla }; 2877fe968d2SVignesh Raghavendra 288a4956811STony Lindgren mdio1_pins_default: mdio1-default-pins { 2897fe968d2SVignesh Raghavendra pinctrl-single,pins = < 2907fe968d2SVignesh Raghavendra AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */ 2917fe968d2SVignesh Raghavendra AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */ 2927fe968d2SVignesh Raghavendra >; 2937fe968d2SVignesh Raghavendra }; 2947fe968d2SVignesh Raghavendra 295a4956811STony Lindgren rgmii1_pins_default: rgmii1-default-pins { 2967fe968d2SVignesh Raghavendra pinctrl-single,pins = < 2977fe968d2SVignesh Raghavendra AM64X_IOPAD(0x011c, PIN_INPUT, 4) /* (AA13) PRG1_PRU1_GPO5.RGMII1_RD0 */ 2987fe968d2SVignesh Raghavendra AM64X_IOPAD(0x0128, PIN_INPUT, 4) /* (U12) PRG1_PRU1_GPO8.RGMII1_RD1 */ 2997fe968d2SVignesh Raghavendra AM64X_IOPAD(0x0150, PIN_INPUT, 4) /* (Y13) PRG1_PRU1_GPO18.RGMII1_RD2 */ 3007fe968d2SVignesh Raghavendra AM64X_IOPAD(0x0154, PIN_INPUT, 4) /* (V12) PRG1_PRU1_GPO19.RGMII1_RD3 */ 3017fe968d2SVignesh Raghavendra AM64X_IOPAD(0x00d8, PIN_INPUT, 4) /* (W13) PRG1_PRU0_GPO8.RGMII1_RXC */ 3027fe968d2SVignesh Raghavendra AM64X_IOPAD(0x00cc, PIN_INPUT, 4) /* (V13) PRG1_PRU0_GPO5.RGMII1_RX_CTL */ 3037fe968d2SVignesh Raghavendra AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */ 3047fe968d2SVignesh Raghavendra AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */ 3057fe968d2SVignesh Raghavendra AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */ 3067fe968d2SVignesh Raghavendra AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */ 3077fe968d2SVignesh Raghavendra AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */ 3087fe968d2SVignesh Raghavendra AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */ 3097fe968d2SVignesh Raghavendra >; 3107fe968d2SVignesh Raghavendra }; 3117fe968d2SVignesh Raghavendra 312a4956811STony Lindgren rgmii2_pins_default: rgmii2-default-pins { 3137fe968d2SVignesh Raghavendra pinctrl-single,pins = < 3147fe968d2SVignesh Raghavendra AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */ 3157fe968d2SVignesh Raghavendra AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */ 3167fe968d2SVignesh Raghavendra AM64X_IOPAD(0x0110, PIN_INPUT, 4) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */ 3177fe968d2SVignesh Raghavendra AM64X_IOPAD(0x0114, PIN_INPUT, 4) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */ 3187fe968d2SVignesh Raghavendra AM64X_IOPAD(0x0120, PIN_INPUT, 4) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */ 3197fe968d2SVignesh Raghavendra AM64X_IOPAD(0x0118, PIN_INPUT, 4) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */ 3207fe968d2SVignesh Raghavendra AM64X_IOPAD(0x0134, PIN_OUTPUT, 4) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */ 3217fe968d2SVignesh Raghavendra AM64X_IOPAD(0x0138, PIN_OUTPUT, 4) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */ 3227fe968d2SVignesh Raghavendra AM64X_IOPAD(0x013c, PIN_OUTPUT, 4) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */ 3237fe968d2SVignesh Raghavendra AM64X_IOPAD(0x0140, PIN_OUTPUT, 4) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */ 3247fe968d2SVignesh Raghavendra AM64X_IOPAD(0x0148, PIN_OUTPUT, 4) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */ 3257fe968d2SVignesh Raghavendra AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */ 3267fe968d2SVignesh Raghavendra >; 3277fe968d2SVignesh Raghavendra }; 328e4e4e894SVignesh Raghavendra 329a4956811STony Lindgren ospi0_pins_default: ospi0-default-pins { 330e4e4e894SVignesh Raghavendra pinctrl-single,pins = < 331e4e4e894SVignesh Raghavendra AM64X_IOPAD(0x0000, PIN_OUTPUT, 0) /* (N20) OSPI0_CLK */ 332e4e4e894SVignesh Raghavendra AM64X_IOPAD(0x002c, PIN_OUTPUT, 0) /* (L19) OSPI0_CSn0 */ 333e4e4e894SVignesh Raghavendra AM64X_IOPAD(0x000c, PIN_INPUT, 0) /* (M19) OSPI0_D0 */ 334e4e4e894SVignesh Raghavendra AM64X_IOPAD(0x0010, PIN_INPUT, 0) /* (M18) OSPI0_D1 */ 335e4e4e894SVignesh Raghavendra AM64X_IOPAD(0x0014, PIN_INPUT, 0) /* (M20) OSPI0_D2 */ 336e4e4e894SVignesh Raghavendra AM64X_IOPAD(0x0018, PIN_INPUT, 0) /* (M21) OSPI0_D3 */ 337e4e4e894SVignesh Raghavendra AM64X_IOPAD(0x001c, PIN_INPUT, 0) /* (P21) OSPI0_D4 */ 338e4e4e894SVignesh Raghavendra AM64X_IOPAD(0x0020, PIN_INPUT, 0) /* (P20) OSPI0_D5 */ 339e4e4e894SVignesh Raghavendra AM64X_IOPAD(0x0024, PIN_INPUT, 0) /* (N18) OSPI0_D6 */ 340e4e4e894SVignesh Raghavendra AM64X_IOPAD(0x0028, PIN_INPUT, 0) /* (M17) OSPI0_D7 */ 341e4e4e894SVignesh Raghavendra AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */ 342e4e4e894SVignesh Raghavendra >; 343e4e4e894SVignesh Raghavendra }; 344c1fa5ac6SLokesh Vutla 345a4956811STony Lindgren main_ecap0_pins_default: main-ecap0-default-pins { 346c1fa5ac6SLokesh Vutla pinctrl-single,pins = < 347c1fa5ac6SLokesh Vutla AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */ 348c1fa5ac6SLokesh Vutla >; 349c1fa5ac6SLokesh Vutla }; 350a4956811STony Lindgren main_wlan_en_pins_default: main-wlan-en-default-pins { 351065d6261SKishon Vijay Abraham I pinctrl-single,pins = < 352065d6261SKishon Vijay Abraham I AM64X_IOPAD(0x00c4, PIN_OUTPUT_PULLUP, 7) /* (V8) GPIO0_48 */ 353065d6261SKishon Vijay Abraham I >; 354065d6261SKishon Vijay Abraham I }; 355065d6261SKishon Vijay Abraham I 356a4956811STony Lindgren main_com8_ls_en_pins_default: main-com8-ls-en-default-pins { 357065d6261SKishon Vijay Abraham I pinctrl-single,pins = < 358065d6261SKishon Vijay Abraham I AM64X_IOPAD(0x00fc, PIN_OUTPUT, 7) /* (U7) PRG1_PRU0_GPO17.GPIO0_62 */ 359065d6261SKishon Vijay Abraham I >; 360065d6261SKishon Vijay Abraham I }; 361065d6261SKishon Vijay Abraham I 362a4956811STony Lindgren main_wlan_pins_default: main-wlan-default-pins { 363065d6261SKishon Vijay Abraham I pinctrl-single,pins = < 364065d6261SKishon Vijay Abraham I AM64X_IOPAD(0x00bc, PIN_INPUT, 7) /* (U8) GPIO0_46 */ 365065d6261SKishon Vijay Abraham I >; 366065d6261SKishon Vijay Abraham I }; 3674867caf4SLokesh Vutla}; 3684867caf4SLokesh Vutla 369c553bf25SAswath Govindraju&main_uart0 { 370dacf4705SAndrew Davis status = "okay"; 371c553bf25SAswath Govindraju pinctrl-names = "default"; 372c553bf25SAswath Govindraju pinctrl-0 = <&main_uart0_pins_default>; 37327f98f3eSAndrew Davis current-speed = <115200>; 374c553bf25SAswath Govindraju}; 375c553bf25SAswath Govindraju 3764867caf4SLokesh Vutla&main_uart1 { 3774867caf4SLokesh Vutla /* main_uart1 is reserved for firmware usage */ 3784867caf4SLokesh Vutla status = "reserved"; 379c8da2f20SNishanth Menon pinctrl-names = "default"; 380c8da2f20SNishanth Menon pinctrl-0 = <&main_uart1_pins_default>; 3814867caf4SLokesh Vutla}; 3824867caf4SLokesh Vutla 3831d79ca01SNishanth Menon&main_i2c0 { 3841d79ca01SNishanth Menon status = "okay"; 3851d79ca01SNishanth Menon pinctrl-names = "default"; 3861d79ca01SNishanth Menon pinctrl-0 = <&main_i2c0_pins_default>; 3871d79ca01SNishanth Menon clock-frequency = <400000>; 3881d79ca01SNishanth Menon 3891d79ca01SNishanth Menon eeprom@51 { 3901d79ca01SNishanth Menon compatible = "atmel,24c512"; 3911d79ca01SNishanth Menon reg = <0x51>; 3921d79ca01SNishanth Menon }; 3931d79ca01SNishanth Menon}; 3941d79ca01SNishanth Menon 3954867caf4SLokesh Vutla&main_i2c1 { 396b80f75d8SAndrew Davis status = "okay"; 3974867caf4SLokesh Vutla pinctrl-names = "default"; 3984867caf4SLokesh Vutla pinctrl-0 = <&main_i2c1_pins_default>; 3994867caf4SLokesh Vutla clock-frequency = <400000>; 4004867caf4SLokesh Vutla 4014867caf4SLokesh Vutla exp1: gpio@70 { 4024867caf4SLokesh Vutla compatible = "nxp,pca9538"; 4034867caf4SLokesh Vutla reg = <0x70>; 4044867caf4SLokesh Vutla gpio-controller; 4054867caf4SLokesh Vutla #gpio-cells = <2>; 4064867caf4SLokesh Vutla gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST", 4074867caf4SLokesh Vutla "PRU_DETECT", "MMC1_SD_EN", 4084867caf4SLokesh Vutla "VPP_LDO_EN", "RPI_PS_3V3_En", 4094867caf4SLokesh Vutla "RPI_PS_5V0_En", "RPI_HAT_DETECT"; 4104867caf4SLokesh Vutla }; 411b216dc1aSAparna M 412b216dc1aSAparna M exp2: gpio@60 { 413b216dc1aSAparna M compatible = "ti,tpic2810"; 414b216dc1aSAparna M reg = <0x60>; 415b216dc1aSAparna M gpio-controller; 416b216dc1aSAparna M #gpio-cells = <2>; 417b216dc1aSAparna M gpio-line-names = "LED1","LED2","LED3","LED4","LED5","LED6","LED7","LED8"; 418b216dc1aSAparna M }; 4194867caf4SLokesh Vutla}; 4204867caf4SLokesh Vutla 421d5a4d541SAswath Govindraju/* mcu_gpio0 is reserved for mcu firmware usage */ 422d5a4d541SAswath Govindraju&mcu_gpio0 { 423d5a4d541SAswath Govindraju status = "reserved"; 424d5a4d541SAswath Govindraju}; 425d5a4d541SAswath Govindraju 426065d6261SKishon Vijay Abraham I&sdhci0 { 427065d6261SKishon Vijay Abraham I vmmc-supply = <&wlan_en>; 428065d6261SKishon Vijay Abraham I bus-width = <4>; 429065d6261SKishon Vijay Abraham I non-removable; 430065d6261SKishon Vijay Abraham I cap-power-off-card; 431065d6261SKishon Vijay Abraham I keep-power-in-suspend; 432065d6261SKishon Vijay Abraham I ti,driver-strength-ohm = <50>; 433065d6261SKishon Vijay Abraham I 434065d6261SKishon Vijay Abraham I #address-cells = <1>; 435065d6261SKishon Vijay Abraham I #size-cells = <0>; 436065d6261SKishon Vijay Abraham I wlcore: wlcore@2 { 437065d6261SKishon Vijay Abraham I compatible = "ti,wl1837"; 438065d6261SKishon Vijay Abraham I reg = <2>; 439065d6261SKishon Vijay Abraham I pinctrl-0 = <&main_wlan_pins_default>; 440065d6261SKishon Vijay Abraham I pinctrl-names = "default"; 441065d6261SKishon Vijay Abraham I interrupt-parent = <&main_gpio0>; 442065d6261SKishon Vijay Abraham I interrupts = <46 IRQ_TYPE_EDGE_FALLING>; 443065d6261SKishon Vijay Abraham I }; 444065d6261SKishon Vijay Abraham I}; 445065d6261SKishon Vijay Abraham I 4464867caf4SLokesh Vutla&sdhci1 { 4474867caf4SLokesh Vutla /* SD/MMC */ 4484867caf4SLokesh Vutla vmmc-supply = <&vdd_mmc1>; 4494867caf4SLokesh Vutla pinctrl-names = "default"; 4504867caf4SLokesh Vutla bus-width = <4>; 4514867caf4SLokesh Vutla pinctrl-0 = <&main_mmc1_pins_default>; 4524867caf4SLokesh Vutla ti,driver-strength-ohm = <50>; 4534867caf4SLokesh Vutla disable-wp; 4544867caf4SLokesh Vutla}; 4557fe968d2SVignesh Raghavendra 4564e8aa4e3SKishon Vijay Abraham I&serdes_ln_ctrl { 4574e8aa4e3SKishon Vijay Abraham I idle-states = <AM64_SERDES0_LANE0_USB>; 4584e8aa4e3SKishon Vijay Abraham I}; 4594e8aa4e3SKishon Vijay Abraham I 4604e8aa4e3SKishon Vijay Abraham I&serdes0 { 4614e8aa4e3SKishon Vijay Abraham I serdes0_usb_link: phy@0 { 4624e8aa4e3SKishon Vijay Abraham I reg = <0>; 4634e8aa4e3SKishon Vijay Abraham I cdns,num-lanes = <1>; 4644e8aa4e3SKishon Vijay Abraham I #phy-cells = <0>; 4654e8aa4e3SKishon Vijay Abraham I cdns,phy-type = <PHY_TYPE_USB3>; 4664e8aa4e3SKishon Vijay Abraham I resets = <&serdes_wiz0 1>; 4674e8aa4e3SKishon Vijay Abraham I }; 4684e8aa4e3SKishon Vijay Abraham I}; 4694e8aa4e3SKishon Vijay Abraham I 4704e8aa4e3SKishon Vijay Abraham I&usbss0 { 4714e8aa4e3SKishon Vijay Abraham I ti,vbus-divider; 4724e8aa4e3SKishon Vijay Abraham I}; 4734e8aa4e3SKishon Vijay Abraham I 4744e8aa4e3SKishon Vijay Abraham I&usb0 { 4754e8aa4e3SKishon Vijay Abraham I dr_mode = "host"; 4764e8aa4e3SKishon Vijay Abraham I maximum-speed = "super-speed"; 4774e8aa4e3SKishon Vijay Abraham I pinctrl-names = "default"; 4784e8aa4e3SKishon Vijay Abraham I pinctrl-0 = <&main_usb0_pins_default>; 4794e8aa4e3SKishon Vijay Abraham I phys = <&serdes0_usb_link>; 4804e8aa4e3SKishon Vijay Abraham I phy-names = "cdns3,usb3-phy"; 4814e8aa4e3SKishon Vijay Abraham I}; 4824e8aa4e3SKishon Vijay Abraham I 4837fe968d2SVignesh Raghavendra&cpsw3g { 4847fe968d2SVignesh Raghavendra pinctrl-names = "default"; 4850e97d245SNishanth Menon pinctrl-0 = <&rgmii1_pins_default>, <&rgmii2_pins_default>; 4867fe968d2SVignesh Raghavendra}; 4877fe968d2SVignesh Raghavendra 4887fe968d2SVignesh Raghavendra&cpsw_port1 { 4897fe968d2SVignesh Raghavendra phy-mode = "rgmii-rxid"; 4907fe968d2SVignesh Raghavendra phy-handle = <&cpsw3g_phy0>; 4917fe968d2SVignesh Raghavendra}; 4927fe968d2SVignesh Raghavendra 4937fe968d2SVignesh Raghavendra&cpsw_port2 { 4947fe968d2SVignesh Raghavendra phy-mode = "rgmii-rxid"; 4957fe968d2SVignesh Raghavendra phy-handle = <&cpsw3g_phy1>; 4967fe968d2SVignesh Raghavendra}; 4977fe968d2SVignesh Raghavendra 4987fe968d2SVignesh Raghavendra&cpsw3g_mdio { 499f572888bSAndrew Davis status = "okay"; 500aa62d661SAndrew Davis pinctrl-names = "default"; 501aa62d661SAndrew Davis pinctrl-0 = <&mdio1_pins_default>; 502aa62d661SAndrew Davis 5037fe968d2SVignesh Raghavendra cpsw3g_phy0: ethernet-phy@0 { 5047fe968d2SVignesh Raghavendra reg = <0>; 5057fe968d2SVignesh Raghavendra ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 5067fe968d2SVignesh Raghavendra ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 5077fe968d2SVignesh Raghavendra }; 5087fe968d2SVignesh Raghavendra 5097fe968d2SVignesh Raghavendra cpsw3g_phy1: ethernet-phy@1 { 5107fe968d2SVignesh Raghavendra reg = <1>; 5117fe968d2SVignesh Raghavendra ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 5127fe968d2SVignesh Raghavendra ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 5137fe968d2SVignesh Raghavendra }; 5147fe968d2SVignesh Raghavendra}; 515fad4e18fSVignesh Raghavendra 516fad4e18fSVignesh Raghavendra&tscadc0 { 517fad4e18fSVignesh Raghavendra status = "disabled"; 518fad4e18fSVignesh Raghavendra}; 519e4e4e894SVignesh Raghavendra 520e4e4e894SVignesh Raghavendra&ospi0 { 521*cd9f6b32SAndrew Davis status = "okay"; 522e4e4e894SVignesh Raghavendra pinctrl-names = "default"; 523e4e4e894SVignesh Raghavendra pinctrl-0 = <&ospi0_pins_default>; 524e4e4e894SVignesh Raghavendra 525e4e4e894SVignesh Raghavendra flash@0 { 526e4e4e894SVignesh Raghavendra compatible = "jedec,spi-nor"; 527e4e4e894SVignesh Raghavendra reg = <0x0>; 528e4e4e894SVignesh Raghavendra spi-tx-bus-width = <8>; 529e4e4e894SVignesh Raghavendra spi-rx-bus-width = <8>; 530e4e4e894SVignesh Raghavendra spi-max-frequency = <25000000>; 531e4e4e894SVignesh Raghavendra cdns,tshsl-ns = <60>; 532e4e4e894SVignesh Raghavendra cdns,tsd2d-ns = <60>; 533e4e4e894SVignesh Raghavendra cdns,tchsh-ns = <60>; 534e4e4e894SVignesh Raghavendra cdns,tslch-ns = <60>; 535e4e4e894SVignesh Raghavendra cdns,read-delay = <4>; 5369227c49aSVaishnav Achath 5379227c49aSVaishnav Achath partitions { 5389227c49aSVaishnav Achath compatible = "fixed-partitions"; 5399227c49aSVaishnav Achath #address-cells = <1>; 5409227c49aSVaishnav Achath #size-cells = <1>; 5419227c49aSVaishnav Achath 5429227c49aSVaishnav Achath partition@0 { 5439227c49aSVaishnav Achath label = "ospi.tiboot3"; 5449227c49aSVaishnav Achath reg = <0x0 0x100000>; 5459227c49aSVaishnav Achath }; 5469227c49aSVaishnav Achath 5479227c49aSVaishnav Achath partition@100000 { 5489227c49aSVaishnav Achath label = "ospi.tispl"; 5499227c49aSVaishnav Achath reg = <0x100000 0x200000>; 5509227c49aSVaishnav Achath }; 5519227c49aSVaishnav Achath 5529227c49aSVaishnav Achath partition@300000 { 5539227c49aSVaishnav Achath label = "ospi.u-boot"; 5549227c49aSVaishnav Achath reg = <0x300000 0x400000>; 5559227c49aSVaishnav Achath }; 5569227c49aSVaishnav Achath 5579227c49aSVaishnav Achath partition@700000 { 5589227c49aSVaishnav Achath label = "ospi.env"; 5599227c49aSVaishnav Achath reg = <0x700000 0x40000>; 5609227c49aSVaishnav Achath }; 5619227c49aSVaishnav Achath 5629227c49aSVaishnav Achath partition@740000 { 5639227c49aSVaishnav Achath label = "ospi.env.backup"; 5649227c49aSVaishnav Achath reg = <0x740000 0x40000>; 5659227c49aSVaishnav Achath }; 5669227c49aSVaishnav Achath 5679227c49aSVaishnav Achath partition@800000 { 5689227c49aSVaishnav Achath label = "ospi.rootfs"; 5699227c49aSVaishnav Achath reg = <0x800000 0x37c0000>; 5709227c49aSVaishnav Achath }; 5719227c49aSVaishnav Achath 5729227c49aSVaishnav Achath partition@3fc0000 { 5739227c49aSVaishnav Achath label = "ospi.phypattern"; 5749227c49aSVaishnav Achath reg = <0x3fc0000 0x40000>; 5759227c49aSVaishnav Achath }; 5769227c49aSVaishnav Achath }; 577e4e4e894SVignesh Raghavendra }; 578e4e4e894SVignesh Raghavendra}; 5797dd84752SSuman Anna 5807dd84752SSuman Anna&mailbox0_cluster2 { 58191f983ffSAndrew Davis status = "okay"; 58291f983ffSAndrew Davis 5837dd84752SSuman Anna mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { 5847dd84752SSuman Anna ti,mbox-rx = <0 0 2>; 5857dd84752SSuman Anna ti,mbox-tx = <1 0 2>; 5867dd84752SSuman Anna }; 5877dd84752SSuman Anna 5887dd84752SSuman Anna mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { 5897dd84752SSuman Anna ti,mbox-rx = <2 0 2>; 5907dd84752SSuman Anna ti,mbox-tx = <3 0 2>; 5917dd84752SSuman Anna }; 5927dd84752SSuman Anna}; 5937dd84752SSuman Anna 5947dd84752SSuman Anna&mailbox0_cluster4 { 59591f983ffSAndrew Davis status = "okay"; 59691f983ffSAndrew Davis 5977dd84752SSuman Anna mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 { 5987dd84752SSuman Anna ti,mbox-rx = <0 0 2>; 5997dd84752SSuman Anna ti,mbox-tx = <1 0 2>; 6007dd84752SSuman Anna }; 6017dd84752SSuman Anna 6027dd84752SSuman Anna mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 { 6037dd84752SSuman Anna ti,mbox-rx = <2 0 2>; 6047dd84752SSuman Anna ti,mbox-tx = <3 0 2>; 6057dd84752SSuman Anna }; 6067dd84752SSuman Anna}; 6077dd84752SSuman Anna 6087dd84752SSuman Anna&mailbox0_cluster6 { 60991f983ffSAndrew Davis status = "okay"; 61091f983ffSAndrew Davis 6117dd84752SSuman Anna mbox_m4_0: mbox-m4-0 { 6127dd84752SSuman Anna ti,mbox-rx = <0 0 2>; 6137dd84752SSuman Anna ti,mbox-tx = <1 0 2>; 6147dd84752SSuman Anna }; 6157dd84752SSuman Anna}; 6167dd84752SSuman Anna 6170afadba4SSuman Anna&main_r5fss0_core0 { 6180e97d245SNishanth Menon mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core0>; 619d71abfccSSuman Anna memory-region = <&main_r5fss0_core0_dma_memory_region>, 620d71abfccSSuman Anna <&main_r5fss0_core0_memory_region>; 6210afadba4SSuman Anna}; 6220afadba4SSuman Anna 6230afadba4SSuman Anna&main_r5fss0_core1 { 6240e97d245SNishanth Menon mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core1>; 625d71abfccSSuman Anna memory-region = <&main_r5fss0_core1_dma_memory_region>, 626d71abfccSSuman Anna <&main_r5fss0_core1_memory_region>; 6270afadba4SSuman Anna}; 6280afadba4SSuman Anna 6290afadba4SSuman Anna&main_r5fss1_core0 { 6300e97d245SNishanth Menon mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core0>; 631d71abfccSSuman Anna memory-region = <&main_r5fss1_core0_dma_memory_region>, 632d71abfccSSuman Anna <&main_r5fss1_core0_memory_region>; 6330afadba4SSuman Anna}; 6340afadba4SSuman Anna 6350afadba4SSuman Anna&main_r5fss1_core1 { 6360e97d245SNishanth Menon mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core1>; 637d71abfccSSuman Anna memory-region = <&main_r5fss1_core1_dma_memory_region>, 638d71abfccSSuman Anna <&main_r5fss1_core1_memory_region>; 6390afadba4SSuman Anna}; 6400afadba4SSuman Anna 641c1fa5ac6SLokesh Vutla&ecap0 { 642dcac8eaaSAndrew Davis status = "okay"; 643c1fa5ac6SLokesh Vutla /* PWM is available on Pin 1 of header J3 */ 644c1fa5ac6SLokesh Vutla pinctrl-names = "default"; 645c1fa5ac6SLokesh Vutla pinctrl-0 = <&main_ecap0_pins_default>; 646c1fa5ac6SLokesh Vutla}; 647