1*935c4047SBryan Brattlof// SPDX-License-Identifier: GPL-2.0 2*935c4047SBryan Brattlof/* 3*935c4047SBryan Brattlof * Device Tree file for the AM62P5-SK 4*935c4047SBryan Brattlof * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/ 5*935c4047SBryan Brattlof * 6*935c4047SBryan Brattlof * Schematics: https://www.ti.com/lit/zip/sprr487 7*935c4047SBryan Brattlof */ 8*935c4047SBryan Brattlof 9*935c4047SBryan Brattlof/dts-v1/; 10*935c4047SBryan Brattlof 11*935c4047SBryan Brattlof#include "k3-am62p5.dtsi" 12*935c4047SBryan Brattlof 13*935c4047SBryan Brattlof/ { 14*935c4047SBryan Brattlof compatible = "ti,am62p5-sk", "ti,am62p5"; 15*935c4047SBryan Brattlof model = "Texas Instruments AM62P5 SK"; 16*935c4047SBryan Brattlof 17*935c4047SBryan Brattlof aliases { 18*935c4047SBryan Brattlof serial0 = &wkup_uart0; 19*935c4047SBryan Brattlof serial2 = &main_uart0; 20*935c4047SBryan Brattlof serial3 = &main_uart1; 21*935c4047SBryan Brattlof }; 22*935c4047SBryan Brattlof 23*935c4047SBryan Brattlof chosen { 24*935c4047SBryan Brattlof stdout-path = &main_uart0; 25*935c4047SBryan Brattlof }; 26*935c4047SBryan Brattlof 27*935c4047SBryan Brattlof memory@80000000 { 28*935c4047SBryan Brattlof /* 8G RAM */ 29*935c4047SBryan Brattlof reg = <0x00000000 0x80000000 0x00000000 0x80000000>, 30*935c4047SBryan Brattlof <0x00000008 0x80000000 0x00000001 0x80000000>; 31*935c4047SBryan Brattlof device_type = "memory"; 32*935c4047SBryan Brattlof }; 33*935c4047SBryan Brattlof 34*935c4047SBryan Brattlof reserved-memory { 35*935c4047SBryan Brattlof #address-cells = <2>; 36*935c4047SBryan Brattlof #size-cells = <2>; 37*935c4047SBryan Brattlof ranges; 38*935c4047SBryan Brattlof 39*935c4047SBryan Brattlof secure_tfa_ddr: tfa@9e780000 { 40*935c4047SBryan Brattlof reg = <0x00 0x9e780000 0x00 0x80000>; 41*935c4047SBryan Brattlof no-map; 42*935c4047SBryan Brattlof }; 43*935c4047SBryan Brattlof 44*935c4047SBryan Brattlof secure_ddr: optee@9e800000 { 45*935c4047SBryan Brattlof reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ 46*935c4047SBryan Brattlof no-map; 47*935c4047SBryan Brattlof }; 48*935c4047SBryan Brattlof 49*935c4047SBryan Brattlof wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { 50*935c4047SBryan Brattlof compatible = "shared-dma-pool"; 51*935c4047SBryan Brattlof reg = <0x00 0x9c900000 0x00 0x01e00000>; 52*935c4047SBryan Brattlof no-map; 53*935c4047SBryan Brattlof }; 54*935c4047SBryan Brattlof }; 55*935c4047SBryan Brattlof}; 56*935c4047SBryan Brattlof 57*935c4047SBryan Brattlof&main_pmx0 { 58*935c4047SBryan Brattlof main_uart0_pins_default: main-uart0-default-pins { 59*935c4047SBryan Brattlof bootph-all; 60*935c4047SBryan Brattlof pinctrl-single,pins = < 61*935c4047SBryan Brattlof AM62PX_IOPAD(0x1c8, PIN_INPUT, 0) /* (A22) UART0_RXD */ 62*935c4047SBryan Brattlof AM62PX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */ 63*935c4047SBryan Brattlof AM62PX_IOPAD(0x1d0, PIN_INPUT, 0) /* (A23) UART0_CTSn */ 64*935c4047SBryan Brattlof AM62PX_IOPAD(0x1d4, PIN_OUTPUT, 0) /* (C22) UART0_RTSn */ 65*935c4047SBryan Brattlof >; 66*935c4047SBryan Brattlof }; 67*935c4047SBryan Brattlof 68*935c4047SBryan Brattlof main_uart1_pins_default: main-uart1-default-pins { 69*935c4047SBryan Brattlof bootph-all; 70*935c4047SBryan Brattlof pinctrl-single,pins = < 71*935c4047SBryan Brattlof AM62PX_IOPAD(0x194, PIN_INPUT, 2) /* (D25) MCASP0_AXR3 */ 72*935c4047SBryan Brattlof AM62PX_IOPAD(0x198, PIN_OUTPUT, 2) /* (E25) MCASP0_AXR2 */ 73*935c4047SBryan Brattlof AM62PX_IOPAD(0x1ac, PIN_INPUT, 2) /* (G23) MCASP0_AFSR */ 74*935c4047SBryan Brattlof AM62PX_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (G20) MCASP0_ACLKR */ 75*935c4047SBryan Brattlof >; 76*935c4047SBryan Brattlof }; 77*935c4047SBryan Brattlof}; 78*935c4047SBryan Brattlof 79*935c4047SBryan Brattlof&main_uart0 { 80*935c4047SBryan Brattlof bootph-all; 81*935c4047SBryan Brattlof pinctrl-names = "default"; 82*935c4047SBryan Brattlof pinctrl-0 = <&main_uart0_pins_default>; 83*935c4047SBryan Brattlof status = "okay"; 84*935c4047SBryan Brattlof}; 85*935c4047SBryan Brattlof 86*935c4047SBryan Brattlof&main_uart1 { 87*935c4047SBryan Brattlof pinctrl-names = "default"; 88*935c4047SBryan Brattlof pinctrl-0 = <&main_uart1_pins_default>; 89*935c4047SBryan Brattlof /* Main UART1 is used by TIFS firmware */ 90*935c4047SBryan Brattlof status = "reserved"; 91*935c4047SBryan Brattlof}; 92*935c4047SBryan Brattlof 93*935c4047SBryan Brattlof&cbass_mcu { 94*935c4047SBryan Brattlof bootph-all; 95*935c4047SBryan Brattlof}; 96*935c4047SBryan Brattlof 97*935c4047SBryan Brattlof&mcu_pmx0 { 98*935c4047SBryan Brattlof bootph-all; 99*935c4047SBryan Brattlof wkup_uart0_pins_default: wkup-uart0-default-pins { 100*935c4047SBryan Brattlof bootph-all; 101*935c4047SBryan Brattlof pinctrl-single,pins = < 102*935c4047SBryan Brattlof AM62PX_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C7) WKUP_UART0_CTSn */ 103*935c4047SBryan Brattlof AM62PX_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (C6) WKUP_UART0_RTSn */ 104*935c4047SBryan Brattlof AM62PX_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (D8) WKUP_UART0_RXD */ 105*935c4047SBryan Brattlof AM62PX_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (D7) WKUP_UART0_TXD */ 106*935c4047SBryan Brattlof >; 107*935c4047SBryan Brattlof }; 108*935c4047SBryan Brattlof}; 109*935c4047SBryan Brattlof 110*935c4047SBryan Brattlof&wkup_uart0 { 111*935c4047SBryan Brattlof /* WKUP UART0 is used by DM firmware */ 112*935c4047SBryan Brattlof bootph-all; 113*935c4047SBryan Brattlof pinctrl-names = "default"; 114*935c4047SBryan Brattlof pinctrl-0 = <&wkup_uart0_pins_default>; 115*935c4047SBryan Brattlof status = "reserved"; 116*935c4047SBryan Brattlof}; 117