15fc6b1b6SVignesh Raghavendra// SPDX-License-Identifier: GPL-2.0 25fc6b1b6SVignesh Raghavendra/* 35fc6b1b6SVignesh Raghavendra * Device Tree Source for AM62A SoC Family Wakeup Domain peripherals 45fc6b1b6SVignesh Raghavendra * 55fc6b1b6SVignesh Raghavendra * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ 65fc6b1b6SVignesh Raghavendra */ 75fc6b1b6SVignesh Raghavendra 85fc6b1b6SVignesh Raghavendra&cbass_wakeup { 95fc6b1b6SVignesh Raghavendra wkup_conf: syscon@43000000 { 105fc6b1b6SVignesh Raghavendra compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; 115fc6b1b6SVignesh Raghavendra reg = <0x00 0x43000000 0x00 0x20000>; 125fc6b1b6SVignesh Raghavendra #address-cells = <1>; 135fc6b1b6SVignesh Raghavendra #size-cells = <1>; 145fc6b1b6SVignesh Raghavendra ranges = <0x00 0x00 0x43000000 0x20000>; 155fc6b1b6SVignesh Raghavendra 165fc6b1b6SVignesh Raghavendra chipid: chipid@14 { 175fc6b1b6SVignesh Raghavendra compatible = "ti,am654-chipid"; 185fc6b1b6SVignesh Raghavendra reg = <0x14 0x4>; 195fc6b1b6SVignesh Raghavendra }; 205fc6b1b6SVignesh Raghavendra }; 215fc6b1b6SVignesh Raghavendra 225fc6b1b6SVignesh Raghavendra wkup_uart0: serial@2b300000 { 235fc6b1b6SVignesh Raghavendra compatible = "ti,am64-uart", "ti,am654-uart"; 245fc6b1b6SVignesh Raghavendra reg = <0x00 0x2b300000 0x00 0x100>; 255fc6b1b6SVignesh Raghavendra interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 265fc6b1b6SVignesh Raghavendra power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>; 275fc6b1b6SVignesh Raghavendra clocks = <&k3_clks 114 0>; 285fc6b1b6SVignesh Raghavendra clock-names = "fclk"; 295fc6b1b6SVignesh Raghavendra status = "disabled"; 305fc6b1b6SVignesh Raghavendra }; 315fc6b1b6SVignesh Raghavendra 325fc6b1b6SVignesh Raghavendra wkup_i2c0: i2c@2b200000 { 335fc6b1b6SVignesh Raghavendra compatible = "ti,am64-i2c", "ti,omap4-i2c"; 3481685b3dSKrzysztof Kozlowski reg = <0x00 0x2b200000 0x00 0x100>; 355fc6b1b6SVignesh Raghavendra interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 365fc6b1b6SVignesh Raghavendra #address-cells = <1>; 375fc6b1b6SVignesh Raghavendra #size-cells = <0>; 385fc6b1b6SVignesh Raghavendra power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>; 395fc6b1b6SVignesh Raghavendra clocks = <&k3_clks 107 4>; 405fc6b1b6SVignesh Raghavendra clock-names = "fck"; 415fc6b1b6SVignesh Raghavendra status = "disabled"; 425fc6b1b6SVignesh Raghavendra }; 435fc6b1b6SVignesh Raghavendra 445fc6b1b6SVignesh Raghavendra wkup_rtc0: rtc@2b1f0000 { 455fc6b1b6SVignesh Raghavendra compatible = "ti,am62-rtc"; 465fc6b1b6SVignesh Raghavendra reg = <0x00 0x2b1f0000 0x00 0x100>; 475fc6b1b6SVignesh Raghavendra interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 485fc6b1b6SVignesh Raghavendra clocks = <&k3_clks 117 6> , <&k3_clks 117 0>; 495fc6b1b6SVignesh Raghavendra clock-names = "vbus", "osc32k"; 505fc6b1b6SVignesh Raghavendra power-domains = <&k3_pds 117 TI_SCI_PD_EXCLUSIVE>; 515fc6b1b6SVignesh Raghavendra wakeup-source; 525fc6b1b6SVignesh Raghavendra status = "disabled"; 535fc6b1b6SVignesh Raghavendra }; 54804702e4SNishanth Menon 55804702e4SNishanth Menon wkup_rti0: watchdog@2b000000 { 56804702e4SNishanth Menon compatible = "ti,j7-rti-wdt"; 57804702e4SNishanth Menon reg = <0x00 0x2b000000 0x00 0x100>; 58804702e4SNishanth Menon clocks = <&k3_clks 132 0>; 59804702e4SNishanth Menon power-domains = <&k3_pds 132 TI_SCI_PD_EXCLUSIVE>; 60804702e4SNishanth Menon assigned-clocks = <&k3_clks 132 0>; 61804702e4SNishanth Menon assigned-clock-parents = <&k3_clks 132 2>; 62804702e4SNishanth Menon /* Used by DM firmware */ 63804702e4SNishanth Menon status = "reserved"; 64804702e4SNishanth Menon }; 65*225312fbSBryan Brattlof 66*225312fbSBryan Brattlof wkup_vtm0: temperature-sensor@b00000 { 67*225312fbSBryan Brattlof compatible = "ti,j7200-vtm"; 68*225312fbSBryan Brattlof reg = <0x00 0xb00000 0x00 0x400>, 69*225312fbSBryan Brattlof <0x00 0xb01000 0x00 0x400>; 70*225312fbSBryan Brattlof power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>; 71*225312fbSBryan Brattlof #thermal-sensor-cells = <1>; 72*225312fbSBryan Brattlof }; 735fc6b1b6SVignesh Raghavendra}; 74