1// SPDX-License-Identifier: GPL-2.0
2/*
3 * AM625 SK: https://www.ti.com/lit/zip/sprr448
4 *
5 * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/
6 */
7
8/dts-v1/;
9
10#include <dt-bindings/leds/common.h>
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/net/ti-dp83867.h>
13#include "k3-am625.dtsi"
14
15/ {
16	compatible = "ti,am625-sk", "ti,am625";
17	model = "Texas Instruments AM625 SK";
18
19	aliases {
20		serial2 = &main_uart0;
21		mmc0 = &sdhci0;
22		mmc1 = &sdhci1;
23		mmc2 = &sdhci2;
24		spi0 = &ospi0;
25		ethernet0 = &cpsw_port1;
26		ethernet1 = &cpsw_port2;
27		usb0 = &usb0;
28		usb1 = &usb1;
29	};
30
31	chosen {
32		stdout-path = "serial2:115200n8";
33		bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
34	};
35
36	opp-table {
37		/* Add 1.4GHz OPP for am625-sk board. Requires VDD_CORE to be at 0.85V */
38		opp-1400000000 {
39			opp-hz = /bits/ 64 <1400000000>;
40			opp-supported-hw = <0x01 0x0004>;
41			clock-latency-ns = <6000000>;
42		};
43	};
44
45	memory@80000000 {
46		device_type = "memory";
47		/* 2G RAM */
48		reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
49
50	};
51
52	reserved-memory {
53		#address-cells = <2>;
54		#size-cells = <2>;
55		ranges;
56
57		ramoops@9ca00000 {
58			compatible = "ramoops";
59			reg = <0x00 0x9ca00000 0x00 0x00100000>;
60			record-size = <0x8000>;
61			console-size = <0x8000>;
62			ftrace-size = <0x00>;
63			pmsg-size = <0x8000>;
64		};
65
66		secure_tfa_ddr: tfa@9e780000 {
67			reg = <0x00 0x9e780000 0x00 0x80000>;
68			alignment = <0x1000>;
69			no-map;
70		};
71
72		secure_ddr: optee@9e800000 {
73			reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
74			alignment = <0x1000>;
75			no-map;
76		};
77
78		wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
79			compatible = "shared-dma-pool";
80			reg = <0x00 0x9db00000 0x00 0xc00000>;
81			no-map;
82		};
83	};
84
85	vmain_pd: regulator-0 {
86		/* TPS65988 PD CONTROLLER OUTPUT */
87		compatible = "regulator-fixed";
88		regulator-name = "vmain_pd";
89		regulator-min-microvolt = <5000000>;
90		regulator-max-microvolt = <5000000>;
91		regulator-always-on;
92		regulator-boot-on;
93	};
94
95	vcc_5v0: regulator-1 {
96		/* Output of LM34936 */
97		compatible = "regulator-fixed";
98		regulator-name = "vcc_5v0";
99		regulator-min-microvolt = <5000000>;
100		regulator-max-microvolt = <5000000>;
101		vin-supply = <&vmain_pd>;
102		regulator-always-on;
103		regulator-boot-on;
104	};
105
106	vcc_3v3_sys: regulator-2 {
107		/* output of LM61460-Q1 */
108		compatible = "regulator-fixed";
109		regulator-name = "vcc_3v3_sys";
110		regulator-min-microvolt = <3300000>;
111		regulator-max-microvolt = <3300000>;
112		vin-supply = <&vmain_pd>;
113		regulator-always-on;
114		regulator-boot-on;
115	};
116
117	vdd_mmc1: regulator-3 {
118		/* TPS22918DBVR */
119		compatible = "regulator-fixed";
120		regulator-name = "vdd_mmc1";
121		regulator-min-microvolt = <3300000>;
122		regulator-max-microvolt = <3300000>;
123		regulator-boot-on;
124		enable-active-high;
125		vin-supply = <&vcc_3v3_sys>;
126		gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
127	};
128
129	vdd_sd_dv: regulator-4 {
130		/* Output of TLV71033 */
131		compatible = "regulator-gpio";
132		regulator-name = "tlv71033";
133		pinctrl-names = "default";
134		pinctrl-0 = <&vdd_sd_dv_pins_default>;
135		regulator-min-microvolt = <1800000>;
136		regulator-max-microvolt = <3300000>;
137		regulator-boot-on;
138		vin-supply = <&vcc_5v0>;
139		gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>;
140		states = <1800000 0x0>,
141			 <3300000 0x1>;
142	};
143
144	leds {
145		compatible = "gpio-leds";
146		pinctrl-names = "default";
147		pinctrl-0 = <&usr_led_pins_default>;
148
149		led-0 {
150			label = "am62-sk:green:heartbeat";
151			gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>;
152			linux,default-trigger = "heartbeat";
153			function = LED_FUNCTION_HEARTBEAT;
154			default-state = "off";
155		};
156	};
157};
158
159&main_pmx0 {
160	main_uart0_pins_default: main-uart0-pins-default {
161		pinctrl-single,pins = <
162			AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
163			AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */
164		>;
165	};
166
167	main_i2c0_pins_default: main-i2c0-pins-default {
168		pinctrl-single,pins = <
169			AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
170			AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */
171		>;
172	};
173
174	main_i2c1_pins_default: main-i2c1-pins-default {
175		pinctrl-single,pins = <
176			AM62X_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */
177			AM62X_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */
178		>;
179	};
180
181	main_i2c2_pins_default: main-i2c2-pins-default {
182		pinctrl-single,pins = <
183			AM62X_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */
184			AM62X_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */
185		>;
186	};
187
188	main_mmc0_pins_default: main-mmc0-pins-default {
189		pinctrl-single,pins = <
190			AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
191			AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
192			AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */
193			AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (AA1) MMC0_DAT1 */
194			AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (AA3) MMC0_DAT2 */
195			AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (Y4) MMC0_DAT3 */
196			AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (AB2) MMC0_DAT4 */
197			AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (AC1) MMC0_DAT5 */
198			AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (AD2) MMC0_DAT6 */
199			AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2) MMC0_DAT7 */
200		>;
201	};
202
203	main_mmc1_pins_default: main-mmc1-pins-default {
204		pinctrl-single,pins = <
205			AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
206			AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */
207			AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */
208			AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */
209			AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */
210			AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */
211			AM62X_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */
212		>;
213	};
214
215	usr_led_pins_default: usr-led-pins-default {
216		pinctrl-single,pins = <
217			AM62X_IOPAD(0x244, PIN_OUTPUT, 7) /* (C17) MMC1_SDWP.GPIO1_49 */
218		>;
219	};
220
221	main_mdio1_pins_default: main-mdio1-pins-default {
222		pinctrl-single,pins = <
223			AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */
224			AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */
225		>;
226	};
227
228	main_rgmii1_pins_default: main-rgmii1-pins-default {
229		pinctrl-single,pins = <
230			AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17) RGMII1_RD0 */
231			AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17) RGMII1_RD1 */
232			AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16) RGMII1_RD2 */
233			AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15) RGMII1_RD3 */
234			AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17) RGMII1_RXC */
235			AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17) RGMII1_RX_CTL */
236			AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20) RGMII1_TD0 */
237			AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20) RGMII1_TD1 */
238			AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18) RGMII1_TD2 */
239			AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18) RGMII1_TD3 */
240			AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */
241			AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */
242		>;
243	};
244
245	main_rgmii2_pins_default: main-rgmii2-pins-default {
246		pinctrl-single,pins = <
247			AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */
248			AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */
249			AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */
250			AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */
251			AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */
252			AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */
253			AM62X_IOPAD(0x16c, PIN_OUTPUT, 0) /* (Y18) RGMII2_TD0 */
254			AM62X_IOPAD(0x170, PIN_OUTPUT, 0) /* (AA18) RGMII2_TD1 */
255			AM62X_IOPAD(0x174, PIN_OUTPUT, 0) /* (AD21) RGMII2_TD2 */
256			AM62X_IOPAD(0x178, PIN_OUTPUT, 0) /* (AC20) RGMII2_TD3 */
257			AM62X_IOPAD(0x168, PIN_OUTPUT, 0) /* (AE21) RGMII2_TXC */
258			AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */
259		>;
260	};
261
262	ospi0_pins_default: ospi0-pins-default {
263		pinctrl-single,pins = <
264			AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */
265			AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */
266			AM62X_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */
267			AM62X_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */
268			AM62X_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */
269			AM62X_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */
270			AM62X_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */
271			AM62X_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */
272			AM62X_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */
273			AM62X_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */
274			AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */
275		>;
276	};
277
278	vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
279		pinctrl-single,pins = <
280			AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */
281		>;
282	};
283
284	main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-pins-default {
285		pinctrl-single,pins = <
286			AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */
287		>;
288	};
289
290	main_usb1_pins_default: main-usb1-pins-default {
291		pinctrl-single,pins = <
292			AM62X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18) USB1_DRVVBUS */
293		>;
294	};
295};
296
297&wkup_uart0 {
298	/* WKUP UART0 is used by DM firmware */
299	status = "reserved";
300};
301
302&main_uart0 {
303	status = "okay";
304	pinctrl-names = "default";
305	pinctrl-0 = <&main_uart0_pins_default>;
306};
307
308&main_uart1 {
309	/* Main UART1 is used by TIFS firmware */
310	status = "reserved";
311};
312
313&main_i2c0 {
314	status = "okay";
315	pinctrl-names = "default";
316	pinctrl-0 = <&main_i2c0_pins_default>;
317	clock-frequency = <400000>;
318};
319
320&main_i2c1 {
321	status = "okay";
322	pinctrl-names = "default";
323	pinctrl-0 = <&main_i2c1_pins_default>;
324	clock-frequency = <400000>;
325
326	exp1: gpio@22 {
327		compatible = "ti,tca6424";
328		reg = <0x22>;
329		gpio-controller;
330		#gpio-cells = <2>;
331		gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
332				   "PRU_DETECT", "MMC1_SD_EN",
333				   "VPP_LDO_EN", "EXP_PS_3V3_En",
334				   "EXP_PS_5V0_En", "EXP_HAT_DETECT",
335				   "GPIO_AUD_RSTn", "GPIO_eMMC_RSTn",
336				   "UART1_FET_BUF_EN", "WL_LT_EN",
337				   "GPIO_HDMI_RSTn", "CSI_GPIO1",
338				   "CSI_GPIO2", "PRU_3V3_EN",
339				   "HDMI_INTn", "TEST_GPIO2",
340				   "MCASP1_FET_EN", "MCASP1_BUF_BT_EN",
341				   "MCASP1_FET_SEL", "UART1_FET_SEL",
342				   "TSINT#", "IO_EXP_TEST_LED";
343
344		interrupt-parent = <&main_gpio1>;
345		interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
346		interrupt-controller;
347		#interrupt-cells = <2>;
348
349		pinctrl-names = "default";
350		pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>;
351	};
352};
353
354&sdhci0 {
355	status = "okay";
356	pinctrl-names = "default";
357	pinctrl-0 = <&main_mmc0_pins_default>;
358	ti,driver-strength-ohm = <50>;
359	disable-wp;
360};
361
362&sdhci1 {
363	/* SD/MMC */
364	status = "okay";
365	vmmc-supply = <&vdd_mmc1>;
366	vqmmc-supply = <&vdd_sd_dv>;
367	pinctrl-names = "default";
368	pinctrl-0 = <&main_mmc1_pins_default>;
369	ti,driver-strength-ohm = <50>;
370	disable-wp;
371};
372
373&cpsw3g {
374	pinctrl-names = "default";
375	pinctrl-0 = <&main_rgmii1_pins_default
376		     &main_rgmii2_pins_default>;
377};
378
379&cpsw_port1 {
380	phy-mode = "rgmii-rxid";
381	phy-handle = <&cpsw3g_phy0>;
382};
383
384&cpsw_port2 {
385	phy-mode = "rgmii-rxid";
386	phy-handle = <&cpsw3g_phy1>;
387};
388
389&cpsw3g_mdio {
390	status = "okay";
391	pinctrl-names = "default";
392	pinctrl-0 = <&main_mdio1_pins_default>;
393
394	cpsw3g_phy0: ethernet-phy@0 {
395		reg = <0>;
396		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
397		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
398		ti,min-output-impedance;
399	};
400
401	cpsw3g_phy1: ethernet-phy@1 {
402		reg = <1>;
403		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
404		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
405		ti,min-output-impedance;
406	};
407};
408
409&mailbox0_cluster0 {
410	mbox_m4_0: mbox-m4-0 {
411		ti,mbox-rx = <0 0 0>;
412		ti,mbox-tx = <1 0 0>;
413	};
414};
415
416&ospi0 {
417	status = "okay";
418	pinctrl-names = "default";
419	pinctrl-0 = <&ospi0_pins_default>;
420
421	flash@0{
422		compatible = "jedec,spi-nor";
423		reg = <0x0>;
424		spi-tx-bus-width = <8>;
425		spi-rx-bus-width = <8>;
426		spi-max-frequency = <25000000>;
427		cdns,tshsl-ns = <60>;
428		cdns,tsd2d-ns = <60>;
429		cdns,tchsh-ns = <60>;
430		cdns,tslch-ns = <60>;
431		cdns,read-delay = <4>;
432
433		partitions {
434			compatible = "fixed-partitions";
435			#address-cells = <1>;
436			#size-cells = <1>;
437
438			partition@0 {
439				label = "ospi.tiboot3";
440				reg = <0x0 0x80000>;
441			};
442
443			partition@80000 {
444				label = "ospi.tispl";
445				reg = <0x80000 0x200000>;
446			};
447
448			partition@280000 {
449				label = "ospi.u-boot";
450				reg = <0x280000 0x400000>;
451			};
452
453			partition@680000 {
454				label = "ospi.env";
455				reg = <0x680000 0x40000>;
456			};
457
458			partition@6c0000 {
459				label = "ospi.env.backup";
460				reg = <0x6c0000 0x40000>;
461			};
462
463			partition@800000 {
464				label = "ospi.rootfs";
465				reg = <0x800000 0x37c0000>;
466			};
467
468			partition@3fc0000 {
469				label = "ospi.phypattern";
470				reg = <0x3fc0000 0x40000>;
471			};
472		};
473	};
474};
475
476&usbss0 {
477	status = "okay";
478	ti,vbus-divider;
479};
480
481&usbss1 {
482	status = "okay";
483};
484
485&usb0 {
486	dr_mode = "peripheral";
487};
488
489&usb1 {
490	dr_mode = "host";
491	pinctrl-names = "default";
492	pinctrl-0 = <&main_usb1_pins_default>;
493};
494