1f1d17330SVignesh Raghavendra// SPDX-License-Identifier: GPL-2.0 2f1d17330SVignesh Raghavendra/* 3f1d17330SVignesh Raghavendra * Device Tree Source for AM625 SoC Family Wakeup Domain peripherals 4f1d17330SVignesh Raghavendra * 5f1d17330SVignesh Raghavendra * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ 6f1d17330SVignesh Raghavendra */ 7f1d17330SVignesh Raghavendra 8f1d17330SVignesh Raghavendra&cbass_wakeup { 9f1d17330SVignesh Raghavendra wkup_conf: syscon@43000000 { 10f1d17330SVignesh Raghavendra compatible = "syscon", "simple-mfd"; 11f1d17330SVignesh Raghavendra reg = <0x00 0x43000000 0x00 0x20000>; 12f1d17330SVignesh Raghavendra #address-cells = <1>; 13f1d17330SVignesh Raghavendra #size-cells = <1>; 14f1d17330SVignesh Raghavendra ranges = <0x0 0x00 0x43000000 0x20000>; 15f1d17330SVignesh Raghavendra 16f1d17330SVignesh Raghavendra chipid: chipid@14 { 17f1d17330SVignesh Raghavendra compatible = "ti,am654-chipid"; 18f1d17330SVignesh Raghavendra reg = <0x14 0x4>; 19f1d17330SVignesh Raghavendra }; 20f1d17330SVignesh Raghavendra }; 21f1d17330SVignesh Raghavendra 22f1d17330SVignesh Raghavendra wkup_uart0: serial@2b300000 { 23f1d17330SVignesh Raghavendra compatible = "ti,am64-uart", "ti,am654-uart"; 24f1d17330SVignesh Raghavendra reg = <0x00 0x2b300000 0x00 0x100>; 25f1d17330SVignesh Raghavendra interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 26f1d17330SVignesh Raghavendra power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>; 27f1d17330SVignesh Raghavendra clocks = <&k3_clks 114 0>; 28f1d17330SVignesh Raghavendra clock-names = "fclk"; 29*b5877d9bSAndrew Davis status = "disabled"; 30f1d17330SVignesh Raghavendra }; 31f1d17330SVignesh Raghavendra 32f1d17330SVignesh Raghavendra wkup_i2c0: i2c@2b200000 { 33f1d17330SVignesh Raghavendra compatible = "ti,am64-i2c", "ti,omap4-i2c"; 34f1d17330SVignesh Raghavendra reg = <0x00 0x02b200000 0x00 0x100>; 35f1d17330SVignesh Raghavendra interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 36f1d17330SVignesh Raghavendra #address-cells = <1>; 37f1d17330SVignesh Raghavendra #size-cells = <0>; 38f1d17330SVignesh Raghavendra power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>; 39f1d17330SVignesh Raghavendra clocks = <&k3_clks 107 4>; 40f1d17330SVignesh Raghavendra clock-names = "fck"; 41f1d17330SVignesh Raghavendra }; 42f1d17330SVignesh Raghavendra}; 43