105f7e3d1SMasahiro Yamada// SPDX-License-Identifier: GPL-2.0+ OR MIT 205f7e3d1SMasahiro Yamada// 305f7e3d1SMasahiro Yamada// Device Tree Source for UniPhier PXs3 SoC 405f7e3d1SMasahiro Yamada// 505f7e3d1SMasahiro Yamada// Copyright (C) 2017 Socionext Inc. 605f7e3d1SMasahiro Yamada// Author: Masahiro Yamada <yamada.masahiro@socionext.com> 7c28adcb5SMasahiro Yamada 8b6e5ec20SMasahiro Yamada#include <dt-bindings/gpio/gpio.h> 98311ca57SMasahiro Yamada#include <dt-bindings/gpio/uniphier-gpio.h> 10b6e5ec20SMasahiro Yamada 11c28adcb5SMasahiro Yamada/ { 12c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3"; 13c28adcb5SMasahiro Yamada #address-cells = <2>; 14c28adcb5SMasahiro Yamada #size-cells = <2>; 15c28adcb5SMasahiro Yamada interrupt-parent = <&gic>; 16c28adcb5SMasahiro Yamada 17c28adcb5SMasahiro Yamada cpus { 18c28adcb5SMasahiro Yamada #address-cells = <2>; 19c28adcb5SMasahiro Yamada #size-cells = <0>; 20c28adcb5SMasahiro Yamada 21c28adcb5SMasahiro Yamada cpu-map { 22c28adcb5SMasahiro Yamada cluster0 { 23c28adcb5SMasahiro Yamada core0 { 24c28adcb5SMasahiro Yamada cpu = <&cpu0>; 25c28adcb5SMasahiro Yamada }; 26c28adcb5SMasahiro Yamada core1 { 27c28adcb5SMasahiro Yamada cpu = <&cpu1>; 28c28adcb5SMasahiro Yamada }; 29c28adcb5SMasahiro Yamada core2 { 30c28adcb5SMasahiro Yamada cpu = <&cpu2>; 31c28adcb5SMasahiro Yamada }; 32c28adcb5SMasahiro Yamada core3 { 33c28adcb5SMasahiro Yamada cpu = <&cpu3>; 34c28adcb5SMasahiro Yamada }; 35c28adcb5SMasahiro Yamada }; 36c28adcb5SMasahiro Yamada }; 37c28adcb5SMasahiro Yamada 38c28adcb5SMasahiro Yamada cpu0: cpu@0 { 39c28adcb5SMasahiro Yamada device_type = "cpu"; 4031af04cdSRob Herring compatible = "arm,cortex-a53"; 41c28adcb5SMasahiro Yamada reg = <0 0x000>; 42c28adcb5SMasahiro Yamada clocks = <&sys_clk 33>; 43c28adcb5SMasahiro Yamada enable-method = "psci"; 44c28adcb5SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 45c28adcb5SMasahiro Yamada }; 46c28adcb5SMasahiro Yamada 47c28adcb5SMasahiro Yamada cpu1: cpu@1 { 48c28adcb5SMasahiro Yamada device_type = "cpu"; 4931af04cdSRob Herring compatible = "arm,cortex-a53"; 50c28adcb5SMasahiro Yamada reg = <0 0x001>; 51c28adcb5SMasahiro Yamada clocks = <&sys_clk 33>; 52c28adcb5SMasahiro Yamada enable-method = "psci"; 53c28adcb5SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 54c28adcb5SMasahiro Yamada }; 55c28adcb5SMasahiro Yamada 56c28adcb5SMasahiro Yamada cpu2: cpu@2 { 57c28adcb5SMasahiro Yamada device_type = "cpu"; 5831af04cdSRob Herring compatible = "arm,cortex-a53"; 59c28adcb5SMasahiro Yamada reg = <0 0x002>; 60c28adcb5SMasahiro Yamada clocks = <&sys_clk 33>; 61c28adcb5SMasahiro Yamada enable-method = "psci"; 62c28adcb5SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 63c28adcb5SMasahiro Yamada }; 64c28adcb5SMasahiro Yamada 65c28adcb5SMasahiro Yamada cpu3: cpu@3 { 66c28adcb5SMasahiro Yamada device_type = "cpu"; 6731af04cdSRob Herring compatible = "arm,cortex-a53"; 68c28adcb5SMasahiro Yamada reg = <0 0x003>; 69c28adcb5SMasahiro Yamada clocks = <&sys_clk 33>; 70c28adcb5SMasahiro Yamada enable-method = "psci"; 71c28adcb5SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 72c28adcb5SMasahiro Yamada }; 73c28adcb5SMasahiro Yamada }; 74c28adcb5SMasahiro Yamada 759cd7d03fSMasahiro Yamada cluster0_opp: opp-table { 76c28adcb5SMasahiro Yamada compatible = "operating-points-v2"; 77c28adcb5SMasahiro Yamada opp-shared; 78c28adcb5SMasahiro Yamada 79c28adcb5SMasahiro Yamada opp-250000000 { 80c28adcb5SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 81c28adcb5SMasahiro Yamada clock-latency-ns = <300>; 82c28adcb5SMasahiro Yamada }; 83c28adcb5SMasahiro Yamada opp-325000000 { 84c28adcb5SMasahiro Yamada opp-hz = /bits/ 64 <325000000>; 85c28adcb5SMasahiro Yamada clock-latency-ns = <300>; 86c28adcb5SMasahiro Yamada }; 87c28adcb5SMasahiro Yamada opp-500000000 { 88c28adcb5SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 89c28adcb5SMasahiro Yamada clock-latency-ns = <300>; 90c28adcb5SMasahiro Yamada }; 91c28adcb5SMasahiro Yamada opp-650000000 { 92c28adcb5SMasahiro Yamada opp-hz = /bits/ 64 <650000000>; 93c28adcb5SMasahiro Yamada clock-latency-ns = <300>; 94c28adcb5SMasahiro Yamada }; 95c28adcb5SMasahiro Yamada opp-666667000 { 96c28adcb5SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 97c28adcb5SMasahiro Yamada clock-latency-ns = <300>; 98c28adcb5SMasahiro Yamada }; 99c28adcb5SMasahiro Yamada opp-866667000 { 100c28adcb5SMasahiro Yamada opp-hz = /bits/ 64 <866667000>; 101c28adcb5SMasahiro Yamada clock-latency-ns = <300>; 102c28adcb5SMasahiro Yamada }; 103c28adcb5SMasahiro Yamada opp-1000000000 { 104c28adcb5SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 105c28adcb5SMasahiro Yamada clock-latency-ns = <300>; 106c28adcb5SMasahiro Yamada }; 107c28adcb5SMasahiro Yamada opp-1300000000 { 108c28adcb5SMasahiro Yamada opp-hz = /bits/ 64 <1300000000>; 109c28adcb5SMasahiro Yamada clock-latency-ns = <300>; 110c28adcb5SMasahiro Yamada }; 111c28adcb5SMasahiro Yamada }; 112c28adcb5SMasahiro Yamada 113c28adcb5SMasahiro Yamada psci { 114c28adcb5SMasahiro Yamada compatible = "arm,psci-1.0"; 115c28adcb5SMasahiro Yamada method = "smc"; 116c28adcb5SMasahiro Yamada }; 117c28adcb5SMasahiro Yamada 118c28adcb5SMasahiro Yamada clocks { 119c28adcb5SMasahiro Yamada refclk: ref { 120c28adcb5SMasahiro Yamada compatible = "fixed-clock"; 121c28adcb5SMasahiro Yamada #clock-cells = <0>; 122c28adcb5SMasahiro Yamada clock-frequency = <25000000>; 123c28adcb5SMasahiro Yamada }; 124c28adcb5SMasahiro Yamada }; 125c28adcb5SMasahiro Yamada 126b6e5ec20SMasahiro Yamada emmc_pwrseq: emmc-pwrseq { 127b6e5ec20SMasahiro Yamada compatible = "mmc-pwrseq-emmc"; 1288311ca57SMasahiro Yamada reset-gpios = <&gpio UNIPHIER_GPIO_PORT(5, 7) GPIO_ACTIVE_LOW>; 129b6e5ec20SMasahiro Yamada }; 130b6e5ec20SMasahiro Yamada 131c28adcb5SMasahiro Yamada timer { 132c28adcb5SMasahiro Yamada compatible = "arm,armv8-timer"; 133c28adcb5SMasahiro Yamada interrupts = <1 13 4>, 134c28adcb5SMasahiro Yamada <1 14 4>, 135c28adcb5SMasahiro Yamada <1 11 4>, 136c28adcb5SMasahiro Yamada <1 10 4>; 137c28adcb5SMasahiro Yamada }; 138c28adcb5SMasahiro Yamada 139aa385712SMasahiro Yamada reserved-memory { 140aa385712SMasahiro Yamada #address-cells = <2>; 141aa385712SMasahiro Yamada #size-cells = <2>; 142aa385712SMasahiro Yamada ranges; 143aa385712SMasahiro Yamada 144aa385712SMasahiro Yamada secure-memory@81000000 { 145aa385712SMasahiro Yamada reg = <0x0 0x81000000 0x0 0x01000000>; 146aa385712SMasahiro Yamada no-map; 147aa385712SMasahiro Yamada }; 148aa385712SMasahiro Yamada }; 149aa385712SMasahiro Yamada 150c28adcb5SMasahiro Yamada soc@0 { 151c28adcb5SMasahiro Yamada compatible = "simple-bus"; 152c28adcb5SMasahiro Yamada #address-cells = <1>; 153c28adcb5SMasahiro Yamada #size-cells = <1>; 154c28adcb5SMasahiro Yamada ranges = <0 0 0 0xffffffff>; 155c28adcb5SMasahiro Yamada 156925c5c32SKunihiko Hayashi spi0: spi@54006000 { 157925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 158925c5c32SKunihiko Hayashi status = "disabled"; 159925c5c32SKunihiko Hayashi reg = <0x54006000 0x100>; 160925c5c32SKunihiko Hayashi interrupts = <0 39 4>; 161925c5c32SKunihiko Hayashi pinctrl-names = "default"; 162925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi0>; 163925c5c32SKunihiko Hayashi clocks = <&peri_clk 11>; 164925c5c32SKunihiko Hayashi resets = <&peri_rst 11>; 165925c5c32SKunihiko Hayashi }; 166925c5c32SKunihiko Hayashi 167925c5c32SKunihiko Hayashi spi1: spi@54006100 { 168925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 169925c5c32SKunihiko Hayashi status = "disabled"; 170925c5c32SKunihiko Hayashi reg = <0x54006100 0x100>; 171925c5c32SKunihiko Hayashi interrupts = <0 216 4>; 172925c5c32SKunihiko Hayashi pinctrl-names = "default"; 173925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi1>; 174925c5c32SKunihiko Hayashi clocks = <&peri_clk 11>; 175925c5c32SKunihiko Hayashi resets = <&peri_rst 11>; 176925c5c32SKunihiko Hayashi }; 177925c5c32SKunihiko Hayashi 178c28adcb5SMasahiro Yamada serial0: serial@54006800 { 179c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-uart"; 180c28adcb5SMasahiro Yamada status = "disabled"; 181c28adcb5SMasahiro Yamada reg = <0x54006800 0x40>; 182c28adcb5SMasahiro Yamada interrupts = <0 33 4>; 183c28adcb5SMasahiro Yamada pinctrl-names = "default"; 184c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 185c28adcb5SMasahiro Yamada clocks = <&peri_clk 0>; 18676c48e1eSMasahiro Yamada resets = <&peri_rst 0>; 187c28adcb5SMasahiro Yamada }; 188c28adcb5SMasahiro Yamada 189c28adcb5SMasahiro Yamada serial1: serial@54006900 { 190c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-uart"; 191c28adcb5SMasahiro Yamada status = "disabled"; 192c28adcb5SMasahiro Yamada reg = <0x54006900 0x40>; 193c28adcb5SMasahiro Yamada interrupts = <0 35 4>; 194c28adcb5SMasahiro Yamada pinctrl-names = "default"; 195c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 196c28adcb5SMasahiro Yamada clocks = <&peri_clk 1>; 19776c48e1eSMasahiro Yamada resets = <&peri_rst 1>; 198c28adcb5SMasahiro Yamada }; 199c28adcb5SMasahiro Yamada 200c28adcb5SMasahiro Yamada serial2: serial@54006a00 { 201c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-uart"; 202c28adcb5SMasahiro Yamada status = "disabled"; 203c28adcb5SMasahiro Yamada reg = <0x54006a00 0x40>; 204c28adcb5SMasahiro Yamada interrupts = <0 37 4>; 205c28adcb5SMasahiro Yamada pinctrl-names = "default"; 206c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 207c28adcb5SMasahiro Yamada clocks = <&peri_clk 2>; 20876c48e1eSMasahiro Yamada resets = <&peri_rst 2>; 209c28adcb5SMasahiro Yamada }; 210c28adcb5SMasahiro Yamada 211c28adcb5SMasahiro Yamada serial3: serial@54006b00 { 212c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-uart"; 213c28adcb5SMasahiro Yamada status = "disabled"; 214c28adcb5SMasahiro Yamada reg = <0x54006b00 0x40>; 215c28adcb5SMasahiro Yamada interrupts = <0 177 4>; 216c28adcb5SMasahiro Yamada pinctrl-names = "default"; 217c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 218c28adcb5SMasahiro Yamada clocks = <&peri_clk 3>; 21976c48e1eSMasahiro Yamada resets = <&peri_rst 3>; 220c28adcb5SMasahiro Yamada }; 221c28adcb5SMasahiro Yamada 222277b51e7SMasahiro Yamada gpio: gpio@55000000 { 223277b51e7SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 224277b51e7SMasahiro Yamada reg = <0x55000000 0x200>; 225277b51e7SMasahiro Yamada interrupt-parent = <&aidet>; 226277b51e7SMasahiro Yamada interrupt-controller; 227277b51e7SMasahiro Yamada #interrupt-cells = <2>; 228277b51e7SMasahiro Yamada gpio-controller; 229277b51e7SMasahiro Yamada #gpio-cells = <2>; 230277b51e7SMasahiro Yamada gpio-ranges = <&pinctrl 0 0 0>, 231abb62c46SMasahiro Yamada <&pinctrl 104 0 0>, 232abb62c46SMasahiro Yamada <&pinctrl 168 0 0>; 233277b51e7SMasahiro Yamada gpio-ranges-group-names = "gpio_range0", 234277b51e7SMasahiro Yamada "gpio_range1", 235277b51e7SMasahiro Yamada "gpio_range2"; 236277b51e7SMasahiro Yamada ngpios = <286>; 237277b51e7SMasahiro Yamada socionext,interrupt-ranges = <0 48 16>, <16 154 5>, 238277b51e7SMasahiro Yamada <21 217 3>; 239277b51e7SMasahiro Yamada }; 240277b51e7SMasahiro Yamada 241c28adcb5SMasahiro Yamada i2c0: i2c@58780000 { 242c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 243c28adcb5SMasahiro Yamada status = "disabled"; 244c28adcb5SMasahiro Yamada reg = <0x58780000 0x80>; 245c28adcb5SMasahiro Yamada #address-cells = <1>; 246c28adcb5SMasahiro Yamada #size-cells = <0>; 247c28adcb5SMasahiro Yamada interrupts = <0 41 4>; 248c28adcb5SMasahiro Yamada pinctrl-names = "default"; 249c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 250c28adcb5SMasahiro Yamada clocks = <&peri_clk 4>; 25176c48e1eSMasahiro Yamada resets = <&peri_rst 4>; 252c28adcb5SMasahiro Yamada clock-frequency = <100000>; 253c28adcb5SMasahiro Yamada }; 254c28adcb5SMasahiro Yamada 255c28adcb5SMasahiro Yamada i2c1: i2c@58781000 { 256c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 257c28adcb5SMasahiro Yamada status = "disabled"; 258c28adcb5SMasahiro Yamada reg = <0x58781000 0x80>; 259c28adcb5SMasahiro Yamada #address-cells = <1>; 260c28adcb5SMasahiro Yamada #size-cells = <0>; 261c28adcb5SMasahiro Yamada interrupts = <0 42 4>; 262c28adcb5SMasahiro Yamada pinctrl-names = "default"; 263c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 264c28adcb5SMasahiro Yamada clocks = <&peri_clk 5>; 26576c48e1eSMasahiro Yamada resets = <&peri_rst 5>; 266c28adcb5SMasahiro Yamada clock-frequency = <100000>; 267c28adcb5SMasahiro Yamada }; 268c28adcb5SMasahiro Yamada 269c28adcb5SMasahiro Yamada i2c2: i2c@58782000 { 270c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 271c28adcb5SMasahiro Yamada status = "disabled"; 272c28adcb5SMasahiro Yamada reg = <0x58782000 0x80>; 273c28adcb5SMasahiro Yamada #address-cells = <1>; 274c28adcb5SMasahiro Yamada #size-cells = <0>; 275c28adcb5SMasahiro Yamada interrupts = <0 43 4>; 276c28adcb5SMasahiro Yamada pinctrl-names = "default"; 277c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c2>; 278c28adcb5SMasahiro Yamada clocks = <&peri_clk 6>; 27976c48e1eSMasahiro Yamada resets = <&peri_rst 6>; 280c28adcb5SMasahiro Yamada clock-frequency = <100000>; 281c28adcb5SMasahiro Yamada }; 282c28adcb5SMasahiro Yamada 283c28adcb5SMasahiro Yamada i2c3: i2c@58783000 { 284c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 285c28adcb5SMasahiro Yamada status = "disabled"; 286c28adcb5SMasahiro Yamada reg = <0x58783000 0x80>; 287c28adcb5SMasahiro Yamada #address-cells = <1>; 288c28adcb5SMasahiro Yamada #size-cells = <0>; 289c28adcb5SMasahiro Yamada interrupts = <0 44 4>; 290c28adcb5SMasahiro Yamada pinctrl-names = "default"; 291c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 292c28adcb5SMasahiro Yamada clocks = <&peri_clk 7>; 29376c48e1eSMasahiro Yamada resets = <&peri_rst 7>; 294c28adcb5SMasahiro Yamada clock-frequency = <100000>; 295c28adcb5SMasahiro Yamada }; 296c28adcb5SMasahiro Yamada 297c28adcb5SMasahiro Yamada /* chip-internal connection for HDMI */ 298c28adcb5SMasahiro Yamada i2c6: i2c@58786000 { 299c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 300c28adcb5SMasahiro Yamada reg = <0x58786000 0x80>; 301c28adcb5SMasahiro Yamada #address-cells = <1>; 302c28adcb5SMasahiro Yamada #size-cells = <0>; 303c28adcb5SMasahiro Yamada interrupts = <0 26 4>; 304c28adcb5SMasahiro Yamada clocks = <&peri_clk 10>; 30576c48e1eSMasahiro Yamada resets = <&peri_rst 10>; 306c28adcb5SMasahiro Yamada clock-frequency = <400000>; 307c28adcb5SMasahiro Yamada }; 308c28adcb5SMasahiro Yamada 309c28adcb5SMasahiro Yamada system_bus: system-bus@58c00000 { 310c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 311c28adcb5SMasahiro Yamada status = "disabled"; 312c28adcb5SMasahiro Yamada reg = <0x58c00000 0x400>; 313c28adcb5SMasahiro Yamada #address-cells = <2>; 314c28adcb5SMasahiro Yamada #size-cells = <1>; 315c28adcb5SMasahiro Yamada pinctrl-names = "default"; 316c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 317c28adcb5SMasahiro Yamada }; 318c28adcb5SMasahiro Yamada 319c28adcb5SMasahiro Yamada smpctrl@59801000 { 320c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 321c28adcb5SMasahiro Yamada reg = <0x59801000 0x400>; 322c28adcb5SMasahiro Yamada }; 323c28adcb5SMasahiro Yamada 324c28adcb5SMasahiro Yamada sdctrl@59810000 { 325c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-sdctrl", 326c28adcb5SMasahiro Yamada "simple-mfd", "syscon"; 327c28adcb5SMasahiro Yamada reg = <0x59810000 0x400>; 328c28adcb5SMasahiro Yamada 329c28adcb5SMasahiro Yamada sd_clk: clock { 330c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-sd-clock"; 331c28adcb5SMasahiro Yamada #clock-cells = <1>; 332c28adcb5SMasahiro Yamada }; 333c28adcb5SMasahiro Yamada 334c28adcb5SMasahiro Yamada sd_rst: reset { 335c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-sd-reset"; 336c28adcb5SMasahiro Yamada #reset-cells = <1>; 337c28adcb5SMasahiro Yamada }; 338c28adcb5SMasahiro Yamada }; 339c28adcb5SMasahiro Yamada 340c28adcb5SMasahiro Yamada perictrl@59820000 { 341c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-perictrl", 342c28adcb5SMasahiro Yamada "simple-mfd", "syscon"; 343c28adcb5SMasahiro Yamada reg = <0x59820000 0x200>; 344c28adcb5SMasahiro Yamada 345c28adcb5SMasahiro Yamada peri_clk: clock { 346c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-peri-clock"; 347c28adcb5SMasahiro Yamada #clock-cells = <1>; 348c28adcb5SMasahiro Yamada }; 349c28adcb5SMasahiro Yamada 350c28adcb5SMasahiro Yamada peri_rst: reset { 351c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-peri-reset"; 352c28adcb5SMasahiro Yamada #reset-cells = <1>; 353c28adcb5SMasahiro Yamada }; 354c28adcb5SMasahiro Yamada }; 355c28adcb5SMasahiro Yamada 356bb3f4672SMasahiro Yamada emmc: mmc@5a000000 { 357c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 358c28adcb5SMasahiro Yamada reg = <0x5a000000 0x400>; 359c28adcb5SMasahiro Yamada interrupts = <0 78 4>; 360c28adcb5SMasahiro Yamada pinctrl-names = "default"; 361c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_emmc>; 362c28adcb5SMasahiro Yamada clocks = <&sys_clk 4>; 36376c48e1eSMasahiro Yamada resets = <&sys_rst 4>; 364c28adcb5SMasahiro Yamada bus-width = <8>; 365c28adcb5SMasahiro Yamada mmc-ddr-1_8v; 366c28adcb5SMasahiro Yamada mmc-hs200-1_8v; 367b6e5ec20SMasahiro Yamada mmc-pwrseq = <&emmc_pwrseq>; 368f4e5200fSMasahiro Yamada cdns,phy-input-delay-legacy = <9>; 369c28adcb5SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 370c28adcb5SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 371c28adcb5SMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 372c28adcb5SMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 373c28adcb5SMasahiro Yamada }; 374c28adcb5SMasahiro Yamada 375bb3f4672SMasahiro Yamada sd: mmc@5a400000 { 37684a9c4d5SMasahiro Yamada compatible = "socionext,uniphier-sd-v3.1.1"; 37784a9c4d5SMasahiro Yamada status = "disabled"; 37884a9c4d5SMasahiro Yamada reg = <0x5a400000 0x800>; 37984a9c4d5SMasahiro Yamada interrupts = <0 76 4>; 38084a9c4d5SMasahiro Yamada pinctrl-names = "default", "uhs"; 38184a9c4d5SMasahiro Yamada pinctrl-0 = <&pinctrl_sd>; 38284a9c4d5SMasahiro Yamada pinctrl-1 = <&pinctrl_sd_uhs>; 38384a9c4d5SMasahiro Yamada clocks = <&sd_clk 0>; 38484a9c4d5SMasahiro Yamada reset-names = "host"; 38584a9c4d5SMasahiro Yamada resets = <&sd_rst 0>; 38684a9c4d5SMasahiro Yamada bus-width = <4>; 38784a9c4d5SMasahiro Yamada cap-sd-highspeed; 38884a9c4d5SMasahiro Yamada sd-uhs-sdr12; 38984a9c4d5SMasahiro Yamada sd-uhs-sdr25; 39084a9c4d5SMasahiro Yamada sd-uhs-sdr50; 39184a9c4d5SMasahiro Yamada }; 39284a9c4d5SMasahiro Yamada 393b076ff8bSKunihiko Hayashi soc_glue: soc-glue@5f800000 { 394c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-soc-glue", 395c28adcb5SMasahiro Yamada "simple-mfd", "syscon"; 396c28adcb5SMasahiro Yamada reg = <0x5f800000 0x2000>; 397c28adcb5SMasahiro Yamada 398c28adcb5SMasahiro Yamada pinctrl: pinctrl { 399c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-pinctrl"; 400c28adcb5SMasahiro Yamada }; 401c28adcb5SMasahiro Yamada }; 402c28adcb5SMasahiro Yamada 403f05851e1SKeiji Hayashibara soc-glue@5f900000 { 404f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-pxs3-soc-glue-debug", 405f05851e1SKeiji Hayashibara "simple-mfd"; 406f05851e1SKeiji Hayashibara #address-cells = <1>; 407f05851e1SKeiji Hayashibara #size-cells = <1>; 408f05851e1SKeiji Hayashibara ranges = <0 0x5f900000 0x2000>; 409f05851e1SKeiji Hayashibara 410f05851e1SKeiji Hayashibara efuse@100 { 411f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 412f05851e1SKeiji Hayashibara reg = <0x100 0x28>; 413f05851e1SKeiji Hayashibara }; 414f05851e1SKeiji Hayashibara 415f05851e1SKeiji Hayashibara efuse@200 { 416f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 417f05851e1SKeiji Hayashibara reg = <0x200 0x68>; 418d7b9beb8SKunihiko Hayashi #address-cells = <1>; 419d7b9beb8SKunihiko Hayashi #size-cells = <1>; 420d7b9beb8SKunihiko Hayashi 421d7b9beb8SKunihiko Hayashi /* USB cells */ 422d7b9beb8SKunihiko Hayashi usb_rterm0: trim@54,4 { 423d7b9beb8SKunihiko Hayashi reg = <0x54 1>; 424d7b9beb8SKunihiko Hayashi bits = <4 2>; 425d7b9beb8SKunihiko Hayashi }; 426d7b9beb8SKunihiko Hayashi usb_rterm1: trim@55,4 { 427d7b9beb8SKunihiko Hayashi reg = <0x55 1>; 428d7b9beb8SKunihiko Hayashi bits = <4 2>; 429d7b9beb8SKunihiko Hayashi }; 430d7b9beb8SKunihiko Hayashi usb_rterm2: trim@58,4 { 431d7b9beb8SKunihiko Hayashi reg = <0x58 1>; 432d7b9beb8SKunihiko Hayashi bits = <4 2>; 433d7b9beb8SKunihiko Hayashi }; 434d7b9beb8SKunihiko Hayashi usb_rterm3: trim@59,4 { 435d7b9beb8SKunihiko Hayashi reg = <0x59 1>; 436d7b9beb8SKunihiko Hayashi bits = <4 2>; 437d7b9beb8SKunihiko Hayashi }; 438d7b9beb8SKunihiko Hayashi usb_sel_t0: trim@54,0 { 439d7b9beb8SKunihiko Hayashi reg = <0x54 1>; 440d7b9beb8SKunihiko Hayashi bits = <0 4>; 441d7b9beb8SKunihiko Hayashi }; 442d7b9beb8SKunihiko Hayashi usb_sel_t1: trim@55,0 { 443d7b9beb8SKunihiko Hayashi reg = <0x55 1>; 444d7b9beb8SKunihiko Hayashi bits = <0 4>; 445d7b9beb8SKunihiko Hayashi }; 446d7b9beb8SKunihiko Hayashi usb_sel_t2: trim@58,0 { 447d7b9beb8SKunihiko Hayashi reg = <0x58 1>; 448d7b9beb8SKunihiko Hayashi bits = <0 4>; 449d7b9beb8SKunihiko Hayashi }; 450d7b9beb8SKunihiko Hayashi usb_sel_t3: trim@59,0 { 451d7b9beb8SKunihiko Hayashi reg = <0x59 1>; 452d7b9beb8SKunihiko Hayashi bits = <0 4>; 453d7b9beb8SKunihiko Hayashi }; 454d7b9beb8SKunihiko Hayashi usb_hs_i0: trim@56,0 { 455d7b9beb8SKunihiko Hayashi reg = <0x56 1>; 456d7b9beb8SKunihiko Hayashi bits = <0 4>; 457d7b9beb8SKunihiko Hayashi }; 458d7b9beb8SKunihiko Hayashi usb_hs_i2: trim@5a,0 { 459d7b9beb8SKunihiko Hayashi reg = <0x5a 1>; 460d7b9beb8SKunihiko Hayashi bits = <0 4>; 461d7b9beb8SKunihiko Hayashi }; 462f05851e1SKeiji Hayashibara }; 463f05851e1SKeiji Hayashibara }; 464f05851e1SKeiji Hayashibara 4659ddc285bSMasahiro Yamada aidet: interrupt-controller@5fc20000 { 466c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-aidet"; 467c28adcb5SMasahiro Yamada reg = <0x5fc20000 0x200>; 468c28adcb5SMasahiro Yamada interrupt-controller; 469c28adcb5SMasahiro Yamada #interrupt-cells = <2>; 470c28adcb5SMasahiro Yamada }; 471c28adcb5SMasahiro Yamada 472c28adcb5SMasahiro Yamada gic: interrupt-controller@5fe00000 { 473c28adcb5SMasahiro Yamada compatible = "arm,gic-v3"; 474c28adcb5SMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 475c28adcb5SMasahiro Yamada <0x5fe80000 0x80000>; /* GICR */ 476c28adcb5SMasahiro Yamada interrupt-controller; 477c28adcb5SMasahiro Yamada #interrupt-cells = <3>; 478c28adcb5SMasahiro Yamada interrupts = <1 9 4>; 479c28adcb5SMasahiro Yamada }; 480c28adcb5SMasahiro Yamada 481c28adcb5SMasahiro Yamada sysctrl@61840000 { 482c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-sysctrl", 483c28adcb5SMasahiro Yamada "simple-mfd", "syscon"; 484c28adcb5SMasahiro Yamada reg = <0x61840000 0x10000>; 485c28adcb5SMasahiro Yamada 486c28adcb5SMasahiro Yamada sys_clk: clock { 487c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-clock"; 488c28adcb5SMasahiro Yamada #clock-cells = <1>; 489c28adcb5SMasahiro Yamada }; 490c28adcb5SMasahiro Yamada 491c28adcb5SMasahiro Yamada sys_rst: reset { 492c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-reset"; 493c28adcb5SMasahiro Yamada #reset-cells = <1>; 494c28adcb5SMasahiro Yamada }; 495c28adcb5SMasahiro Yamada 496c28adcb5SMasahiro Yamada watchdog { 497c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-wdt"; 498c28adcb5SMasahiro Yamada }; 499c28adcb5SMasahiro Yamada }; 500c28adcb5SMasahiro Yamada 501aba054a1SKunihiko Hayashi eth0: ethernet@65000000 { 502aba054a1SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-ave4"; 503aba054a1SKunihiko Hayashi status = "disabled"; 504aba054a1SKunihiko Hayashi reg = <0x65000000 0x8500>; 505aba054a1SKunihiko Hayashi interrupts = <0 66 4>; 506aba054a1SKunihiko Hayashi pinctrl-names = "default"; 507aba054a1SKunihiko Hayashi pinctrl-0 = <&pinctrl_ether_rgmii>; 508a34a464dSKunihiko Hayashi clock-names = "ether"; 509aba054a1SKunihiko Hayashi clocks = <&sys_clk 6>; 510a34a464dSKunihiko Hayashi reset-names = "ether"; 511aba054a1SKunihiko Hayashi resets = <&sys_rst 6>; 512aba054a1SKunihiko Hayashi phy-mode = "rgmii"; 513aba054a1SKunihiko Hayashi local-mac-address = [00 00 00 00 00 00]; 514b076ff8bSKunihiko Hayashi socionext,syscon-phy-mode = <&soc_glue 0>; 515aba054a1SKunihiko Hayashi 516aba054a1SKunihiko Hayashi mdio0: mdio { 517aba054a1SKunihiko Hayashi #address-cells = <1>; 518aba054a1SKunihiko Hayashi #size-cells = <0>; 519aba054a1SKunihiko Hayashi }; 520aba054a1SKunihiko Hayashi }; 521aba054a1SKunihiko Hayashi 522aba054a1SKunihiko Hayashi eth1: ethernet@65200000 { 523aba054a1SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-ave4"; 524aba054a1SKunihiko Hayashi status = "disabled"; 525aba054a1SKunihiko Hayashi reg = <0x65200000 0x8500>; 526aba054a1SKunihiko Hayashi interrupts = <0 67 4>; 527aba054a1SKunihiko Hayashi pinctrl-names = "default"; 528aba054a1SKunihiko Hayashi pinctrl-0 = <&pinctrl_ether1_rgmii>; 529a34a464dSKunihiko Hayashi clock-names = "ether"; 530aba054a1SKunihiko Hayashi clocks = <&sys_clk 7>; 531a34a464dSKunihiko Hayashi reset-names = "ether"; 532aba054a1SKunihiko Hayashi resets = <&sys_rst 7>; 533aba054a1SKunihiko Hayashi phy-mode = "rgmii"; 534aba054a1SKunihiko Hayashi local-mac-address = [00 00 00 00 00 00]; 535b076ff8bSKunihiko Hayashi socionext,syscon-phy-mode = <&soc_glue 1>; 536aba054a1SKunihiko Hayashi 537aba054a1SKunihiko Hayashi mdio1: mdio { 538aba054a1SKunihiko Hayashi #address-cells = <1>; 539aba054a1SKunihiko Hayashi #size-cells = <0>; 540aba054a1SKunihiko Hayashi }; 541aba054a1SKunihiko Hayashi }; 542aba054a1SKunihiko Hayashi 543d7b9beb8SKunihiko Hayashi usb0: usb@65a00000 { 544d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-dwc3", "snps,dwc3"; 545d7b9beb8SKunihiko Hayashi status = "disabled"; 546d7b9beb8SKunihiko Hayashi reg = <0x65a00000 0xcd00>; 547d7b9beb8SKunihiko Hayashi interrupt-names = "host", "peripheral"; 548d7b9beb8SKunihiko Hayashi interrupts = <0 134 4>, <0 135 4>; 549d7b9beb8SKunihiko Hayashi pinctrl-names = "default"; 550d7b9beb8SKunihiko Hayashi pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>; 551d7b9beb8SKunihiko Hayashi clock-names = "ref", "bus_early", "suspend"; 552d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>; 553d7b9beb8SKunihiko Hayashi resets = <&usb0_rst 15>; 554d7b9beb8SKunihiko Hayashi phys = <&usb0_hsphy0>, <&usb0_hsphy1>, 555d7b9beb8SKunihiko Hayashi <&usb0_ssphy0>, <&usb0_ssphy1>; 556d7b9beb8SKunihiko Hayashi dr_mode = "host"; 557d7b9beb8SKunihiko Hayashi }; 558d7b9beb8SKunihiko Hayashi 559d7b9beb8SKunihiko Hayashi usb-glue@65b00000 { 560d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-dwc3-glue", 561d7b9beb8SKunihiko Hayashi "simple-mfd"; 562d7b9beb8SKunihiko Hayashi #address-cells = <1>; 563d7b9beb8SKunihiko Hayashi #size-cells = <1>; 564d7b9beb8SKunihiko Hayashi ranges = <0 0x65b00000 0x400>; 565d7b9beb8SKunihiko Hayashi 566d7b9beb8SKunihiko Hayashi usb0_rst: reset@0 { 567d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-reset"; 568d7b9beb8SKunihiko Hayashi reg = <0x0 0x4>; 569d7b9beb8SKunihiko Hayashi #reset-cells = <1>; 570d7b9beb8SKunihiko Hayashi clock-names = "link"; 571d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 12>; 572d7b9beb8SKunihiko Hayashi reset-names = "link"; 573d7b9beb8SKunihiko Hayashi resets = <&sys_rst 12>; 574d7b9beb8SKunihiko Hayashi }; 575d7b9beb8SKunihiko Hayashi 576d7b9beb8SKunihiko Hayashi usb0_vbus0: regulator@100 { 577d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-regulator"; 578d7b9beb8SKunihiko Hayashi reg = <0x100 0x10>; 579d7b9beb8SKunihiko Hayashi clock-names = "link"; 580d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 12>; 581d7b9beb8SKunihiko Hayashi reset-names = "link"; 582d7b9beb8SKunihiko Hayashi resets = <&sys_rst 12>; 583d7b9beb8SKunihiko Hayashi }; 584d7b9beb8SKunihiko Hayashi 585d7b9beb8SKunihiko Hayashi usb0_vbus1: regulator@110 { 586d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-regulator"; 587d7b9beb8SKunihiko Hayashi reg = <0x110 0x10>; 588d7b9beb8SKunihiko Hayashi clock-names = "link"; 589d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 12>; 590d7b9beb8SKunihiko Hayashi reset-names = "link"; 591d7b9beb8SKunihiko Hayashi resets = <&sys_rst 12>; 592d7b9beb8SKunihiko Hayashi }; 593d7b9beb8SKunihiko Hayashi 594d7b9beb8SKunihiko Hayashi usb0_hsphy0: hs-phy@200 { 595d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-hsphy"; 596d7b9beb8SKunihiko Hayashi reg = <0x200 0x10>; 597d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 598d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 599d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 12>, <&sys_clk 16>; 600d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 601d7b9beb8SKunihiko Hayashi resets = <&sys_rst 12>, <&sys_rst 16>; 602d7b9beb8SKunihiko Hayashi vbus-supply = <&usb0_vbus0>; 603d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 604d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm0>, <&usb_sel_t0>, 605d7b9beb8SKunihiko Hayashi <&usb_hs_i0>; 606d7b9beb8SKunihiko Hayashi }; 607d7b9beb8SKunihiko Hayashi 608d7b9beb8SKunihiko Hayashi usb0_hsphy1: hs-phy@210 { 609d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-hsphy"; 610d7b9beb8SKunihiko Hayashi reg = <0x210 0x10>; 611d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 612d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 613d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 12>, <&sys_clk 16>; 614d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 615d7b9beb8SKunihiko Hayashi resets = <&sys_rst 12>, <&sys_rst 16>; 616d7b9beb8SKunihiko Hayashi vbus-supply = <&usb0_vbus1>; 617d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 618d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm1>, <&usb_sel_t1>, 619d7b9beb8SKunihiko Hayashi <&usb_hs_i0>; 620d7b9beb8SKunihiko Hayashi }; 621d7b9beb8SKunihiko Hayashi 622d7b9beb8SKunihiko Hayashi usb0_ssphy0: ss-phy@300 { 623d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-ssphy"; 624d7b9beb8SKunihiko Hayashi reg = <0x300 0x10>; 625d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 626d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 627d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 12>, <&sys_clk 17>; 628d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 629d7b9beb8SKunihiko Hayashi resets = <&sys_rst 12>, <&sys_rst 17>; 630d7b9beb8SKunihiko Hayashi vbus-supply = <&usb0_vbus0>; 631d7b9beb8SKunihiko Hayashi }; 632d7b9beb8SKunihiko Hayashi 633d7b9beb8SKunihiko Hayashi usb0_ssphy1: ss-phy@310 { 634d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-ssphy"; 635d7b9beb8SKunihiko Hayashi reg = <0x310 0x10>; 636d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 637d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 638d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 12>, <&sys_clk 18>; 639d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 640d7b9beb8SKunihiko Hayashi resets = <&sys_rst 12>, <&sys_rst 18>; 641d7b9beb8SKunihiko Hayashi vbus-supply = <&usb0_vbus1>; 642d7b9beb8SKunihiko Hayashi }; 643d7b9beb8SKunihiko Hayashi }; 644d7b9beb8SKunihiko Hayashi 645d7b9beb8SKunihiko Hayashi usb1: usb@65c00000 { 646d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-dwc3", "snps,dwc3"; 647d7b9beb8SKunihiko Hayashi status = "disabled"; 648d7b9beb8SKunihiko Hayashi reg = <0x65c00000 0xcd00>; 649d7b9beb8SKunihiko Hayashi interrupt-names = "host", "peripheral"; 650d7b9beb8SKunihiko Hayashi interrupts = <0 137 4>, <0 138 4>; 651d7b9beb8SKunihiko Hayashi pinctrl-names = "default"; 652d7b9beb8SKunihiko Hayashi pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>; 653d7b9beb8SKunihiko Hayashi clock-names = "ref", "bus_early", "suspend"; 654d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 13>, <&sys_clk 13>, <&sys_clk 13>; 655d7b9beb8SKunihiko Hayashi resets = <&usb1_rst 15>; 656d7b9beb8SKunihiko Hayashi phys = <&usb1_hsphy0>, <&usb1_hsphy1>, 657d7b9beb8SKunihiko Hayashi <&usb1_ssphy0>; 658d7b9beb8SKunihiko Hayashi dr_mode = "host"; 659d7b9beb8SKunihiko Hayashi }; 660d7b9beb8SKunihiko Hayashi 661d7b9beb8SKunihiko Hayashi usb-glue@65d00000 { 662d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-dwc3-glue", 663d7b9beb8SKunihiko Hayashi "simple-mfd"; 664d7b9beb8SKunihiko Hayashi #address-cells = <1>; 665d7b9beb8SKunihiko Hayashi #size-cells = <1>; 666d7b9beb8SKunihiko Hayashi ranges = <0 0x65d00000 0x400>; 667d7b9beb8SKunihiko Hayashi 668d7b9beb8SKunihiko Hayashi usb1_rst: reset@0 { 669d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-reset"; 670d7b9beb8SKunihiko Hayashi reg = <0x0 0x4>; 671d7b9beb8SKunihiko Hayashi #reset-cells = <1>; 672d7b9beb8SKunihiko Hayashi clock-names = "link"; 673d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 13>; 674d7b9beb8SKunihiko Hayashi reset-names = "link"; 675d7b9beb8SKunihiko Hayashi resets = <&sys_rst 13>; 676d7b9beb8SKunihiko Hayashi }; 677d7b9beb8SKunihiko Hayashi 678d7b9beb8SKunihiko Hayashi usb1_vbus0: regulator@100 { 679d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-regulator"; 680d7b9beb8SKunihiko Hayashi reg = <0x100 0x10>; 681d7b9beb8SKunihiko Hayashi clock-names = "link"; 682d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 13>; 683d7b9beb8SKunihiko Hayashi reset-names = "link"; 684d7b9beb8SKunihiko Hayashi resets = <&sys_rst 13>; 685d7b9beb8SKunihiko Hayashi }; 686d7b9beb8SKunihiko Hayashi 687d7b9beb8SKunihiko Hayashi usb1_vbus1: regulator@110 { 688d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-regulator"; 689d7b9beb8SKunihiko Hayashi reg = <0x110 0x10>; 690d7b9beb8SKunihiko Hayashi clock-names = "link"; 691d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 13>; 692d7b9beb8SKunihiko Hayashi reset-names = "link"; 693d7b9beb8SKunihiko Hayashi resets = <&sys_rst 13>; 694d7b9beb8SKunihiko Hayashi }; 695d7b9beb8SKunihiko Hayashi 696d7b9beb8SKunihiko Hayashi usb1_hsphy0: hs-phy@200 { 697d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-hsphy"; 698d7b9beb8SKunihiko Hayashi reg = <0x200 0x10>; 699d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 700d7b9beb8SKunihiko Hayashi clock-names = "link", "phy", "phy-ext"; 701d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 13>, <&sys_clk 20>, 702d7b9beb8SKunihiko Hayashi <&sys_clk 14>; 703d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 704d7b9beb8SKunihiko Hayashi resets = <&sys_rst 13>, <&sys_rst 20>; 705d7b9beb8SKunihiko Hayashi vbus-supply = <&usb1_vbus0>; 706d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 707d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm2>, <&usb_sel_t2>, 708d7b9beb8SKunihiko Hayashi <&usb_hs_i2>; 709d7b9beb8SKunihiko Hayashi }; 710d7b9beb8SKunihiko Hayashi 711d7b9beb8SKunihiko Hayashi usb1_hsphy1: hs-phy@210 { 712d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-hsphy"; 713d7b9beb8SKunihiko Hayashi reg = <0x210 0x10>; 714d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 715d7b9beb8SKunihiko Hayashi clock-names = "link", "phy", "phy-ext"; 716d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 13>, <&sys_clk 20>, 717d7b9beb8SKunihiko Hayashi <&sys_clk 14>; 718d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 719d7b9beb8SKunihiko Hayashi resets = <&sys_rst 13>, <&sys_rst 20>; 720d7b9beb8SKunihiko Hayashi vbus-supply = <&usb1_vbus1>; 721d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 722d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm3>, <&usb_sel_t3>, 723d7b9beb8SKunihiko Hayashi <&usb_hs_i2>; 724d7b9beb8SKunihiko Hayashi }; 725d7b9beb8SKunihiko Hayashi 726d7b9beb8SKunihiko Hayashi usb1_ssphy0: ss-phy@300 { 727d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-ssphy"; 728d7b9beb8SKunihiko Hayashi reg = <0x300 0x10>; 729d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 730d7b9beb8SKunihiko Hayashi clock-names = "link", "phy", "phy-ext"; 731d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 13>, <&sys_clk 21>, 732d7b9beb8SKunihiko Hayashi <&sys_clk 14>; 733d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 734d7b9beb8SKunihiko Hayashi resets = <&sys_rst 13>, <&sys_rst 21>; 735d7b9beb8SKunihiko Hayashi vbus-supply = <&usb1_vbus0>; 736d7b9beb8SKunihiko Hayashi }; 737d7b9beb8SKunihiko Hayashi }; 738d7b9beb8SKunihiko Hayashi 73932dfc773SKunihiko Hayashi pcie: pcie@66000000 { 74032dfc773SKunihiko Hayashi compatible = "socionext,uniphier-pcie", "snps,dw-pcie"; 74132dfc773SKunihiko Hayashi status = "disabled"; 74232dfc773SKunihiko Hayashi reg-names = "dbi", "link", "config"; 74332dfc773SKunihiko Hayashi reg = <0x66000000 0x1000>, <0x66010000 0x10000>, 74432dfc773SKunihiko Hayashi <0x2fff0000 0x10000>; 74532dfc773SKunihiko Hayashi #address-cells = <3>; 74632dfc773SKunihiko Hayashi #size-cells = <2>; 74732dfc773SKunihiko Hayashi clocks = <&sys_clk 24>; 74832dfc773SKunihiko Hayashi resets = <&sys_rst 24>; 74932dfc773SKunihiko Hayashi num-lanes = <1>; 75032dfc773SKunihiko Hayashi num-viewport = <1>; 75132dfc773SKunihiko Hayashi bus-range = <0x0 0xff>; 75232dfc773SKunihiko Hayashi device_type = "pci"; 75332dfc773SKunihiko Hayashi ranges = 75432dfc773SKunihiko Hayashi /* downstream I/O */ 75532dfc773SKunihiko Hayashi <0x81000000 0 0x00000000 0x2ffe0000 0 0x00010000>, 75632dfc773SKunihiko Hayashi /* non-prefetchable memory */ 75732dfc773SKunihiko Hayashi <0x82000000 0 0x20000000 0x20000000 0 0x0ffe0000>; 75832dfc773SKunihiko Hayashi #interrupt-cells = <1>; 75932dfc773SKunihiko Hayashi interrupt-names = "dma", "msi"; 76032dfc773SKunihiko Hayashi interrupts = <0 224 4>, <0 225 4>; 76132dfc773SKunihiko Hayashi interrupt-map-mask = <0 0 0 7>; 76232dfc773SKunihiko Hayashi interrupt-map = <0 0 0 1 &pcie_intc 0>, /* INTA */ 76332dfc773SKunihiko Hayashi <0 0 0 2 &pcie_intc 1>, /* INTB */ 76432dfc773SKunihiko Hayashi <0 0 0 3 &pcie_intc 2>, /* INTC */ 76532dfc773SKunihiko Hayashi <0 0 0 4 &pcie_intc 3>; /* INTD */ 76632dfc773SKunihiko Hayashi phy-names = "pcie-phy"; 76732dfc773SKunihiko Hayashi phys = <&pcie_phy>; 76832dfc773SKunihiko Hayashi 76932dfc773SKunihiko Hayashi pcie_intc: legacy-interrupt-controller { 77032dfc773SKunihiko Hayashi interrupt-controller; 77132dfc773SKunihiko Hayashi #interrupt-cells = <1>; 77232dfc773SKunihiko Hayashi interrupt-parent = <&gic>; 77332dfc773SKunihiko Hayashi interrupts = <0 226 4>; 77432dfc773SKunihiko Hayashi }; 77532dfc773SKunihiko Hayashi }; 77632dfc773SKunihiko Hayashi 77732dfc773SKunihiko Hayashi pcie_phy: phy@66038000 { 77832dfc773SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-pcie-phy"; 77932dfc773SKunihiko Hayashi reg = <0x66038000 0x4000>; 78032dfc773SKunihiko Hayashi #phy-cells = <0>; 78132dfc773SKunihiko Hayashi clocks = <&sys_clk 24>; 78232dfc773SKunihiko Hayashi resets = <&sys_rst 24>; 78332dfc773SKunihiko Hayashi socionext,syscon = <&soc_glue>; 78432dfc773SKunihiko Hayashi }; 78532dfc773SKunihiko Hayashi 786fcb0e53cSMasahiro Yamada nand: nand-controller@68000000 { 787c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 788c28adcb5SMasahiro Yamada status = "disabled"; 789c28adcb5SMasahiro Yamada reg-names = "nand_data", "denali_reg"; 790c28adcb5SMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 79153c580c1SMasahiro Yamada #address-cells = <1>; 79253c580c1SMasahiro Yamada #size-cells = <0>; 793c28adcb5SMasahiro Yamada interrupts = <0 65 4>; 794c28adcb5SMasahiro Yamada pinctrl-names = "default"; 795c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 796bae120f8SMasahiro Yamada clock-names = "nand", "nand_x", "ecc"; 797bae120f8SMasahiro Yamada clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; 798e98d5023SMasahiro Yamada reset-names = "nand", "reg"; 799e98d5023SMasahiro Yamada resets = <&sys_rst 2>, <&sys_rst 2>; 800c28adcb5SMasahiro Yamada }; 801c28adcb5SMasahiro Yamada }; 802c28adcb5SMasahiro Yamada}; 803c28adcb5SMasahiro Yamada 804c28adcb5SMasahiro Yamada#include "uniphier-pinctrl.dtsi" 805