105f7e3d1SMasahiro Yamada// SPDX-License-Identifier: GPL-2.0+ OR MIT 205f7e3d1SMasahiro Yamada// 305f7e3d1SMasahiro Yamada// Device Tree Source for UniPhier PXs3 SoC 405f7e3d1SMasahiro Yamada// 505f7e3d1SMasahiro Yamada// Copyright (C) 2017 Socionext Inc. 605f7e3d1SMasahiro Yamada// Author: Masahiro Yamada <yamada.masahiro@socionext.com> 7c28adcb5SMasahiro Yamada 8b6e5ec20SMasahiro Yamada#include <dt-bindings/gpio/gpio.h> 98311ca57SMasahiro Yamada#include <dt-bindings/gpio/uniphier-gpio.h> 10*5ba95e8eSKunihiko Hayashi#include <dt-bindings/interrupt-controller/arm-gic.h> 114b7d3743SKunihiko Hayashi#include <dt-bindings/thermal/thermal.h> 12b6e5ec20SMasahiro Yamada 13c28adcb5SMasahiro Yamada/ { 14c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3"; 15c28adcb5SMasahiro Yamada #address-cells = <2>; 16c28adcb5SMasahiro Yamada #size-cells = <2>; 17c28adcb5SMasahiro Yamada interrupt-parent = <&gic>; 18c28adcb5SMasahiro Yamada 19c28adcb5SMasahiro Yamada cpus { 20c28adcb5SMasahiro Yamada #address-cells = <2>; 21c28adcb5SMasahiro Yamada #size-cells = <0>; 22c28adcb5SMasahiro Yamada 23c28adcb5SMasahiro Yamada cpu-map { 24c28adcb5SMasahiro Yamada cluster0 { 25c28adcb5SMasahiro Yamada core0 { 26c28adcb5SMasahiro Yamada cpu = <&cpu0>; 27c28adcb5SMasahiro Yamada }; 28c28adcb5SMasahiro Yamada core1 { 29c28adcb5SMasahiro Yamada cpu = <&cpu1>; 30c28adcb5SMasahiro Yamada }; 31c28adcb5SMasahiro Yamada core2 { 32c28adcb5SMasahiro Yamada cpu = <&cpu2>; 33c28adcb5SMasahiro Yamada }; 34c28adcb5SMasahiro Yamada core3 { 35c28adcb5SMasahiro Yamada cpu = <&cpu3>; 36c28adcb5SMasahiro Yamada }; 37c28adcb5SMasahiro Yamada }; 38c28adcb5SMasahiro Yamada }; 39c28adcb5SMasahiro Yamada 40c28adcb5SMasahiro Yamada cpu0: cpu@0 { 41c28adcb5SMasahiro Yamada device_type = "cpu"; 4231af04cdSRob Herring compatible = "arm,cortex-a53"; 43c28adcb5SMasahiro Yamada reg = <0 0x000>; 44c28adcb5SMasahiro Yamada clocks = <&sys_clk 33>; 45c28adcb5SMasahiro Yamada enable-method = "psci"; 46c28adcb5SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 474b7d3743SKunihiko Hayashi #cooling-cells = <2>; 48c28adcb5SMasahiro Yamada }; 49c28adcb5SMasahiro Yamada 50c28adcb5SMasahiro Yamada cpu1: cpu@1 { 51c28adcb5SMasahiro Yamada device_type = "cpu"; 5231af04cdSRob Herring compatible = "arm,cortex-a53"; 53c28adcb5SMasahiro Yamada reg = <0 0x001>; 54c28adcb5SMasahiro Yamada clocks = <&sys_clk 33>; 55c28adcb5SMasahiro Yamada enable-method = "psci"; 56c28adcb5SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 574b7d3743SKunihiko Hayashi #cooling-cells = <2>; 58c28adcb5SMasahiro Yamada }; 59c28adcb5SMasahiro Yamada 60c28adcb5SMasahiro Yamada cpu2: cpu@2 { 61c28adcb5SMasahiro Yamada device_type = "cpu"; 6231af04cdSRob Herring compatible = "arm,cortex-a53"; 63c28adcb5SMasahiro Yamada reg = <0 0x002>; 64c28adcb5SMasahiro Yamada clocks = <&sys_clk 33>; 65c28adcb5SMasahiro Yamada enable-method = "psci"; 66c28adcb5SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 674b7d3743SKunihiko Hayashi #cooling-cells = <2>; 68c28adcb5SMasahiro Yamada }; 69c28adcb5SMasahiro Yamada 70c28adcb5SMasahiro Yamada cpu3: cpu@3 { 71c28adcb5SMasahiro Yamada device_type = "cpu"; 7231af04cdSRob Herring compatible = "arm,cortex-a53"; 73c28adcb5SMasahiro Yamada reg = <0 0x003>; 74c28adcb5SMasahiro Yamada clocks = <&sys_clk 33>; 75c28adcb5SMasahiro Yamada enable-method = "psci"; 76c28adcb5SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 774b7d3743SKunihiko Hayashi #cooling-cells = <2>; 78c28adcb5SMasahiro Yamada }; 79c28adcb5SMasahiro Yamada }; 80c28adcb5SMasahiro Yamada 819cd7d03fSMasahiro Yamada cluster0_opp: opp-table { 82c28adcb5SMasahiro Yamada compatible = "operating-points-v2"; 83c28adcb5SMasahiro Yamada opp-shared; 84c28adcb5SMasahiro Yamada 85c28adcb5SMasahiro Yamada opp-250000000 { 86c28adcb5SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 87c28adcb5SMasahiro Yamada clock-latency-ns = <300>; 88c28adcb5SMasahiro Yamada }; 89c28adcb5SMasahiro Yamada opp-325000000 { 90c28adcb5SMasahiro Yamada opp-hz = /bits/ 64 <325000000>; 91c28adcb5SMasahiro Yamada clock-latency-ns = <300>; 92c28adcb5SMasahiro Yamada }; 93c28adcb5SMasahiro Yamada opp-500000000 { 94c28adcb5SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 95c28adcb5SMasahiro Yamada clock-latency-ns = <300>; 96c28adcb5SMasahiro Yamada }; 97c28adcb5SMasahiro Yamada opp-650000000 { 98c28adcb5SMasahiro Yamada opp-hz = /bits/ 64 <650000000>; 99c28adcb5SMasahiro Yamada clock-latency-ns = <300>; 100c28adcb5SMasahiro Yamada }; 101c28adcb5SMasahiro Yamada opp-666667000 { 102c28adcb5SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 103c28adcb5SMasahiro Yamada clock-latency-ns = <300>; 104c28adcb5SMasahiro Yamada }; 105c28adcb5SMasahiro Yamada opp-866667000 { 106c28adcb5SMasahiro Yamada opp-hz = /bits/ 64 <866667000>; 107c28adcb5SMasahiro Yamada clock-latency-ns = <300>; 108c28adcb5SMasahiro Yamada }; 109c28adcb5SMasahiro Yamada opp-1000000000 { 110c28adcb5SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 111c28adcb5SMasahiro Yamada clock-latency-ns = <300>; 112c28adcb5SMasahiro Yamada }; 113c28adcb5SMasahiro Yamada opp-1300000000 { 114c28adcb5SMasahiro Yamada opp-hz = /bits/ 64 <1300000000>; 115c28adcb5SMasahiro Yamada clock-latency-ns = <300>; 116c28adcb5SMasahiro Yamada }; 117c28adcb5SMasahiro Yamada }; 118c28adcb5SMasahiro Yamada 119c28adcb5SMasahiro Yamada psci { 120c28adcb5SMasahiro Yamada compatible = "arm,psci-1.0"; 121c28adcb5SMasahiro Yamada method = "smc"; 122c28adcb5SMasahiro Yamada }; 123c28adcb5SMasahiro Yamada 124c28adcb5SMasahiro Yamada clocks { 125c28adcb5SMasahiro Yamada refclk: ref { 126c28adcb5SMasahiro Yamada compatible = "fixed-clock"; 127c28adcb5SMasahiro Yamada #clock-cells = <0>; 128c28adcb5SMasahiro Yamada clock-frequency = <25000000>; 129c28adcb5SMasahiro Yamada }; 130c28adcb5SMasahiro Yamada }; 131c28adcb5SMasahiro Yamada 132b6e5ec20SMasahiro Yamada emmc_pwrseq: emmc-pwrseq { 133b6e5ec20SMasahiro Yamada compatible = "mmc-pwrseq-emmc"; 1348311ca57SMasahiro Yamada reset-gpios = <&gpio UNIPHIER_GPIO_PORT(5, 7) GPIO_ACTIVE_LOW>; 135b6e5ec20SMasahiro Yamada }; 136b6e5ec20SMasahiro Yamada 137c28adcb5SMasahiro Yamada timer { 138c28adcb5SMasahiro Yamada compatible = "arm,armv8-timer"; 139*5ba95e8eSKunihiko Hayashi interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>, 140*5ba95e8eSKunihiko Hayashi <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>, 141*5ba95e8eSKunihiko Hayashi <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>, 142*5ba95e8eSKunihiko Hayashi <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>; 143c28adcb5SMasahiro Yamada }; 144c28adcb5SMasahiro Yamada 1454b7d3743SKunihiko Hayashi thermal-zones { 1464b7d3743SKunihiko Hayashi cpu-thermal { 1474b7d3743SKunihiko Hayashi polling-delay-passive = <250>; /* 250ms */ 1484b7d3743SKunihiko Hayashi polling-delay = <1000>; /* 1000ms */ 1494b7d3743SKunihiko Hayashi thermal-sensors = <&pvtctl>; 1504b7d3743SKunihiko Hayashi 1514b7d3743SKunihiko Hayashi trips { 1524b7d3743SKunihiko Hayashi cpu_crit: cpu-crit { 1534b7d3743SKunihiko Hayashi temperature = <110000>; /* 110C */ 1544b7d3743SKunihiko Hayashi hysteresis = <2000>; 1554b7d3743SKunihiko Hayashi type = "critical"; 1564b7d3743SKunihiko Hayashi }; 1574b7d3743SKunihiko Hayashi cpu_alert: cpu-alert { 1584b7d3743SKunihiko Hayashi temperature = <100000>; /* 100C */ 1594b7d3743SKunihiko Hayashi hysteresis = <2000>; 1604b7d3743SKunihiko Hayashi type = "passive"; 1614b7d3743SKunihiko Hayashi }; 1624b7d3743SKunihiko Hayashi }; 1634b7d3743SKunihiko Hayashi 1644b7d3743SKunihiko Hayashi cooling-maps { 1654b7d3743SKunihiko Hayashi map0 { 1664b7d3743SKunihiko Hayashi trip = <&cpu_alert>; 1674b7d3743SKunihiko Hayashi cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 1684b7d3743SKunihiko Hayashi <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 1694b7d3743SKunihiko Hayashi <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 1704b7d3743SKunihiko Hayashi <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 1714b7d3743SKunihiko Hayashi }; 1724b7d3743SKunihiko Hayashi }; 1734b7d3743SKunihiko Hayashi }; 1744b7d3743SKunihiko Hayashi }; 1754b7d3743SKunihiko Hayashi 176aa385712SMasahiro Yamada reserved-memory { 177aa385712SMasahiro Yamada #address-cells = <2>; 178aa385712SMasahiro Yamada #size-cells = <2>; 179aa385712SMasahiro Yamada ranges; 180aa385712SMasahiro Yamada 181aa385712SMasahiro Yamada secure-memory@81000000 { 182aa385712SMasahiro Yamada reg = <0x0 0x81000000 0x0 0x01000000>; 183aa385712SMasahiro Yamada no-map; 184aa385712SMasahiro Yamada }; 185aa385712SMasahiro Yamada }; 186aa385712SMasahiro Yamada 187c28adcb5SMasahiro Yamada soc@0 { 188c28adcb5SMasahiro Yamada compatible = "simple-bus"; 189c28adcb5SMasahiro Yamada #address-cells = <1>; 190c28adcb5SMasahiro Yamada #size-cells = <1>; 191c28adcb5SMasahiro Yamada ranges = <0 0 0 0xffffffff>; 192c28adcb5SMasahiro Yamada 193925c5c32SKunihiko Hayashi spi0: spi@54006000 { 194925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 195925c5c32SKunihiko Hayashi status = "disabled"; 196925c5c32SKunihiko Hayashi reg = <0x54006000 0x100>; 1971a13827bSMasahiro Yamada #address-cells = <1>; 1981a13827bSMasahiro Yamada #size-cells = <0>; 199*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 200925c5c32SKunihiko Hayashi pinctrl-names = "default"; 201925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi0>; 202925c5c32SKunihiko Hayashi clocks = <&peri_clk 11>; 203925c5c32SKunihiko Hayashi resets = <&peri_rst 11>; 204925c5c32SKunihiko Hayashi }; 205925c5c32SKunihiko Hayashi 206925c5c32SKunihiko Hayashi spi1: spi@54006100 { 207925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 208925c5c32SKunihiko Hayashi status = "disabled"; 209925c5c32SKunihiko Hayashi reg = <0x54006100 0x100>; 2101a13827bSMasahiro Yamada #address-cells = <1>; 2111a13827bSMasahiro Yamada #size-cells = <0>; 212*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>; 213925c5c32SKunihiko Hayashi pinctrl-names = "default"; 214925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi1>; 215fdf9c17bSKunihiko Hayashi clocks = <&peri_clk 12>; 216fdf9c17bSKunihiko Hayashi resets = <&peri_rst 12>; 217925c5c32SKunihiko Hayashi }; 218925c5c32SKunihiko Hayashi 219c28adcb5SMasahiro Yamada serial0: serial@54006800 { 220c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-uart"; 221c28adcb5SMasahiro Yamada status = "disabled"; 222c28adcb5SMasahiro Yamada reg = <0x54006800 0x40>; 223*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 224c28adcb5SMasahiro Yamada pinctrl-names = "default"; 225c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 226c28adcb5SMasahiro Yamada clocks = <&peri_clk 0>; 22776c48e1eSMasahiro Yamada resets = <&peri_rst 0>; 228c28adcb5SMasahiro Yamada }; 229c28adcb5SMasahiro Yamada 230c28adcb5SMasahiro Yamada serial1: serial@54006900 { 231c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-uart"; 232c28adcb5SMasahiro Yamada status = "disabled"; 233c28adcb5SMasahiro Yamada reg = <0x54006900 0x40>; 234*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 235c28adcb5SMasahiro Yamada pinctrl-names = "default"; 236c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 237c28adcb5SMasahiro Yamada clocks = <&peri_clk 1>; 23876c48e1eSMasahiro Yamada resets = <&peri_rst 1>; 239c28adcb5SMasahiro Yamada }; 240c28adcb5SMasahiro Yamada 241c28adcb5SMasahiro Yamada serial2: serial@54006a00 { 242c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-uart"; 243c28adcb5SMasahiro Yamada status = "disabled"; 244c28adcb5SMasahiro Yamada reg = <0x54006a00 0x40>; 245*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 246c28adcb5SMasahiro Yamada pinctrl-names = "default"; 247c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 248c28adcb5SMasahiro Yamada clocks = <&peri_clk 2>; 24976c48e1eSMasahiro Yamada resets = <&peri_rst 2>; 250c28adcb5SMasahiro Yamada }; 251c28adcb5SMasahiro Yamada 252c28adcb5SMasahiro Yamada serial3: serial@54006b00 { 253c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-uart"; 254c28adcb5SMasahiro Yamada status = "disabled"; 255c28adcb5SMasahiro Yamada reg = <0x54006b00 0x40>; 256*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; 257c28adcb5SMasahiro Yamada pinctrl-names = "default"; 258c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 259c28adcb5SMasahiro Yamada clocks = <&peri_clk 3>; 26076c48e1eSMasahiro Yamada resets = <&peri_rst 3>; 261c28adcb5SMasahiro Yamada }; 262c28adcb5SMasahiro Yamada 263277b51e7SMasahiro Yamada gpio: gpio@55000000 { 264277b51e7SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 265277b51e7SMasahiro Yamada reg = <0x55000000 0x200>; 266277b51e7SMasahiro Yamada interrupt-parent = <&aidet>; 267277b51e7SMasahiro Yamada interrupt-controller; 268277b51e7SMasahiro Yamada #interrupt-cells = <2>; 269277b51e7SMasahiro Yamada gpio-controller; 270277b51e7SMasahiro Yamada #gpio-cells = <2>; 271277b51e7SMasahiro Yamada gpio-ranges = <&pinctrl 0 0 0>, 272abb62c46SMasahiro Yamada <&pinctrl 104 0 0>, 273abb62c46SMasahiro Yamada <&pinctrl 168 0 0>; 274277b51e7SMasahiro Yamada gpio-ranges-group-names = "gpio_range0", 275277b51e7SMasahiro Yamada "gpio_range1", 276277b51e7SMasahiro Yamada "gpio_range2"; 277277b51e7SMasahiro Yamada ngpios = <286>; 278277b51e7SMasahiro Yamada socionext,interrupt-ranges = <0 48 16>, <16 154 5>, 279277b51e7SMasahiro Yamada <21 217 3>; 280277b51e7SMasahiro Yamada }; 281277b51e7SMasahiro Yamada 282c28adcb5SMasahiro Yamada i2c0: i2c@58780000 { 283c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 284c28adcb5SMasahiro Yamada status = "disabled"; 285c28adcb5SMasahiro Yamada reg = <0x58780000 0x80>; 286c28adcb5SMasahiro Yamada #address-cells = <1>; 287c28adcb5SMasahiro Yamada #size-cells = <0>; 288*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 289c28adcb5SMasahiro Yamada pinctrl-names = "default"; 290c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 291c28adcb5SMasahiro Yamada clocks = <&peri_clk 4>; 29276c48e1eSMasahiro Yamada resets = <&peri_rst 4>; 293c28adcb5SMasahiro Yamada clock-frequency = <100000>; 294c28adcb5SMasahiro Yamada }; 295c28adcb5SMasahiro Yamada 296c28adcb5SMasahiro Yamada i2c1: i2c@58781000 { 297c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 298c28adcb5SMasahiro Yamada status = "disabled"; 299c28adcb5SMasahiro Yamada reg = <0x58781000 0x80>; 300c28adcb5SMasahiro Yamada #address-cells = <1>; 301c28adcb5SMasahiro Yamada #size-cells = <0>; 302*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; 303c28adcb5SMasahiro Yamada pinctrl-names = "default"; 304c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 305c28adcb5SMasahiro Yamada clocks = <&peri_clk 5>; 30676c48e1eSMasahiro Yamada resets = <&peri_rst 5>; 307c28adcb5SMasahiro Yamada clock-frequency = <100000>; 308c28adcb5SMasahiro Yamada }; 309c28adcb5SMasahiro Yamada 310c28adcb5SMasahiro Yamada i2c2: i2c@58782000 { 311c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 312c28adcb5SMasahiro Yamada status = "disabled"; 313c28adcb5SMasahiro Yamada reg = <0x58782000 0x80>; 314c28adcb5SMasahiro Yamada #address-cells = <1>; 315c28adcb5SMasahiro Yamada #size-cells = <0>; 316*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 317c28adcb5SMasahiro Yamada pinctrl-names = "default"; 318c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c2>; 319c28adcb5SMasahiro Yamada clocks = <&peri_clk 6>; 32076c48e1eSMasahiro Yamada resets = <&peri_rst 6>; 321c28adcb5SMasahiro Yamada clock-frequency = <100000>; 322c28adcb5SMasahiro Yamada }; 323c28adcb5SMasahiro Yamada 324c28adcb5SMasahiro Yamada i2c3: i2c@58783000 { 325c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 326c28adcb5SMasahiro Yamada status = "disabled"; 327c28adcb5SMasahiro Yamada reg = <0x58783000 0x80>; 328c28adcb5SMasahiro Yamada #address-cells = <1>; 329c28adcb5SMasahiro Yamada #size-cells = <0>; 330*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 331c28adcb5SMasahiro Yamada pinctrl-names = "default"; 332c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 333c28adcb5SMasahiro Yamada clocks = <&peri_clk 7>; 33476c48e1eSMasahiro Yamada resets = <&peri_rst 7>; 335c28adcb5SMasahiro Yamada clock-frequency = <100000>; 336c28adcb5SMasahiro Yamada }; 337c28adcb5SMasahiro Yamada 338c28adcb5SMasahiro Yamada /* chip-internal connection for HDMI */ 339c28adcb5SMasahiro Yamada i2c6: i2c@58786000 { 340c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 341c28adcb5SMasahiro Yamada reg = <0x58786000 0x80>; 342c28adcb5SMasahiro Yamada #address-cells = <1>; 343c28adcb5SMasahiro Yamada #size-cells = <0>; 344*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 345c28adcb5SMasahiro Yamada clocks = <&peri_clk 10>; 34676c48e1eSMasahiro Yamada resets = <&peri_rst 10>; 347c28adcb5SMasahiro Yamada clock-frequency = <400000>; 348c28adcb5SMasahiro Yamada }; 349c28adcb5SMasahiro Yamada 350c28adcb5SMasahiro Yamada system_bus: system-bus@58c00000 { 351c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 352c28adcb5SMasahiro Yamada status = "disabled"; 353c28adcb5SMasahiro Yamada reg = <0x58c00000 0x400>; 354c28adcb5SMasahiro Yamada #address-cells = <2>; 355c28adcb5SMasahiro Yamada #size-cells = <1>; 356c28adcb5SMasahiro Yamada pinctrl-names = "default"; 357c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 358c28adcb5SMasahiro Yamada }; 359c28adcb5SMasahiro Yamada 360c28adcb5SMasahiro Yamada smpctrl@59801000 { 361c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 362c28adcb5SMasahiro Yamada reg = <0x59801000 0x400>; 363c28adcb5SMasahiro Yamada }; 364c28adcb5SMasahiro Yamada 365c28adcb5SMasahiro Yamada sdctrl@59810000 { 366c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-sdctrl", 367c28adcb5SMasahiro Yamada "simple-mfd", "syscon"; 368c28adcb5SMasahiro Yamada reg = <0x59810000 0x400>; 369c28adcb5SMasahiro Yamada 370c28adcb5SMasahiro Yamada sd_clk: clock { 371c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-sd-clock"; 372c28adcb5SMasahiro Yamada #clock-cells = <1>; 373c28adcb5SMasahiro Yamada }; 374c28adcb5SMasahiro Yamada 375c28adcb5SMasahiro Yamada sd_rst: reset { 376c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-sd-reset"; 377c28adcb5SMasahiro Yamada #reset-cells = <1>; 378c28adcb5SMasahiro Yamada }; 379c28adcb5SMasahiro Yamada }; 380c28adcb5SMasahiro Yamada 381c28adcb5SMasahiro Yamada perictrl@59820000 { 382c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-perictrl", 383c28adcb5SMasahiro Yamada "simple-mfd", "syscon"; 384c28adcb5SMasahiro Yamada reg = <0x59820000 0x200>; 385c28adcb5SMasahiro Yamada 386c28adcb5SMasahiro Yamada peri_clk: clock { 387c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-peri-clock"; 388c28adcb5SMasahiro Yamada #clock-cells = <1>; 389c28adcb5SMasahiro Yamada }; 390c28adcb5SMasahiro Yamada 391c28adcb5SMasahiro Yamada peri_rst: reset { 392c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-peri-reset"; 393c28adcb5SMasahiro Yamada #reset-cells = <1>; 394c28adcb5SMasahiro Yamada }; 395c28adcb5SMasahiro Yamada }; 396c28adcb5SMasahiro Yamada 397bb3f4672SMasahiro Yamada emmc: mmc@5a000000 { 398c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 399c28adcb5SMasahiro Yamada reg = <0x5a000000 0x400>; 400*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 401c28adcb5SMasahiro Yamada pinctrl-names = "default"; 402c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_emmc>; 403c28adcb5SMasahiro Yamada clocks = <&sys_clk 4>; 40476c48e1eSMasahiro Yamada resets = <&sys_rst 4>; 405c28adcb5SMasahiro Yamada bus-width = <8>; 406c28adcb5SMasahiro Yamada mmc-ddr-1_8v; 407c28adcb5SMasahiro Yamada mmc-hs200-1_8v; 408b6e5ec20SMasahiro Yamada mmc-pwrseq = <&emmc_pwrseq>; 409f4e5200fSMasahiro Yamada cdns,phy-input-delay-legacy = <9>; 410c28adcb5SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 411c28adcb5SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 412c28adcb5SMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 413c28adcb5SMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 414c28adcb5SMasahiro Yamada }; 415c28adcb5SMasahiro Yamada 416bb3f4672SMasahiro Yamada sd: mmc@5a400000 { 41784a9c4d5SMasahiro Yamada compatible = "socionext,uniphier-sd-v3.1.1"; 41884a9c4d5SMasahiro Yamada status = "disabled"; 41984a9c4d5SMasahiro Yamada reg = <0x5a400000 0x800>; 420*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 42184a9c4d5SMasahiro Yamada pinctrl-names = "default", "uhs"; 42284a9c4d5SMasahiro Yamada pinctrl-0 = <&pinctrl_sd>; 42384a9c4d5SMasahiro Yamada pinctrl-1 = <&pinctrl_sd_uhs>; 42484a9c4d5SMasahiro Yamada clocks = <&sd_clk 0>; 42584a9c4d5SMasahiro Yamada reset-names = "host"; 42684a9c4d5SMasahiro Yamada resets = <&sd_rst 0>; 42784a9c4d5SMasahiro Yamada bus-width = <4>; 42884a9c4d5SMasahiro Yamada cap-sd-highspeed; 42984a9c4d5SMasahiro Yamada sd-uhs-sdr12; 43084a9c4d5SMasahiro Yamada sd-uhs-sdr25; 43184a9c4d5SMasahiro Yamada sd-uhs-sdr50; 43284a9c4d5SMasahiro Yamada }; 43384a9c4d5SMasahiro Yamada 434b076ff8bSKunihiko Hayashi soc_glue: soc-glue@5f800000 { 435c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-soc-glue", 436c28adcb5SMasahiro Yamada "simple-mfd", "syscon"; 437c28adcb5SMasahiro Yamada reg = <0x5f800000 0x2000>; 438c28adcb5SMasahiro Yamada 439c28adcb5SMasahiro Yamada pinctrl: pinctrl { 440c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-pinctrl"; 441c28adcb5SMasahiro Yamada }; 442c28adcb5SMasahiro Yamada }; 443c28adcb5SMasahiro Yamada 444f05851e1SKeiji Hayashibara soc-glue@5f900000 { 445f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-pxs3-soc-glue-debug", 446f05851e1SKeiji Hayashibara "simple-mfd"; 447f05851e1SKeiji Hayashibara #address-cells = <1>; 448f05851e1SKeiji Hayashibara #size-cells = <1>; 449f05851e1SKeiji Hayashibara ranges = <0 0x5f900000 0x2000>; 450f05851e1SKeiji Hayashibara 451f05851e1SKeiji Hayashibara efuse@100 { 452f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 453f05851e1SKeiji Hayashibara reg = <0x100 0x28>; 454f05851e1SKeiji Hayashibara }; 455f05851e1SKeiji Hayashibara 456f05851e1SKeiji Hayashibara efuse@200 { 457f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 458f05851e1SKeiji Hayashibara reg = <0x200 0x68>; 459d7b9beb8SKunihiko Hayashi #address-cells = <1>; 460d7b9beb8SKunihiko Hayashi #size-cells = <1>; 461d7b9beb8SKunihiko Hayashi 462d7b9beb8SKunihiko Hayashi /* USB cells */ 463d7b9beb8SKunihiko Hayashi usb_rterm0: trim@54,4 { 464d7b9beb8SKunihiko Hayashi reg = <0x54 1>; 465d7b9beb8SKunihiko Hayashi bits = <4 2>; 466d7b9beb8SKunihiko Hayashi }; 467d7b9beb8SKunihiko Hayashi usb_rterm1: trim@55,4 { 468d7b9beb8SKunihiko Hayashi reg = <0x55 1>; 469d7b9beb8SKunihiko Hayashi bits = <4 2>; 470d7b9beb8SKunihiko Hayashi }; 471d7b9beb8SKunihiko Hayashi usb_rterm2: trim@58,4 { 472d7b9beb8SKunihiko Hayashi reg = <0x58 1>; 473d7b9beb8SKunihiko Hayashi bits = <4 2>; 474d7b9beb8SKunihiko Hayashi }; 475d7b9beb8SKunihiko Hayashi usb_rterm3: trim@59,4 { 476d7b9beb8SKunihiko Hayashi reg = <0x59 1>; 477d7b9beb8SKunihiko Hayashi bits = <4 2>; 478d7b9beb8SKunihiko Hayashi }; 479d7b9beb8SKunihiko Hayashi usb_sel_t0: trim@54,0 { 480d7b9beb8SKunihiko Hayashi reg = <0x54 1>; 481d7b9beb8SKunihiko Hayashi bits = <0 4>; 482d7b9beb8SKunihiko Hayashi }; 483d7b9beb8SKunihiko Hayashi usb_sel_t1: trim@55,0 { 484d7b9beb8SKunihiko Hayashi reg = <0x55 1>; 485d7b9beb8SKunihiko Hayashi bits = <0 4>; 486d7b9beb8SKunihiko Hayashi }; 487d7b9beb8SKunihiko Hayashi usb_sel_t2: trim@58,0 { 488d7b9beb8SKunihiko Hayashi reg = <0x58 1>; 489d7b9beb8SKunihiko Hayashi bits = <0 4>; 490d7b9beb8SKunihiko Hayashi }; 491d7b9beb8SKunihiko Hayashi usb_sel_t3: trim@59,0 { 492d7b9beb8SKunihiko Hayashi reg = <0x59 1>; 493d7b9beb8SKunihiko Hayashi bits = <0 4>; 494d7b9beb8SKunihiko Hayashi }; 495d7b9beb8SKunihiko Hayashi usb_hs_i0: trim@56,0 { 496d7b9beb8SKunihiko Hayashi reg = <0x56 1>; 497d7b9beb8SKunihiko Hayashi bits = <0 4>; 498d7b9beb8SKunihiko Hayashi }; 499d7b9beb8SKunihiko Hayashi usb_hs_i2: trim@5a,0 { 500d7b9beb8SKunihiko Hayashi reg = <0x5a 1>; 501d7b9beb8SKunihiko Hayashi bits = <0 4>; 502d7b9beb8SKunihiko Hayashi }; 503f05851e1SKeiji Hayashibara }; 504f05851e1SKeiji Hayashibara }; 505f05851e1SKeiji Hayashibara 506f03b998dSKunihiko Hayashi xdmac: dma-controller@5fc10000 { 507f03b998dSKunihiko Hayashi compatible = "socionext,uniphier-xdmac"; 508f03b998dSKunihiko Hayashi reg = <0x5fc10000 0x5300>; 509*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 510f03b998dSKunihiko Hayashi dma-channels = <16>; 511f03b998dSKunihiko Hayashi #dma-cells = <2>; 512f03b998dSKunihiko Hayashi }; 513f03b998dSKunihiko Hayashi 5149ddc285bSMasahiro Yamada aidet: interrupt-controller@5fc20000 { 515c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-aidet"; 516c28adcb5SMasahiro Yamada reg = <0x5fc20000 0x200>; 517c28adcb5SMasahiro Yamada interrupt-controller; 518c28adcb5SMasahiro Yamada #interrupt-cells = <2>; 519c28adcb5SMasahiro Yamada }; 520c28adcb5SMasahiro Yamada 521c28adcb5SMasahiro Yamada gic: interrupt-controller@5fe00000 { 522c28adcb5SMasahiro Yamada compatible = "arm,gic-v3"; 523c28adcb5SMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 524c28adcb5SMasahiro Yamada <0x5fe80000 0x80000>; /* GICR */ 525c28adcb5SMasahiro Yamada interrupt-controller; 526c28adcb5SMasahiro Yamada #interrupt-cells = <3>; 527*5ba95e8eSKunihiko Hayashi interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 528c28adcb5SMasahiro Yamada }; 529c28adcb5SMasahiro Yamada 530c28adcb5SMasahiro Yamada sysctrl@61840000 { 531c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-sysctrl", 532c28adcb5SMasahiro Yamada "simple-mfd", "syscon"; 533c28adcb5SMasahiro Yamada reg = <0x61840000 0x10000>; 534c28adcb5SMasahiro Yamada 535c28adcb5SMasahiro Yamada sys_clk: clock { 536c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-clock"; 537c28adcb5SMasahiro Yamada #clock-cells = <1>; 538c28adcb5SMasahiro Yamada }; 539c28adcb5SMasahiro Yamada 540c28adcb5SMasahiro Yamada sys_rst: reset { 541c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-pxs3-reset"; 542c28adcb5SMasahiro Yamada #reset-cells = <1>; 543c28adcb5SMasahiro Yamada }; 544c28adcb5SMasahiro Yamada 545c28adcb5SMasahiro Yamada watchdog { 546c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-wdt"; 547c28adcb5SMasahiro Yamada }; 5484b7d3743SKunihiko Hayashi 5492dfb62d6SKunihiko Hayashi pvtctl: thermal-sensor { 5504b7d3743SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-thermal"; 551*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 5524b7d3743SKunihiko Hayashi #thermal-sensor-cells = <0>; 5534b7d3743SKunihiko Hayashi socionext,tmod-calibration = <0x0f22 0x68ee>; 5544b7d3743SKunihiko Hayashi }; 555c28adcb5SMasahiro Yamada }; 556c28adcb5SMasahiro Yamada 557aba054a1SKunihiko Hayashi eth0: ethernet@65000000 { 558aba054a1SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-ave4"; 559aba054a1SKunihiko Hayashi status = "disabled"; 560aba054a1SKunihiko Hayashi reg = <0x65000000 0x8500>; 561*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; 562aba054a1SKunihiko Hayashi pinctrl-names = "default"; 563aba054a1SKunihiko Hayashi pinctrl-0 = <&pinctrl_ether_rgmii>; 564a34a464dSKunihiko Hayashi clock-names = "ether"; 565aba054a1SKunihiko Hayashi clocks = <&sys_clk 6>; 566a34a464dSKunihiko Hayashi reset-names = "ether"; 567aba054a1SKunihiko Hayashi resets = <&sys_rst 6>; 568dcabb06bSKunihiko Hayashi phy-mode = "rgmii-id"; 569aba054a1SKunihiko Hayashi local-mac-address = [00 00 00 00 00 00]; 570b076ff8bSKunihiko Hayashi socionext,syscon-phy-mode = <&soc_glue 0>; 571aba054a1SKunihiko Hayashi 572aba054a1SKunihiko Hayashi mdio0: mdio { 573aba054a1SKunihiko Hayashi #address-cells = <1>; 574aba054a1SKunihiko Hayashi #size-cells = <0>; 575aba054a1SKunihiko Hayashi }; 576aba054a1SKunihiko Hayashi }; 577aba054a1SKunihiko Hayashi 578aba054a1SKunihiko Hayashi eth1: ethernet@65200000 { 579aba054a1SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-ave4"; 580aba054a1SKunihiko Hayashi status = "disabled"; 581aba054a1SKunihiko Hayashi reg = <0x65200000 0x8500>; 582*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 583aba054a1SKunihiko Hayashi pinctrl-names = "default"; 584aba054a1SKunihiko Hayashi pinctrl-0 = <&pinctrl_ether1_rgmii>; 585a34a464dSKunihiko Hayashi clock-names = "ether"; 586aba054a1SKunihiko Hayashi clocks = <&sys_clk 7>; 587a34a464dSKunihiko Hayashi reset-names = "ether"; 588aba054a1SKunihiko Hayashi resets = <&sys_rst 7>; 589dcabb06bSKunihiko Hayashi phy-mode = "rgmii-id"; 590aba054a1SKunihiko Hayashi local-mac-address = [00 00 00 00 00 00]; 591b076ff8bSKunihiko Hayashi socionext,syscon-phy-mode = <&soc_glue 1>; 592aba054a1SKunihiko Hayashi 593aba054a1SKunihiko Hayashi mdio1: mdio { 594aba054a1SKunihiko Hayashi #address-cells = <1>; 595aba054a1SKunihiko Hayashi #size-cells = <0>; 596aba054a1SKunihiko Hayashi }; 597aba054a1SKunihiko Hayashi }; 598aba054a1SKunihiko Hayashi 599d7b9beb8SKunihiko Hayashi usb0: usb@65a00000 { 600d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-dwc3", "snps,dwc3"; 601d7b9beb8SKunihiko Hayashi status = "disabled"; 602d7b9beb8SKunihiko Hayashi reg = <0x65a00000 0xcd00>; 603fe17b91aSKunihiko Hayashi interrupt-names = "dwc_usb3"; 604*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; 605d7b9beb8SKunihiko Hayashi pinctrl-names = "default"; 606d7b9beb8SKunihiko Hayashi pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>; 607d7b9beb8SKunihiko Hayashi clock-names = "ref", "bus_early", "suspend"; 608d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>; 609d7b9beb8SKunihiko Hayashi resets = <&usb0_rst 15>; 610d7b9beb8SKunihiko Hayashi phys = <&usb0_hsphy0>, <&usb0_hsphy1>, 611d7b9beb8SKunihiko Hayashi <&usb0_ssphy0>, <&usb0_ssphy1>; 612d7b9beb8SKunihiko Hayashi dr_mode = "host"; 613d7b9beb8SKunihiko Hayashi }; 614d7b9beb8SKunihiko Hayashi 6154cc752a8SKunihiko Hayashi usb-controller@65b00000 { 616d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-dwc3-glue", 617d7b9beb8SKunihiko Hayashi "simple-mfd"; 618d7b9beb8SKunihiko Hayashi #address-cells = <1>; 619d7b9beb8SKunihiko Hayashi #size-cells = <1>; 620d7b9beb8SKunihiko Hayashi ranges = <0 0x65b00000 0x400>; 621d7b9beb8SKunihiko Hayashi 622d7b9beb8SKunihiko Hayashi usb0_rst: reset@0 { 623d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-reset"; 624d7b9beb8SKunihiko Hayashi reg = <0x0 0x4>; 625d7b9beb8SKunihiko Hayashi #reset-cells = <1>; 626d7b9beb8SKunihiko Hayashi clock-names = "link"; 627d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 12>; 628d7b9beb8SKunihiko Hayashi reset-names = "link"; 629d7b9beb8SKunihiko Hayashi resets = <&sys_rst 12>; 630d7b9beb8SKunihiko Hayashi }; 631d7b9beb8SKunihiko Hayashi 632d7b9beb8SKunihiko Hayashi usb0_vbus0: regulator@100 { 633d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-regulator"; 634d7b9beb8SKunihiko Hayashi reg = <0x100 0x10>; 635d7b9beb8SKunihiko Hayashi clock-names = "link"; 636d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 12>; 637d7b9beb8SKunihiko Hayashi reset-names = "link"; 638d7b9beb8SKunihiko Hayashi resets = <&sys_rst 12>; 639d7b9beb8SKunihiko Hayashi }; 640d7b9beb8SKunihiko Hayashi 641d7b9beb8SKunihiko Hayashi usb0_vbus1: regulator@110 { 642d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-regulator"; 643d7b9beb8SKunihiko Hayashi reg = <0x110 0x10>; 644d7b9beb8SKunihiko Hayashi clock-names = "link"; 645d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 12>; 646d7b9beb8SKunihiko Hayashi reset-names = "link"; 647d7b9beb8SKunihiko Hayashi resets = <&sys_rst 12>; 648d7b9beb8SKunihiko Hayashi }; 649d7b9beb8SKunihiko Hayashi 650d7b9beb8SKunihiko Hayashi usb0_hsphy0: hs-phy@200 { 651d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-hsphy"; 652d7b9beb8SKunihiko Hayashi reg = <0x200 0x10>; 653d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 654d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 655d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 12>, <&sys_clk 16>; 656d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 657d7b9beb8SKunihiko Hayashi resets = <&sys_rst 12>, <&sys_rst 16>; 658d7b9beb8SKunihiko Hayashi vbus-supply = <&usb0_vbus0>; 659d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 660d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm0>, <&usb_sel_t0>, 661d7b9beb8SKunihiko Hayashi <&usb_hs_i0>; 662d7b9beb8SKunihiko Hayashi }; 663d7b9beb8SKunihiko Hayashi 664d7b9beb8SKunihiko Hayashi usb0_hsphy1: hs-phy@210 { 665d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-hsphy"; 666d7b9beb8SKunihiko Hayashi reg = <0x210 0x10>; 667d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 668d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 669d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 12>, <&sys_clk 16>; 670d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 671d7b9beb8SKunihiko Hayashi resets = <&sys_rst 12>, <&sys_rst 16>; 672d7b9beb8SKunihiko Hayashi vbus-supply = <&usb0_vbus1>; 673d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 674d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm1>, <&usb_sel_t1>, 675d7b9beb8SKunihiko Hayashi <&usb_hs_i0>; 676d7b9beb8SKunihiko Hayashi }; 677d7b9beb8SKunihiko Hayashi 678d7b9beb8SKunihiko Hayashi usb0_ssphy0: ss-phy@300 { 679d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-ssphy"; 680d7b9beb8SKunihiko Hayashi reg = <0x300 0x10>; 681d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 682d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 683d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 12>, <&sys_clk 17>; 684d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 685d7b9beb8SKunihiko Hayashi resets = <&sys_rst 12>, <&sys_rst 17>; 686d7b9beb8SKunihiko Hayashi vbus-supply = <&usb0_vbus0>; 687d7b9beb8SKunihiko Hayashi }; 688d7b9beb8SKunihiko Hayashi 689d7b9beb8SKunihiko Hayashi usb0_ssphy1: ss-phy@310 { 690d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-ssphy"; 691d7b9beb8SKunihiko Hayashi reg = <0x310 0x10>; 692d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 693d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 694d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 12>, <&sys_clk 18>; 695d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 696d7b9beb8SKunihiko Hayashi resets = <&sys_rst 12>, <&sys_rst 18>; 697d7b9beb8SKunihiko Hayashi vbus-supply = <&usb0_vbus1>; 698d7b9beb8SKunihiko Hayashi }; 699d7b9beb8SKunihiko Hayashi }; 700d7b9beb8SKunihiko Hayashi 701d7b9beb8SKunihiko Hayashi usb1: usb@65c00000 { 702d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-dwc3", "snps,dwc3"; 703d7b9beb8SKunihiko Hayashi status = "disabled"; 704d7b9beb8SKunihiko Hayashi reg = <0x65c00000 0xcd00>; 705fe17b91aSKunihiko Hayashi interrupt-names = "dwc_usb3"; 706*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; 707d7b9beb8SKunihiko Hayashi pinctrl-names = "default"; 708d7b9beb8SKunihiko Hayashi pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>; 709d7b9beb8SKunihiko Hayashi clock-names = "ref", "bus_early", "suspend"; 710d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 13>, <&sys_clk 13>, <&sys_clk 13>; 711d7b9beb8SKunihiko Hayashi resets = <&usb1_rst 15>; 712d7b9beb8SKunihiko Hayashi phys = <&usb1_hsphy0>, <&usb1_hsphy1>, 713d7b9beb8SKunihiko Hayashi <&usb1_ssphy0>; 714d7b9beb8SKunihiko Hayashi dr_mode = "host"; 715d7b9beb8SKunihiko Hayashi }; 716d7b9beb8SKunihiko Hayashi 7174cc752a8SKunihiko Hayashi usb-controller@65d00000 { 718d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-dwc3-glue", 719d7b9beb8SKunihiko Hayashi "simple-mfd"; 720d7b9beb8SKunihiko Hayashi #address-cells = <1>; 721d7b9beb8SKunihiko Hayashi #size-cells = <1>; 722d7b9beb8SKunihiko Hayashi ranges = <0 0x65d00000 0x400>; 723d7b9beb8SKunihiko Hayashi 724d7b9beb8SKunihiko Hayashi usb1_rst: reset@0 { 725d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-reset"; 726d7b9beb8SKunihiko Hayashi reg = <0x0 0x4>; 727d7b9beb8SKunihiko Hayashi #reset-cells = <1>; 728d7b9beb8SKunihiko Hayashi clock-names = "link"; 729d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 13>; 730d7b9beb8SKunihiko Hayashi reset-names = "link"; 731d7b9beb8SKunihiko Hayashi resets = <&sys_rst 13>; 732d7b9beb8SKunihiko Hayashi }; 733d7b9beb8SKunihiko Hayashi 734d7b9beb8SKunihiko Hayashi usb1_vbus0: regulator@100 { 735d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-regulator"; 736d7b9beb8SKunihiko Hayashi reg = <0x100 0x10>; 737d7b9beb8SKunihiko Hayashi clock-names = "link"; 738d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 13>; 739d7b9beb8SKunihiko Hayashi reset-names = "link"; 740d7b9beb8SKunihiko Hayashi resets = <&sys_rst 13>; 741d7b9beb8SKunihiko Hayashi }; 742d7b9beb8SKunihiko Hayashi 743d7b9beb8SKunihiko Hayashi usb1_vbus1: regulator@110 { 744d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-regulator"; 745d7b9beb8SKunihiko Hayashi reg = <0x110 0x10>; 746d7b9beb8SKunihiko Hayashi clock-names = "link"; 747d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 13>; 748d7b9beb8SKunihiko Hayashi reset-names = "link"; 749d7b9beb8SKunihiko Hayashi resets = <&sys_rst 13>; 750d7b9beb8SKunihiko Hayashi }; 751d7b9beb8SKunihiko Hayashi 752d7b9beb8SKunihiko Hayashi usb1_hsphy0: hs-phy@200 { 753d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-hsphy"; 754d7b9beb8SKunihiko Hayashi reg = <0x200 0x10>; 755d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 756d7b9beb8SKunihiko Hayashi clock-names = "link", "phy", "phy-ext"; 757d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 13>, <&sys_clk 20>, 758d7b9beb8SKunihiko Hayashi <&sys_clk 14>; 759d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 760d7b9beb8SKunihiko Hayashi resets = <&sys_rst 13>, <&sys_rst 20>; 761d7b9beb8SKunihiko Hayashi vbus-supply = <&usb1_vbus0>; 762d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 763d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm2>, <&usb_sel_t2>, 764d7b9beb8SKunihiko Hayashi <&usb_hs_i2>; 765d7b9beb8SKunihiko Hayashi }; 766d7b9beb8SKunihiko Hayashi 767d7b9beb8SKunihiko Hayashi usb1_hsphy1: hs-phy@210 { 768d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-hsphy"; 769d7b9beb8SKunihiko Hayashi reg = <0x210 0x10>; 770d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 771d7b9beb8SKunihiko Hayashi clock-names = "link", "phy", "phy-ext"; 772d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 13>, <&sys_clk 20>, 773d7b9beb8SKunihiko Hayashi <&sys_clk 14>; 774d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 775d7b9beb8SKunihiko Hayashi resets = <&sys_rst 13>, <&sys_rst 20>; 776d7b9beb8SKunihiko Hayashi vbus-supply = <&usb1_vbus1>; 777d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 778d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm3>, <&usb_sel_t3>, 779d7b9beb8SKunihiko Hayashi <&usb_hs_i2>; 780d7b9beb8SKunihiko Hayashi }; 781d7b9beb8SKunihiko Hayashi 782d7b9beb8SKunihiko Hayashi usb1_ssphy0: ss-phy@300 { 783d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-usb3-ssphy"; 784d7b9beb8SKunihiko Hayashi reg = <0x300 0x10>; 785d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 786d7b9beb8SKunihiko Hayashi clock-names = "link", "phy", "phy-ext"; 787d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 13>, <&sys_clk 21>, 788d7b9beb8SKunihiko Hayashi <&sys_clk 14>; 789d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 790d7b9beb8SKunihiko Hayashi resets = <&sys_rst 13>, <&sys_rst 21>; 791d7b9beb8SKunihiko Hayashi vbus-supply = <&usb1_vbus0>; 792d7b9beb8SKunihiko Hayashi }; 793d7b9beb8SKunihiko Hayashi }; 794d7b9beb8SKunihiko Hayashi 79532dfc773SKunihiko Hayashi pcie: pcie@66000000 { 79632dfc773SKunihiko Hayashi compatible = "socionext,uniphier-pcie", "snps,dw-pcie"; 79732dfc773SKunihiko Hayashi status = "disabled"; 79832dfc773SKunihiko Hayashi reg-names = "dbi", "link", "config"; 79932dfc773SKunihiko Hayashi reg = <0x66000000 0x1000>, <0x66010000 0x10000>, 80032dfc773SKunihiko Hayashi <0x2fff0000 0x10000>; 80132dfc773SKunihiko Hayashi #address-cells = <3>; 80232dfc773SKunihiko Hayashi #size-cells = <2>; 80332dfc773SKunihiko Hayashi clocks = <&sys_clk 24>; 80432dfc773SKunihiko Hayashi resets = <&sys_rst 24>; 80532dfc773SKunihiko Hayashi num-lanes = <1>; 80632dfc773SKunihiko Hayashi num-viewport = <1>; 80732dfc773SKunihiko Hayashi bus-range = <0x0 0xff>; 80832dfc773SKunihiko Hayashi device_type = "pci"; 80932dfc773SKunihiko Hayashi ranges = 81032dfc773SKunihiko Hayashi /* downstream I/O */ 81132dfc773SKunihiko Hayashi <0x81000000 0 0x00000000 0x2ffe0000 0 0x00010000>, 81232dfc773SKunihiko Hayashi /* non-prefetchable memory */ 81332dfc773SKunihiko Hayashi <0x82000000 0 0x20000000 0x20000000 0 0x0ffe0000>; 81432dfc773SKunihiko Hayashi #interrupt-cells = <1>; 81532dfc773SKunihiko Hayashi interrupt-names = "dma", "msi"; 816*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>, 817*5ba95e8eSKunihiko Hayashi <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 81832dfc773SKunihiko Hayashi interrupt-map-mask = <0 0 0 7>; 81932dfc773SKunihiko Hayashi interrupt-map = <0 0 0 1 &pcie_intc 0>, /* INTA */ 82032dfc773SKunihiko Hayashi <0 0 0 2 &pcie_intc 1>, /* INTB */ 82132dfc773SKunihiko Hayashi <0 0 0 3 &pcie_intc 2>, /* INTC */ 82232dfc773SKunihiko Hayashi <0 0 0 4 &pcie_intc 3>; /* INTD */ 82332dfc773SKunihiko Hayashi phy-names = "pcie-phy"; 82432dfc773SKunihiko Hayashi phys = <&pcie_phy>; 82532dfc773SKunihiko Hayashi 82632dfc773SKunihiko Hayashi pcie_intc: legacy-interrupt-controller { 82732dfc773SKunihiko Hayashi interrupt-controller; 82832dfc773SKunihiko Hayashi #interrupt-cells = <1>; 82932dfc773SKunihiko Hayashi interrupt-parent = <&gic>; 830*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 83132dfc773SKunihiko Hayashi }; 83232dfc773SKunihiko Hayashi }; 83332dfc773SKunihiko Hayashi 83432dfc773SKunihiko Hayashi pcie_phy: phy@66038000 { 83532dfc773SKunihiko Hayashi compatible = "socionext,uniphier-pxs3-pcie-phy"; 83632dfc773SKunihiko Hayashi reg = <0x66038000 0x4000>; 83732dfc773SKunihiko Hayashi #phy-cells = <0>; 838e6bd81a2SKunihiko Hayashi clock-names = "link"; 83932dfc773SKunihiko Hayashi clocks = <&sys_clk 24>; 840e6bd81a2SKunihiko Hayashi reset-names = "link"; 84132dfc773SKunihiko Hayashi resets = <&sys_rst 24>; 84232dfc773SKunihiko Hayashi socionext,syscon = <&soc_glue>; 84332dfc773SKunihiko Hayashi }; 84432dfc773SKunihiko Hayashi 845fcb0e53cSMasahiro Yamada nand: nand-controller@68000000 { 846c28adcb5SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 847c28adcb5SMasahiro Yamada status = "disabled"; 848c28adcb5SMasahiro Yamada reg-names = "nand_data", "denali_reg"; 849c28adcb5SMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 85053c580c1SMasahiro Yamada #address-cells = <1>; 85153c580c1SMasahiro Yamada #size-cells = <0>; 852*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 853c28adcb5SMasahiro Yamada pinctrl-names = "default"; 854c28adcb5SMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 855bae120f8SMasahiro Yamada clock-names = "nand", "nand_x", "ecc"; 856bae120f8SMasahiro Yamada clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; 857e98d5023SMasahiro Yamada reset-names = "nand", "reg"; 858e98d5023SMasahiro Yamada resets = <&sys_rst 2>, <&sys_rst 2>; 859c28adcb5SMasahiro Yamada }; 860c28adcb5SMasahiro Yamada }; 861c28adcb5SMasahiro Yamada}; 862c28adcb5SMasahiro Yamada 863c28adcb5SMasahiro Yamada#include "uniphier-pinctrl.dtsi" 864