1cea59bd0SMasahiro Yamada/* 2cea59bd0SMasahiro Yamada * Device Tree Source for UniPhier LD20 SoC 3cea59bd0SMasahiro Yamada * 4cea59bd0SMasahiro Yamada * Copyright (C) 2015-2016 Socionext Inc. 5cea59bd0SMasahiro Yamada * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 6cea59bd0SMasahiro Yamada * 7cea59bd0SMasahiro Yamada * This file is dual-licensed: you can use it either under the terms 8cea59bd0SMasahiro Yamada * of the GPL or the X11 license, at your option. Note that this dual 9cea59bd0SMasahiro Yamada * licensing only applies to this file, and not this project as a 10cea59bd0SMasahiro Yamada * whole. 11cea59bd0SMasahiro Yamada * 12cea59bd0SMasahiro Yamada * a) This file is free software; you can redistribute it and/or 13cea59bd0SMasahiro Yamada * modify it under the terms of the GNU General Public License as 14cea59bd0SMasahiro Yamada * published by the Free Software Foundation; either version 2 of the 15cea59bd0SMasahiro Yamada * License, or (at your option) any later version. 16cea59bd0SMasahiro Yamada * 17cea59bd0SMasahiro Yamada * This file is distributed in the hope that it will be useful, 18cea59bd0SMasahiro Yamada * but WITHOUT ANY WARRANTY; without even the implied warranty of 19cea59bd0SMasahiro Yamada * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20cea59bd0SMasahiro Yamada * GNU General Public License for more details. 21cea59bd0SMasahiro Yamada * 22cea59bd0SMasahiro Yamada * Or, alternatively, 23cea59bd0SMasahiro Yamada * 24cea59bd0SMasahiro Yamada * b) Permission is hereby granted, free of charge, to any person 25cea59bd0SMasahiro Yamada * obtaining a copy of this software and associated documentation 26cea59bd0SMasahiro Yamada * files (the "Software"), to deal in the Software without 27cea59bd0SMasahiro Yamada * restriction, including without limitation the rights to use, 28cea59bd0SMasahiro Yamada * copy, modify, merge, publish, distribute, sublicense, and/or 29cea59bd0SMasahiro Yamada * sell copies of the Software, and to permit persons to whom the 30cea59bd0SMasahiro Yamada * Software is furnished to do so, subject to the following 31cea59bd0SMasahiro Yamada * conditions: 32cea59bd0SMasahiro Yamada * 33cea59bd0SMasahiro Yamada * The above copyright notice and this permission notice shall be 34cea59bd0SMasahiro Yamada * included in all copies or substantial portions of the Software. 35cea59bd0SMasahiro Yamada * 36cea59bd0SMasahiro Yamada * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 37cea59bd0SMasahiro Yamada * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 38cea59bd0SMasahiro Yamada * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 39cea59bd0SMasahiro Yamada * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 40cea59bd0SMasahiro Yamada * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 41cea59bd0SMasahiro Yamada * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 42cea59bd0SMasahiro Yamada * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 43cea59bd0SMasahiro Yamada * OTHER DEALINGS IN THE SOFTWARE. 44cea59bd0SMasahiro Yamada */ 45cea59bd0SMasahiro Yamada 46cea59bd0SMasahiro Yamada/memreserve/ 0x80000000 0x00000008; /* cpu-release-addr */ 47cea59bd0SMasahiro Yamada 48cea59bd0SMasahiro Yamada/ { 49cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20"; 50cea59bd0SMasahiro Yamada #address-cells = <2>; 51cea59bd0SMasahiro Yamada #size-cells = <2>; 52cea59bd0SMasahiro Yamada interrupt-parent = <&gic>; 53cea59bd0SMasahiro Yamada 54cea59bd0SMasahiro Yamada cpus { 55cea59bd0SMasahiro Yamada #address-cells = <2>; 56cea59bd0SMasahiro Yamada #size-cells = <0>; 57cea59bd0SMasahiro Yamada 58cea59bd0SMasahiro Yamada cpu-map { 59cea59bd0SMasahiro Yamada cluster0 { 60cea59bd0SMasahiro Yamada core0 { 61cea59bd0SMasahiro Yamada cpu = <&cpu0>; 62cea59bd0SMasahiro Yamada }; 63cea59bd0SMasahiro Yamada core1 { 64cea59bd0SMasahiro Yamada cpu = <&cpu1>; 65cea59bd0SMasahiro Yamada }; 66cea59bd0SMasahiro Yamada }; 67cea59bd0SMasahiro Yamada 68cea59bd0SMasahiro Yamada cluster1 { 69cea59bd0SMasahiro Yamada core0 { 70cea59bd0SMasahiro Yamada cpu = <&cpu2>; 71cea59bd0SMasahiro Yamada }; 72cea59bd0SMasahiro Yamada core1 { 73cea59bd0SMasahiro Yamada cpu = <&cpu3>; 74cea59bd0SMasahiro Yamada }; 75cea59bd0SMasahiro Yamada }; 76cea59bd0SMasahiro Yamada }; 77cea59bd0SMasahiro Yamada 78cea59bd0SMasahiro Yamada cpu0: cpu@0 { 79cea59bd0SMasahiro Yamada device_type = "cpu"; 80cea59bd0SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 81cea59bd0SMasahiro Yamada reg = <0 0x000>; 82cea59bd0SMasahiro Yamada enable-method = "spin-table"; 83cea59bd0SMasahiro Yamada cpu-release-addr = <0 0x80000000>; 84cea59bd0SMasahiro Yamada }; 85cea59bd0SMasahiro Yamada 86cea59bd0SMasahiro Yamada cpu1: cpu@1 { 87cea59bd0SMasahiro Yamada device_type = "cpu"; 88cea59bd0SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 89cea59bd0SMasahiro Yamada reg = <0 0x001>; 90cea59bd0SMasahiro Yamada enable-method = "spin-table"; 91cea59bd0SMasahiro Yamada cpu-release-addr = <0 0x80000000>; 92cea59bd0SMasahiro Yamada }; 93cea59bd0SMasahiro Yamada 94cea59bd0SMasahiro Yamada cpu2: cpu@100 { 95cea59bd0SMasahiro Yamada device_type = "cpu"; 96cea59bd0SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 97cea59bd0SMasahiro Yamada reg = <0 0x100>; 98cea59bd0SMasahiro Yamada enable-method = "spin-table"; 99cea59bd0SMasahiro Yamada cpu-release-addr = <0 0x80000000>; 100cea59bd0SMasahiro Yamada }; 101cea59bd0SMasahiro Yamada 102cea59bd0SMasahiro Yamada cpu3: cpu@101 { 103cea59bd0SMasahiro Yamada device_type = "cpu"; 104cea59bd0SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 105cea59bd0SMasahiro Yamada reg = <0 0x101>; 106cea59bd0SMasahiro Yamada enable-method = "spin-table"; 107cea59bd0SMasahiro Yamada cpu-release-addr = <0 0x80000000>; 108cea59bd0SMasahiro Yamada }; 109cea59bd0SMasahiro Yamada }; 110cea59bd0SMasahiro Yamada 111cea59bd0SMasahiro Yamada clocks { 112cea59bd0SMasahiro Yamada refclk: ref { 113cea59bd0SMasahiro Yamada compatible = "fixed-clock"; 114cea59bd0SMasahiro Yamada #clock-cells = <0>; 115cea59bd0SMasahiro Yamada clock-frequency = <25000000>; 116cea59bd0SMasahiro Yamada }; 117cea59bd0SMasahiro Yamada 118cea59bd0SMasahiro Yamada uart_clk: uart_clk { 119cea59bd0SMasahiro Yamada #clock-cells = <0>; 120cea59bd0SMasahiro Yamada compatible = "fixed-clock"; 121cea59bd0SMasahiro Yamada clock-frequency = <58820000>; 122cea59bd0SMasahiro Yamada }; 123cea59bd0SMasahiro Yamada 124cea59bd0SMasahiro Yamada i2c_clk: i2c_clk { 125cea59bd0SMasahiro Yamada #clock-cells = <0>; 126cea59bd0SMasahiro Yamada compatible = "fixed-clock"; 127cea59bd0SMasahiro Yamada clock-frequency = <50000000>; 128cea59bd0SMasahiro Yamada }; 129cea59bd0SMasahiro Yamada }; 130cea59bd0SMasahiro Yamada 131cea59bd0SMasahiro Yamada timer { 132cea59bd0SMasahiro Yamada compatible = "arm,armv8-timer"; 133cea59bd0SMasahiro Yamada interrupts = <1 13 0xf01>, 134cea59bd0SMasahiro Yamada <1 14 0xf01>, 135cea59bd0SMasahiro Yamada <1 11 0xf01>, 136cea59bd0SMasahiro Yamada <1 10 0xf01>; 137cea59bd0SMasahiro Yamada }; 138cea59bd0SMasahiro Yamada 139cea59bd0SMasahiro Yamada soc { 140cea59bd0SMasahiro Yamada compatible = "simple-bus"; 141cea59bd0SMasahiro Yamada #address-cells = <1>; 142cea59bd0SMasahiro Yamada #size-cells = <1>; 143cea59bd0SMasahiro Yamada ranges = <0 0 0 0xffffffff>; 144cea59bd0SMasahiro Yamada 145cea59bd0SMasahiro Yamada serial0: serial@54006800 { 146cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 147cea59bd0SMasahiro Yamada status = "disabled"; 148cea59bd0SMasahiro Yamada reg = <0x54006800 0x40>; 149cea59bd0SMasahiro Yamada interrupts = <0 33 4>; 150cea59bd0SMasahiro Yamada pinctrl-names = "default"; 151cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 152cea59bd0SMasahiro Yamada clocks = <&uart_clk>; 153cea59bd0SMasahiro Yamada }; 154cea59bd0SMasahiro Yamada 155cea59bd0SMasahiro Yamada serial1: serial@54006900 { 156cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 157cea59bd0SMasahiro Yamada status = "disabled"; 158cea59bd0SMasahiro Yamada reg = <0x54006900 0x40>; 159cea59bd0SMasahiro Yamada interrupts = <0 35 4>; 160cea59bd0SMasahiro Yamada pinctrl-names = "default"; 161cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 162cea59bd0SMasahiro Yamada clocks = <&uart_clk>; 163cea59bd0SMasahiro Yamada }; 164cea59bd0SMasahiro Yamada 165cea59bd0SMasahiro Yamada serial2: serial@54006a00 { 166cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 167cea59bd0SMasahiro Yamada status = "disabled"; 168cea59bd0SMasahiro Yamada reg = <0x54006a00 0x40>; 169cea59bd0SMasahiro Yamada interrupts = <0 37 4>; 170cea59bd0SMasahiro Yamada pinctrl-names = "default"; 171cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 172cea59bd0SMasahiro Yamada clocks = <&uart_clk>; 173cea59bd0SMasahiro Yamada }; 174cea59bd0SMasahiro Yamada 175cea59bd0SMasahiro Yamada serial3: serial@54006b00 { 176cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 177cea59bd0SMasahiro Yamada status = "disabled"; 178cea59bd0SMasahiro Yamada reg = <0x54006b00 0x40>; 179cea59bd0SMasahiro Yamada interrupts = <0 177 4>; 180cea59bd0SMasahiro Yamada pinctrl-names = "default"; 181cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 182cea59bd0SMasahiro Yamada clocks = <&uart_clk>; 183cea59bd0SMasahiro Yamada }; 184cea59bd0SMasahiro Yamada 185cea59bd0SMasahiro Yamada i2c0: i2c@58780000 { 186cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 187cea59bd0SMasahiro Yamada status = "disabled"; 188cea59bd0SMasahiro Yamada reg = <0x58780000 0x80>; 189cea59bd0SMasahiro Yamada #address-cells = <1>; 190cea59bd0SMasahiro Yamada #size-cells = <0>; 191cea59bd0SMasahiro Yamada interrupts = <0 41 4>; 192cea59bd0SMasahiro Yamada pinctrl-names = "default"; 193cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 194cea59bd0SMasahiro Yamada clocks = <&i2c_clk>; 195cea59bd0SMasahiro Yamada clock-frequency = <100000>; 196cea59bd0SMasahiro Yamada }; 197cea59bd0SMasahiro Yamada 198cea59bd0SMasahiro Yamada i2c1: i2c@58781000 { 199cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 200cea59bd0SMasahiro Yamada status = "disabled"; 201cea59bd0SMasahiro Yamada reg = <0x58781000 0x80>; 202cea59bd0SMasahiro Yamada #address-cells = <1>; 203cea59bd0SMasahiro Yamada #size-cells = <0>; 204cea59bd0SMasahiro Yamada interrupts = <0 42 4>; 205cea59bd0SMasahiro Yamada pinctrl-names = "default"; 206cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 207cea59bd0SMasahiro Yamada clocks = <&i2c_clk>; 208cea59bd0SMasahiro Yamada clock-frequency = <100000>; 209cea59bd0SMasahiro Yamada }; 210cea59bd0SMasahiro Yamada 211cea59bd0SMasahiro Yamada i2c2: i2c@58782000 { 212cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 213cea59bd0SMasahiro Yamada reg = <0x58782000 0x80>; 214cea59bd0SMasahiro Yamada #address-cells = <1>; 215cea59bd0SMasahiro Yamada #size-cells = <0>; 216cea59bd0SMasahiro Yamada interrupts = <0 43 4>; 217cea59bd0SMasahiro Yamada clocks = <&i2c_clk>; 218cea59bd0SMasahiro Yamada clock-frequency = <400000>; 219cea59bd0SMasahiro Yamada }; 220cea59bd0SMasahiro Yamada 221cea59bd0SMasahiro Yamada i2c3: i2c@58783000 { 222cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 223cea59bd0SMasahiro Yamada status = "disabled"; 224cea59bd0SMasahiro Yamada reg = <0x58783000 0x80>; 225cea59bd0SMasahiro Yamada #address-cells = <1>; 226cea59bd0SMasahiro Yamada #size-cells = <0>; 227cea59bd0SMasahiro Yamada interrupts = <0 44 4>; 228cea59bd0SMasahiro Yamada pinctrl-names = "default"; 229cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 230cea59bd0SMasahiro Yamada clocks = <&i2c_clk>; 231cea59bd0SMasahiro Yamada clock-frequency = <100000>; 232cea59bd0SMasahiro Yamada }; 233cea59bd0SMasahiro Yamada 234cea59bd0SMasahiro Yamada i2c4: i2c@58784000 { 235cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 236cea59bd0SMasahiro Yamada status = "disabled"; 237cea59bd0SMasahiro Yamada reg = <0x58784000 0x80>; 238cea59bd0SMasahiro Yamada #address-cells = <1>; 239cea59bd0SMasahiro Yamada #size-cells = <0>; 240cea59bd0SMasahiro Yamada interrupts = <0 45 4>; 241cea59bd0SMasahiro Yamada pinctrl-names = "default"; 242cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c4>; 243cea59bd0SMasahiro Yamada clocks = <&i2c_clk>; 244cea59bd0SMasahiro Yamada clock-frequency = <100000>; 245cea59bd0SMasahiro Yamada }; 246cea59bd0SMasahiro Yamada 247cea59bd0SMasahiro Yamada i2c5: i2c@58785000 { 248cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 249cea59bd0SMasahiro Yamada reg = <0x58785000 0x80>; 250cea59bd0SMasahiro Yamada #address-cells = <1>; 251cea59bd0SMasahiro Yamada #size-cells = <0>; 252cea59bd0SMasahiro Yamada interrupts = <0 25 4>; 253cea59bd0SMasahiro Yamada clocks = <&i2c_clk>; 254cea59bd0SMasahiro Yamada clock-frequency = <400000>; 255cea59bd0SMasahiro Yamada }; 256cea59bd0SMasahiro Yamada 257cea59bd0SMasahiro Yamada system_bus: system-bus@58c00000 { 258cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 259cea59bd0SMasahiro Yamada status = "disabled"; 260cea59bd0SMasahiro Yamada reg = <0x58c00000 0x400>; 261cea59bd0SMasahiro Yamada #address-cells = <2>; 262cea59bd0SMasahiro Yamada #size-cells = <1>; 263cea59bd0SMasahiro Yamada }; 264cea59bd0SMasahiro Yamada 265cea59bd0SMasahiro Yamada smpctrl@59800000 { 266cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 267cea59bd0SMasahiro Yamada reg = <0x59801000 0x400>; 268cea59bd0SMasahiro Yamada }; 269cea59bd0SMasahiro Yamada 270cea59bd0SMasahiro Yamada soc-glue@5f800000 { 271cea59bd0SMasahiro Yamada compatible = "simple-mfd", "syscon"; 272cea59bd0SMasahiro Yamada reg = <0x5f800000 0x2000>; 273cea59bd0SMasahiro Yamada 274cea59bd0SMasahiro Yamada pinctrl: pinctrl { 275cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20-pinctrl"; 276cea59bd0SMasahiro Yamada }; 277cea59bd0SMasahiro Yamada }; 278cea59bd0SMasahiro Yamada 279cea59bd0SMasahiro Yamada gic: interrupt-controller@5fe00000 { 280cea59bd0SMasahiro Yamada compatible = "arm,gic-v3"; 281cea59bd0SMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 282cea59bd0SMasahiro Yamada <0x5fe80000 0x80000>; /* GICR */ 283cea59bd0SMasahiro Yamada interrupt-controller; 284cea59bd0SMasahiro Yamada #interrupt-cells = <3>; 285cea59bd0SMasahiro Yamada interrupts = <1 9 4>; 286cea59bd0SMasahiro Yamada }; 287cea59bd0SMasahiro Yamada }; 288cea59bd0SMasahiro Yamada}; 289cea59bd0SMasahiro Yamada 290cea59bd0SMasahiro Yamada/include/ "uniphier-pinctrl.dtsi" 291