105f7e3d1SMasahiro Yamada// SPDX-License-Identifier: GPL-2.0+ OR MIT 205f7e3d1SMasahiro Yamada// 305f7e3d1SMasahiro Yamada// Device Tree Source for UniPhier LD20 SoC 405f7e3d1SMasahiro Yamada// 505f7e3d1SMasahiro Yamada// Copyright (C) 2015-2016 Socionext Inc. 605f7e3d1SMasahiro Yamada// Author: Masahiro Yamada <yamada.masahiro@socionext.com> 7cea59bd0SMasahiro Yamada 8b6e5ec20SMasahiro Yamada#include <dt-bindings/gpio/gpio.h> 98311ca57SMasahiro Yamada#include <dt-bindings/gpio/uniphier-gpio.h> 10dba74980SKunihiko Hayashi#include <dt-bindings/thermal/thermal.h> 11dba74980SKunihiko Hayashi 1279d4be39SMasahiro Yamada/memreserve/ 0x80000000 0x02000000; 13cea59bd0SMasahiro Yamada 14cea59bd0SMasahiro Yamada/ { 15cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20"; 16cea59bd0SMasahiro Yamada #address-cells = <2>; 17cea59bd0SMasahiro Yamada #size-cells = <2>; 18cea59bd0SMasahiro Yamada interrupt-parent = <&gic>; 19cea59bd0SMasahiro Yamada 20cea59bd0SMasahiro Yamada cpus { 21cea59bd0SMasahiro Yamada #address-cells = <2>; 22cea59bd0SMasahiro Yamada #size-cells = <0>; 23cea59bd0SMasahiro Yamada 24cea59bd0SMasahiro Yamada cpu-map { 25cea59bd0SMasahiro Yamada cluster0 { 26cea59bd0SMasahiro Yamada core0 { 27cea59bd0SMasahiro Yamada cpu = <&cpu0>; 28cea59bd0SMasahiro Yamada }; 29cea59bd0SMasahiro Yamada core1 { 30cea59bd0SMasahiro Yamada cpu = <&cpu1>; 31cea59bd0SMasahiro Yamada }; 32cea59bd0SMasahiro Yamada }; 33cea59bd0SMasahiro Yamada 34cea59bd0SMasahiro Yamada cluster1 { 35cea59bd0SMasahiro Yamada core0 { 36cea59bd0SMasahiro Yamada cpu = <&cpu2>; 37cea59bd0SMasahiro Yamada }; 38cea59bd0SMasahiro Yamada core1 { 39cea59bd0SMasahiro Yamada cpu = <&cpu3>; 40cea59bd0SMasahiro Yamada }; 41cea59bd0SMasahiro Yamada }; 42cea59bd0SMasahiro Yamada }; 43cea59bd0SMasahiro Yamada 44cea59bd0SMasahiro Yamada cpu0: cpu@0 { 45cea59bd0SMasahiro Yamada device_type = "cpu"; 46cea59bd0SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 47cea59bd0SMasahiro Yamada reg = <0 0x000>; 48183ad366SMasahiro Yamada clocks = <&sys_clk 32>; 492f81137fSMasahiro Yamada enable-method = "psci"; 50183ad366SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 51dba74980SKunihiko Hayashi #cooling-cells = <2>; 52cea59bd0SMasahiro Yamada }; 53cea59bd0SMasahiro Yamada 54cea59bd0SMasahiro Yamada cpu1: cpu@1 { 55cea59bd0SMasahiro Yamada device_type = "cpu"; 56cea59bd0SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 57cea59bd0SMasahiro Yamada reg = <0 0x001>; 58183ad366SMasahiro Yamada clocks = <&sys_clk 32>; 592f81137fSMasahiro Yamada enable-method = "psci"; 60183ad366SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 61af0e09d0SViresh Kumar #cooling-cells = <2>; 62cea59bd0SMasahiro Yamada }; 63cea59bd0SMasahiro Yamada 64cea59bd0SMasahiro Yamada cpu2: cpu@100 { 65cea59bd0SMasahiro Yamada device_type = "cpu"; 66cea59bd0SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 67cea59bd0SMasahiro Yamada reg = <0 0x100>; 68183ad366SMasahiro Yamada clocks = <&sys_clk 33>; 692f81137fSMasahiro Yamada enable-method = "psci"; 70183ad366SMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 71dba74980SKunihiko Hayashi #cooling-cells = <2>; 72cea59bd0SMasahiro Yamada }; 73cea59bd0SMasahiro Yamada 74cea59bd0SMasahiro Yamada cpu3: cpu@101 { 75cea59bd0SMasahiro Yamada device_type = "cpu"; 76cea59bd0SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 77cea59bd0SMasahiro Yamada reg = <0 0x101>; 78183ad366SMasahiro Yamada clocks = <&sys_clk 33>; 792f81137fSMasahiro Yamada enable-method = "psci"; 80183ad366SMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 81af0e09d0SViresh Kumar #cooling-cells = <2>; 82183ad366SMasahiro Yamada }; 83183ad366SMasahiro Yamada }; 84183ad366SMasahiro Yamada 859cd7d03fSMasahiro Yamada cluster0_opp: opp-table0 { 86183ad366SMasahiro Yamada compatible = "operating-points-v2"; 87183ad366SMasahiro Yamada opp-shared; 88183ad366SMasahiro Yamada 893fc9a121SViresh Kumar opp-250000000 { 90183ad366SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 91183ad366SMasahiro Yamada clock-latency-ns = <300>; 92183ad366SMasahiro Yamada }; 933fc9a121SViresh Kumar opp-275000000 { 94183ad366SMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 95183ad366SMasahiro Yamada clock-latency-ns = <300>; 96183ad366SMasahiro Yamada }; 973fc9a121SViresh Kumar opp-500000000 { 98183ad366SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 99183ad366SMasahiro Yamada clock-latency-ns = <300>; 100183ad366SMasahiro Yamada }; 1013fc9a121SViresh Kumar opp-550000000 { 102183ad366SMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 103183ad366SMasahiro Yamada clock-latency-ns = <300>; 104183ad366SMasahiro Yamada }; 1053fc9a121SViresh Kumar opp-666667000 { 106183ad366SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 107183ad366SMasahiro Yamada clock-latency-ns = <300>; 108183ad366SMasahiro Yamada }; 1093fc9a121SViresh Kumar opp-733334000 { 110183ad366SMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 111183ad366SMasahiro Yamada clock-latency-ns = <300>; 112183ad366SMasahiro Yamada }; 1133fc9a121SViresh Kumar opp-1000000000 { 114183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 115183ad366SMasahiro Yamada clock-latency-ns = <300>; 116183ad366SMasahiro Yamada }; 1173fc9a121SViresh Kumar opp-1100000000 { 118183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 119183ad366SMasahiro Yamada clock-latency-ns = <300>; 120183ad366SMasahiro Yamada }; 121183ad366SMasahiro Yamada }; 122183ad366SMasahiro Yamada 1239cd7d03fSMasahiro Yamada cluster1_opp: opp-table1 { 124183ad366SMasahiro Yamada compatible = "operating-points-v2"; 125183ad366SMasahiro Yamada opp-shared; 126183ad366SMasahiro Yamada 1273fc9a121SViresh Kumar opp-250000000 { 128183ad366SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 129183ad366SMasahiro Yamada clock-latency-ns = <300>; 130183ad366SMasahiro Yamada }; 1313fc9a121SViresh Kumar opp-275000000 { 132183ad366SMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 133183ad366SMasahiro Yamada clock-latency-ns = <300>; 134183ad366SMasahiro Yamada }; 1353fc9a121SViresh Kumar opp-500000000 { 136183ad366SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 137183ad366SMasahiro Yamada clock-latency-ns = <300>; 138183ad366SMasahiro Yamada }; 1393fc9a121SViresh Kumar opp-550000000 { 140183ad366SMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 141183ad366SMasahiro Yamada clock-latency-ns = <300>; 142183ad366SMasahiro Yamada }; 1433fc9a121SViresh Kumar opp-666667000 { 144183ad366SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 145183ad366SMasahiro Yamada clock-latency-ns = <300>; 146183ad366SMasahiro Yamada }; 1473fc9a121SViresh Kumar opp-733334000 { 148183ad366SMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 149183ad366SMasahiro Yamada clock-latency-ns = <300>; 150183ad366SMasahiro Yamada }; 1513fc9a121SViresh Kumar opp-1000000000 { 152183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 153183ad366SMasahiro Yamada clock-latency-ns = <300>; 154183ad366SMasahiro Yamada }; 1553fc9a121SViresh Kumar opp-1100000000 { 156183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 157183ad366SMasahiro Yamada clock-latency-ns = <300>; 158cea59bd0SMasahiro Yamada }; 159cea59bd0SMasahiro Yamada }; 160cea59bd0SMasahiro Yamada 1612f81137fSMasahiro Yamada psci { 1622f81137fSMasahiro Yamada compatible = "arm,psci-1.0"; 1632f81137fSMasahiro Yamada method = "smc"; 1642f81137fSMasahiro Yamada }; 1652f81137fSMasahiro Yamada 166cea59bd0SMasahiro Yamada clocks { 167cea59bd0SMasahiro Yamada refclk: ref { 168cea59bd0SMasahiro Yamada compatible = "fixed-clock"; 169cea59bd0SMasahiro Yamada #clock-cells = <0>; 170cea59bd0SMasahiro Yamada clock-frequency = <25000000>; 171cea59bd0SMasahiro Yamada }; 172cea59bd0SMasahiro Yamada }; 173cea59bd0SMasahiro Yamada 174b6e5ec20SMasahiro Yamada emmc_pwrseq: emmc-pwrseq { 175b6e5ec20SMasahiro Yamada compatible = "mmc-pwrseq-emmc"; 1768311ca57SMasahiro Yamada reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>; 177b6e5ec20SMasahiro Yamada }; 178b6e5ec20SMasahiro Yamada 179cea59bd0SMasahiro Yamada timer { 180cea59bd0SMasahiro Yamada compatible = "arm,armv8-timer"; 18137179033SArnd Bergmann interrupts = <1 13 4>, 18237179033SArnd Bergmann <1 14 4>, 18337179033SArnd Bergmann <1 11 4>, 18437179033SArnd Bergmann <1 10 4>; 185cea59bd0SMasahiro Yamada }; 186cea59bd0SMasahiro Yamada 187dba74980SKunihiko Hayashi thermal-zones { 188dba74980SKunihiko Hayashi cpu-thermal { 189dba74980SKunihiko Hayashi polling-delay-passive = <250>; /* 250ms */ 190dba74980SKunihiko Hayashi polling-delay = <1000>; /* 1000ms */ 191dba74980SKunihiko Hayashi thermal-sensors = <&pvtctl>; 192dba74980SKunihiko Hayashi 193dba74980SKunihiko Hayashi trips { 194dba74980SKunihiko Hayashi cpu_crit: cpu-crit { 195dba74980SKunihiko Hayashi temperature = <110000>; /* 110C */ 196dba74980SKunihiko Hayashi hysteresis = <2000>; 197dba74980SKunihiko Hayashi type = "critical"; 198dba74980SKunihiko Hayashi }; 199dba74980SKunihiko Hayashi cpu_alert: cpu-alert { 200dba74980SKunihiko Hayashi temperature = <100000>; /* 100C */ 201dba74980SKunihiko Hayashi hysteresis = <2000>; 202dba74980SKunihiko Hayashi type = "passive"; 203dba74980SKunihiko Hayashi }; 204dba74980SKunihiko Hayashi }; 205dba74980SKunihiko Hayashi 206dba74980SKunihiko Hayashi cooling-maps { 207dba74980SKunihiko Hayashi map0 { 208dba74980SKunihiko Hayashi trip = <&cpu_alert>; 209dba74980SKunihiko Hayashi cooling-device = <&cpu0 210dba74980SKunihiko Hayashi THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 211dba74980SKunihiko Hayashi }; 212dba74980SKunihiko Hayashi map1 { 213dba74980SKunihiko Hayashi trip = <&cpu_alert>; 214dba74980SKunihiko Hayashi cooling-device = <&cpu2 215dba74980SKunihiko Hayashi THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 216dba74980SKunihiko Hayashi }; 217dba74980SKunihiko Hayashi }; 218dba74980SKunihiko Hayashi }; 219dba74980SKunihiko Hayashi }; 220dba74980SKunihiko Hayashi 221b5027603SMasahiro Yamada soc@0 { 222cea59bd0SMasahiro Yamada compatible = "simple-bus"; 223cea59bd0SMasahiro Yamada #address-cells = <1>; 224cea59bd0SMasahiro Yamada #size-cells = <1>; 225cea59bd0SMasahiro Yamada ranges = <0 0 0 0xffffffff>; 226cea59bd0SMasahiro Yamada 227cea59bd0SMasahiro Yamada serial0: serial@54006800 { 228cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 229cea59bd0SMasahiro Yamada status = "disabled"; 230cea59bd0SMasahiro Yamada reg = <0x54006800 0x40>; 231cea59bd0SMasahiro Yamada interrupts = <0 33 4>; 232cea59bd0SMasahiro Yamada pinctrl-names = "default"; 233cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 23442aee275SMasahiro Yamada clocks = <&peri_clk 0>; 23576c48e1eSMasahiro Yamada resets = <&peri_rst 0>; 236cea59bd0SMasahiro Yamada }; 237cea59bd0SMasahiro Yamada 238cea59bd0SMasahiro Yamada serial1: serial@54006900 { 239cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 240cea59bd0SMasahiro Yamada status = "disabled"; 241cea59bd0SMasahiro Yamada reg = <0x54006900 0x40>; 242cea59bd0SMasahiro Yamada interrupts = <0 35 4>; 243cea59bd0SMasahiro Yamada pinctrl-names = "default"; 244cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 24542aee275SMasahiro Yamada clocks = <&peri_clk 1>; 24676c48e1eSMasahiro Yamada resets = <&peri_rst 1>; 247cea59bd0SMasahiro Yamada }; 248cea59bd0SMasahiro Yamada 249cea59bd0SMasahiro Yamada serial2: serial@54006a00 { 250cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 251cea59bd0SMasahiro Yamada status = "disabled"; 252cea59bd0SMasahiro Yamada reg = <0x54006a00 0x40>; 253cea59bd0SMasahiro Yamada interrupts = <0 37 4>; 254cea59bd0SMasahiro Yamada pinctrl-names = "default"; 255cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 25642aee275SMasahiro Yamada clocks = <&peri_clk 2>; 25776c48e1eSMasahiro Yamada resets = <&peri_rst 2>; 258cea59bd0SMasahiro Yamada }; 259cea59bd0SMasahiro Yamada 260cea59bd0SMasahiro Yamada serial3: serial@54006b00 { 261cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 262cea59bd0SMasahiro Yamada status = "disabled"; 263cea59bd0SMasahiro Yamada reg = <0x54006b00 0x40>; 264cea59bd0SMasahiro Yamada interrupts = <0 177 4>; 265cea59bd0SMasahiro Yamada pinctrl-names = "default"; 266cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 26742aee275SMasahiro Yamada clocks = <&peri_clk 3>; 26876c48e1eSMasahiro Yamada resets = <&peri_rst 3>; 269cea59bd0SMasahiro Yamada }; 270cea59bd0SMasahiro Yamada 271277b51e7SMasahiro Yamada gpio: gpio@55000000 { 272277b51e7SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 273277b51e7SMasahiro Yamada reg = <0x55000000 0x200>; 274277b51e7SMasahiro Yamada interrupt-parent = <&aidet>; 275277b51e7SMasahiro Yamada interrupt-controller; 276277b51e7SMasahiro Yamada #interrupt-cells = <2>; 277277b51e7SMasahiro Yamada gpio-controller; 278277b51e7SMasahiro Yamada #gpio-cells = <2>; 279277b51e7SMasahiro Yamada gpio-ranges = <&pinctrl 0 0 0>, 280277b51e7SMasahiro Yamada <&pinctrl 96 0 0>, 281277b51e7SMasahiro Yamada <&pinctrl 160 0 0>; 282277b51e7SMasahiro Yamada gpio-ranges-group-names = "gpio_range0", 283277b51e7SMasahiro Yamada "gpio_range1", 284277b51e7SMasahiro Yamada "gpio_range2"; 285277b51e7SMasahiro Yamada ngpios = <205>; 286277b51e7SMasahiro Yamada socionext,interrupt-ranges = <0 48 16>, <16 154 5>, 287277b51e7SMasahiro Yamada <21 217 3>; 288277b51e7SMasahiro Yamada }; 289277b51e7SMasahiro Yamada 290fb21a0acSKatsuhiro Suzuki audio@56000000 { 291fb21a0acSKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-aio"; 292fb21a0acSKatsuhiro Suzuki reg = <0x56000000 0x80000>; 293fb21a0acSKatsuhiro Suzuki interrupts = <0 144 4>; 294fb21a0acSKatsuhiro Suzuki pinctrl-names = "default"; 295fb21a0acSKatsuhiro Suzuki pinctrl-0 = <&pinctrl_aout1>, 296fb21a0acSKatsuhiro Suzuki <&pinctrl_aoutiec1>; 297fb21a0acSKatsuhiro Suzuki clock-names = "aio"; 298fb21a0acSKatsuhiro Suzuki clocks = <&sys_clk 40>; 299fb21a0acSKatsuhiro Suzuki reset-names = "aio"; 300fb21a0acSKatsuhiro Suzuki resets = <&sys_rst 40>; 301fb21a0acSKatsuhiro Suzuki #sound-dai-cells = <1>; 3026c35921dSKatsuhiro Suzuki socionext,syscon = <&soc_glue>; 303fb21a0acSKatsuhiro Suzuki 304fb21a0acSKatsuhiro Suzuki i2s_port0: port@0 { 305fb21a0acSKatsuhiro Suzuki i2s_hdmi: endpoint { 306fb21a0acSKatsuhiro Suzuki }; 307fb21a0acSKatsuhiro Suzuki }; 308fb21a0acSKatsuhiro Suzuki 309fb21a0acSKatsuhiro Suzuki i2s_port1: port@1 { 310fb21a0acSKatsuhiro Suzuki i2s_pcmin2: endpoint { 311fb21a0acSKatsuhiro Suzuki }; 312fb21a0acSKatsuhiro Suzuki }; 313fb21a0acSKatsuhiro Suzuki 314fb21a0acSKatsuhiro Suzuki i2s_port2: port@2 { 315fb21a0acSKatsuhiro Suzuki i2s_line: endpoint { 316fb21a0acSKatsuhiro Suzuki dai-format = "i2s"; 317fb21a0acSKatsuhiro Suzuki remote-endpoint = <&evea_line>; 318fb21a0acSKatsuhiro Suzuki }; 319fb21a0acSKatsuhiro Suzuki }; 320fb21a0acSKatsuhiro Suzuki 321fb21a0acSKatsuhiro Suzuki i2s_port3: port@3 { 322fb21a0acSKatsuhiro Suzuki i2s_hpcmout1: endpoint { 323fb21a0acSKatsuhiro Suzuki }; 324fb21a0acSKatsuhiro Suzuki }; 325fb21a0acSKatsuhiro Suzuki 326fb21a0acSKatsuhiro Suzuki i2s_port4: port@4 { 327fb21a0acSKatsuhiro Suzuki i2s_hp: endpoint { 328fb21a0acSKatsuhiro Suzuki dai-format = "i2s"; 329fb21a0acSKatsuhiro Suzuki remote-endpoint = <&evea_hp>; 330fb21a0acSKatsuhiro Suzuki }; 331fb21a0acSKatsuhiro Suzuki }; 332fb21a0acSKatsuhiro Suzuki 333fb21a0acSKatsuhiro Suzuki spdif_port0: port@5 { 334fb21a0acSKatsuhiro Suzuki spdif_hiecout1: endpoint { 335fb21a0acSKatsuhiro Suzuki }; 336fb21a0acSKatsuhiro Suzuki }; 337fb21a0acSKatsuhiro Suzuki 338fb21a0acSKatsuhiro Suzuki src_port0: port@6 { 339fb21a0acSKatsuhiro Suzuki i2s_epcmout2: endpoint { 340fb21a0acSKatsuhiro Suzuki }; 341fb21a0acSKatsuhiro Suzuki }; 342fb21a0acSKatsuhiro Suzuki 343fb21a0acSKatsuhiro Suzuki src_port1: port@7 { 344fb21a0acSKatsuhiro Suzuki i2s_epcmout3: endpoint { 345fb21a0acSKatsuhiro Suzuki }; 346fb21a0acSKatsuhiro Suzuki }; 347fb21a0acSKatsuhiro Suzuki 348fb21a0acSKatsuhiro Suzuki comp_spdif_port0: port@8 { 349fb21a0acSKatsuhiro Suzuki comp_spdif_hiecout1: endpoint { 350fb21a0acSKatsuhiro Suzuki }; 351fb21a0acSKatsuhiro Suzuki }; 352fb21a0acSKatsuhiro Suzuki }; 353fb21a0acSKatsuhiro Suzuki 354fb21a0acSKatsuhiro Suzuki codec@57900000 { 355fb21a0acSKatsuhiro Suzuki compatible = "socionext,uniphier-evea"; 356fb21a0acSKatsuhiro Suzuki reg = <0x57900000 0x1000>; 357fb21a0acSKatsuhiro Suzuki clock-names = "evea", "exiv"; 358fb21a0acSKatsuhiro Suzuki clocks = <&sys_clk 41>, <&sys_clk 42>; 359fb21a0acSKatsuhiro Suzuki reset-names = "evea", "exiv", "adamv"; 360fb21a0acSKatsuhiro Suzuki resets = <&sys_rst 41>, <&sys_rst 42>, <&adamv_rst 0>; 361fb21a0acSKatsuhiro Suzuki #sound-dai-cells = <1>; 362fb21a0acSKatsuhiro Suzuki 363fb21a0acSKatsuhiro Suzuki port@0 { 364fb21a0acSKatsuhiro Suzuki evea_line: endpoint { 365fb21a0acSKatsuhiro Suzuki remote-endpoint = <&i2s_line>; 366fb21a0acSKatsuhiro Suzuki }; 367fb21a0acSKatsuhiro Suzuki }; 368fb21a0acSKatsuhiro Suzuki 369fb21a0acSKatsuhiro Suzuki port@1 { 370fb21a0acSKatsuhiro Suzuki evea_hp: endpoint { 371fb21a0acSKatsuhiro Suzuki remote-endpoint = <&i2s_hp>; 372fb21a0acSKatsuhiro Suzuki }; 373fb21a0acSKatsuhiro Suzuki }; 374fb21a0acSKatsuhiro Suzuki }; 375fb21a0acSKatsuhiro Suzuki 376178b3568SKatsuhiro Suzuki adamv@57920000 { 377178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-adamv", 378178b3568SKatsuhiro Suzuki "simple-mfd", "syscon"; 379178b3568SKatsuhiro Suzuki reg = <0x57920000 0x1000>; 380178b3568SKatsuhiro Suzuki 381178b3568SKatsuhiro Suzuki adamv_rst: reset { 382178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-adamv-reset"; 383178b3568SKatsuhiro Suzuki #reset-cells = <1>; 384178b3568SKatsuhiro Suzuki }; 385178b3568SKatsuhiro Suzuki }; 386178b3568SKatsuhiro Suzuki 387cea59bd0SMasahiro Yamada i2c0: i2c@58780000 { 388cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 389cea59bd0SMasahiro Yamada status = "disabled"; 390cea59bd0SMasahiro Yamada reg = <0x58780000 0x80>; 391cea59bd0SMasahiro Yamada #address-cells = <1>; 392cea59bd0SMasahiro Yamada #size-cells = <0>; 393cea59bd0SMasahiro Yamada interrupts = <0 41 4>; 394cea59bd0SMasahiro Yamada pinctrl-names = "default"; 395cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 39642aee275SMasahiro Yamada clocks = <&peri_clk 4>; 39776c48e1eSMasahiro Yamada resets = <&peri_rst 4>; 398cea59bd0SMasahiro Yamada clock-frequency = <100000>; 399cea59bd0SMasahiro Yamada }; 400cea59bd0SMasahiro Yamada 401cea59bd0SMasahiro Yamada i2c1: i2c@58781000 { 402cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 403cea59bd0SMasahiro Yamada status = "disabled"; 404cea59bd0SMasahiro Yamada reg = <0x58781000 0x80>; 405cea59bd0SMasahiro Yamada #address-cells = <1>; 406cea59bd0SMasahiro Yamada #size-cells = <0>; 407cea59bd0SMasahiro Yamada interrupts = <0 42 4>; 408cea59bd0SMasahiro Yamada pinctrl-names = "default"; 409cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 41042aee275SMasahiro Yamada clocks = <&peri_clk 5>; 41176c48e1eSMasahiro Yamada resets = <&peri_rst 5>; 412cea59bd0SMasahiro Yamada clock-frequency = <100000>; 413cea59bd0SMasahiro Yamada }; 414cea59bd0SMasahiro Yamada 415cea59bd0SMasahiro Yamada i2c2: i2c@58782000 { 416cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 417cea59bd0SMasahiro Yamada reg = <0x58782000 0x80>; 418cea59bd0SMasahiro Yamada #address-cells = <1>; 419cea59bd0SMasahiro Yamada #size-cells = <0>; 420cea59bd0SMasahiro Yamada interrupts = <0 43 4>; 42142aee275SMasahiro Yamada clocks = <&peri_clk 6>; 42276c48e1eSMasahiro Yamada resets = <&peri_rst 6>; 423cea59bd0SMasahiro Yamada clock-frequency = <400000>; 424cea59bd0SMasahiro Yamada }; 425cea59bd0SMasahiro Yamada 426cea59bd0SMasahiro Yamada i2c3: i2c@58783000 { 427cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 428cea59bd0SMasahiro Yamada status = "disabled"; 429cea59bd0SMasahiro Yamada reg = <0x58783000 0x80>; 430cea59bd0SMasahiro Yamada #address-cells = <1>; 431cea59bd0SMasahiro Yamada #size-cells = <0>; 432cea59bd0SMasahiro Yamada interrupts = <0 44 4>; 433cea59bd0SMasahiro Yamada pinctrl-names = "default"; 434cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 43542aee275SMasahiro Yamada clocks = <&peri_clk 7>; 43676c48e1eSMasahiro Yamada resets = <&peri_rst 7>; 437cea59bd0SMasahiro Yamada clock-frequency = <100000>; 438cea59bd0SMasahiro Yamada }; 439cea59bd0SMasahiro Yamada 440cea59bd0SMasahiro Yamada i2c4: i2c@58784000 { 441cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 442cea59bd0SMasahiro Yamada status = "disabled"; 443cea59bd0SMasahiro Yamada reg = <0x58784000 0x80>; 444cea59bd0SMasahiro Yamada #address-cells = <1>; 445cea59bd0SMasahiro Yamada #size-cells = <0>; 446cea59bd0SMasahiro Yamada interrupts = <0 45 4>; 447cea59bd0SMasahiro Yamada pinctrl-names = "default"; 448cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c4>; 44942aee275SMasahiro Yamada clocks = <&peri_clk 8>; 45076c48e1eSMasahiro Yamada resets = <&peri_rst 8>; 451cea59bd0SMasahiro Yamada clock-frequency = <100000>; 452cea59bd0SMasahiro Yamada }; 453cea59bd0SMasahiro Yamada 454cea59bd0SMasahiro Yamada i2c5: i2c@58785000 { 455cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 456cea59bd0SMasahiro Yamada reg = <0x58785000 0x80>; 457cea59bd0SMasahiro Yamada #address-cells = <1>; 458cea59bd0SMasahiro Yamada #size-cells = <0>; 459cea59bd0SMasahiro Yamada interrupts = <0 25 4>; 46042aee275SMasahiro Yamada clocks = <&peri_clk 9>; 46176c48e1eSMasahiro Yamada resets = <&peri_rst 9>; 462cea59bd0SMasahiro Yamada clock-frequency = <400000>; 463cea59bd0SMasahiro Yamada }; 464cea59bd0SMasahiro Yamada 465cea59bd0SMasahiro Yamada system_bus: system-bus@58c00000 { 466cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 467cea59bd0SMasahiro Yamada status = "disabled"; 468cea59bd0SMasahiro Yamada reg = <0x58c00000 0x400>; 469cea59bd0SMasahiro Yamada #address-cells = <2>; 470cea59bd0SMasahiro Yamada #size-cells = <1>; 4715d9a83c9SMasahiro Yamada pinctrl-names = "default"; 4725d9a83c9SMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 473cea59bd0SMasahiro Yamada }; 474cea59bd0SMasahiro Yamada 475b10ee7e3SMasahiro Yamada smpctrl@59801000 { 476cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 477cea59bd0SMasahiro Yamada reg = <0x59801000 0x400>; 478cea59bd0SMasahiro Yamada }; 479cea59bd0SMasahiro Yamada 4808e68c65dSMasahiro Yamada sdctrl@59810000 { 4818e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sdctrl", 48242aee275SMasahiro Yamada "simple-mfd", "syscon"; 483555861fbSMasahiro Yamada reg = <0x59810000 0x400>; 48442aee275SMasahiro Yamada 4858e68c65dSMasahiro Yamada sd_clk: clock { 4868e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-clock"; 48742aee275SMasahiro Yamada #clock-cells = <1>; 48842aee275SMasahiro Yamada }; 48942aee275SMasahiro Yamada 4908e68c65dSMasahiro Yamada sd_rst: reset { 4918e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-reset"; 49242aee275SMasahiro Yamada #reset-cells = <1>; 49342aee275SMasahiro Yamada }; 49442aee275SMasahiro Yamada }; 49542aee275SMasahiro Yamada 49642aee275SMasahiro Yamada perictrl@59820000 { 497fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-perictrl", 49842aee275SMasahiro Yamada "simple-mfd", "syscon"; 49942aee275SMasahiro Yamada reg = <0x59820000 0x200>; 50042aee275SMasahiro Yamada 50142aee275SMasahiro Yamada peri_clk: clock { 50242aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-clock"; 50342aee275SMasahiro Yamada #clock-cells = <1>; 50442aee275SMasahiro Yamada }; 50542aee275SMasahiro Yamada 50642aee275SMasahiro Yamada peri_rst: reset { 50742aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-reset"; 50842aee275SMasahiro Yamada #reset-cells = <1>; 50942aee275SMasahiro Yamada }; 51042aee275SMasahiro Yamada }; 51142aee275SMasahiro Yamada 5123a93cc26SMasahiro Yamada emmc: sdhc@5a000000 { 5133a93cc26SMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 5143a93cc26SMasahiro Yamada reg = <0x5a000000 0x400>; 5153a93cc26SMasahiro Yamada interrupts = <0 78 4>; 5169c0a9700SMasahiro Yamada pinctrl-names = "default"; 5179c0a9700SMasahiro Yamada pinctrl-0 = <&pinctrl_emmc>; 5183a93cc26SMasahiro Yamada clocks = <&sys_clk 4>; 51976c48e1eSMasahiro Yamada resets = <&sys_rst 4>; 5203a93cc26SMasahiro Yamada bus-width = <8>; 5213a93cc26SMasahiro Yamada mmc-ddr-1_8v; 5223a93cc26SMasahiro Yamada mmc-hs200-1_8v; 523b6e5ec20SMasahiro Yamada mmc-pwrseq = <&emmc_pwrseq>; 524f4e5200fSMasahiro Yamada cdns,phy-input-delay-legacy = <9>; 525ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 526ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 527e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 528e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 5293a93cc26SMasahiro Yamada }; 5303a93cc26SMasahiro Yamada 5316c35921dSKatsuhiro Suzuki soc_glue: soc-glue@5f800000 { 532fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-soc-glue", 5339d4f5505SMasahiro Yamada "simple-mfd", "syscon"; 534cea59bd0SMasahiro Yamada reg = <0x5f800000 0x2000>; 535cea59bd0SMasahiro Yamada 536cea59bd0SMasahiro Yamada pinctrl: pinctrl { 537cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20-pinctrl"; 538cea59bd0SMasahiro Yamada }; 539cea59bd0SMasahiro Yamada }; 540cea59bd0SMasahiro Yamada 541f05851e1SKeiji Hayashibara soc-glue@5f900000 { 542f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-ld20-soc-glue-debug", 543f05851e1SKeiji Hayashibara "simple-mfd"; 544f05851e1SKeiji Hayashibara #address-cells = <1>; 545f05851e1SKeiji Hayashibara #size-cells = <1>; 546f05851e1SKeiji Hayashibara ranges = <0 0x5f900000 0x2000>; 547f05851e1SKeiji Hayashibara 548f05851e1SKeiji Hayashibara efuse@100 { 549f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 550f05851e1SKeiji Hayashibara reg = <0x100 0x28>; 551f05851e1SKeiji Hayashibara }; 552f05851e1SKeiji Hayashibara 553f05851e1SKeiji Hayashibara efuse@200 { 554f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 555f05851e1SKeiji Hayashibara reg = <0x200 0x68>; 556f05851e1SKeiji Hayashibara }; 557f05851e1SKeiji Hayashibara }; 558f05851e1SKeiji Hayashibara 5593dfc6e98SMasahiro Yamada aidet: aidet@5fc20000 { 5603dfc6e98SMasahiro Yamada compatible = "socionext,uniphier-ld20-aidet"; 5613dfc6e98SMasahiro Yamada reg = <0x5fc20000 0x200>; 5623dfc6e98SMasahiro Yamada interrupt-controller; 5633dfc6e98SMasahiro Yamada #interrupt-cells = <2>; 5643dfc6e98SMasahiro Yamada }; 5653dfc6e98SMasahiro Yamada 566cea59bd0SMasahiro Yamada gic: interrupt-controller@5fe00000 { 567cea59bd0SMasahiro Yamada compatible = "arm,gic-v3"; 568cea59bd0SMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 569cea59bd0SMasahiro Yamada <0x5fe80000 0x80000>; /* GICR */ 570cea59bd0SMasahiro Yamada interrupt-controller; 571cea59bd0SMasahiro Yamada #interrupt-cells = <3>; 572cea59bd0SMasahiro Yamada interrupts = <1 9 4>; 573cea59bd0SMasahiro Yamada }; 57442aee275SMasahiro Yamada 57542aee275SMasahiro Yamada sysctrl@61840000 { 576fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-sysctrl", 57742aee275SMasahiro Yamada "simple-mfd", "syscon"; 5781ef64af8SMasahiro Yamada reg = <0x61840000 0x10000>; 57942aee275SMasahiro Yamada 58042aee275SMasahiro Yamada sys_clk: clock { 58142aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-clock"; 58242aee275SMasahiro Yamada #clock-cells = <1>; 58342aee275SMasahiro Yamada }; 58442aee275SMasahiro Yamada 58542aee275SMasahiro Yamada sys_rst: reset { 58642aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-reset"; 58742aee275SMasahiro Yamada #reset-cells = <1>; 58842aee275SMasahiro Yamada }; 5894c4c960aSKeiji Hayashibara 5904c4c960aSKeiji Hayashibara watchdog { 5914c4c960aSKeiji Hayashibara compatible = "socionext,uniphier-wdt"; 5924c4c960aSKeiji Hayashibara }; 593dba74980SKunihiko Hayashi 594dba74980SKunihiko Hayashi pvtctl: pvtctl { 595dba74980SKunihiko Hayashi compatible = "socionext,uniphier-ld20-thermal"; 596dba74980SKunihiko Hayashi interrupts = <0 3 4>; 597dba74980SKunihiko Hayashi #thermal-sensor-cells = <0>; 598dba74980SKunihiko Hayashi socionext,tmod-calibration = <0x0f22 0x68ee>; 599dba74980SKunihiko Hayashi }; 60042aee275SMasahiro Yamada }; 601e5aefb38SMasahiro Yamada 602c73730eeSKunihiko Hayashi eth: ethernet@65000000 { 603c73730eeSKunihiko Hayashi compatible = "socionext,uniphier-ld20-ave4"; 604c73730eeSKunihiko Hayashi status = "disabled"; 605c73730eeSKunihiko Hayashi reg = <0x65000000 0x8500>; 606c73730eeSKunihiko Hayashi interrupts = <0 66 4>; 607c73730eeSKunihiko Hayashi pinctrl-names = "default"; 608c73730eeSKunihiko Hayashi pinctrl-0 = <&pinctrl_ether_rgmii>; 609a34a464dSKunihiko Hayashi clock-names = "ether"; 610c73730eeSKunihiko Hayashi clocks = <&sys_clk 6>; 611a34a464dSKunihiko Hayashi reset-names = "ether"; 612c73730eeSKunihiko Hayashi resets = <&sys_rst 6>; 613c73730eeSKunihiko Hayashi phy-mode = "rgmii"; 614c73730eeSKunihiko Hayashi local-mac-address = [00 00 00 00 00 00]; 615b076ff8bSKunihiko Hayashi socionext,syscon-phy-mode = <&soc_glue 0>; 616c73730eeSKunihiko Hayashi 617c73730eeSKunihiko Hayashi mdio: mdio { 618c73730eeSKunihiko Hayashi #address-cells = <1>; 619c73730eeSKunihiko Hayashi #size-cells = <0>; 620c73730eeSKunihiko Hayashi }; 621c73730eeSKunihiko Hayashi }; 622c73730eeSKunihiko Hayashi 623e5aefb38SMasahiro Yamada nand: nand@68000000 { 624e5aefb38SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 625e5aefb38SMasahiro Yamada status = "disabled"; 626e5aefb38SMasahiro Yamada reg-names = "nand_data", "denali_reg"; 627e5aefb38SMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 628e5aefb38SMasahiro Yamada interrupts = <0 65 4>; 629e5aefb38SMasahiro Yamada pinctrl-names = "default"; 630e5aefb38SMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 631e5aefb38SMasahiro Yamada clocks = <&sys_clk 2>; 63276c48e1eSMasahiro Yamada resets = <&sys_rst 2>; 633e5aefb38SMasahiro Yamada }; 634cea59bd0SMasahiro Yamada }; 635cea59bd0SMasahiro Yamada}; 636cea59bd0SMasahiro Yamada 6375740ea4eSMasahiro Yamada#include "uniphier-pinctrl.dtsi" 638fb21a0acSKatsuhiro Suzuki 639fb21a0acSKatsuhiro Suzuki&pinctrl_aout1 { 640fb21a0acSKatsuhiro Suzuki drive-strength = <4>; /* default: 3.5mA */ 641fb21a0acSKatsuhiro Suzuki 642fb21a0acSKatsuhiro Suzuki ao1dacck { 643fb21a0acSKatsuhiro Suzuki pins = "AO1DACCK"; 644fb21a0acSKatsuhiro Suzuki drive-strength = <5>; /* 5mA */ 645fb21a0acSKatsuhiro Suzuki }; 646fb21a0acSKatsuhiro Suzuki}; 647fb21a0acSKatsuhiro Suzuki 648fb21a0acSKatsuhiro Suzuki&pinctrl_aoutiec1 { 649fb21a0acSKatsuhiro Suzuki drive-strength = <4>; /* default: 3.5mA */ 650fb21a0acSKatsuhiro Suzuki 651fb21a0acSKatsuhiro Suzuki ao1arc { 652fb21a0acSKatsuhiro Suzuki pins = "AO1ARC"; 653fb21a0acSKatsuhiro Suzuki drive-strength = <11>; /* 11mA */ 654fb21a0acSKatsuhiro Suzuki }; 655fb21a0acSKatsuhiro Suzuki}; 656