105f7e3d1SMasahiro Yamada// SPDX-License-Identifier: GPL-2.0+ OR MIT 205f7e3d1SMasahiro Yamada// 305f7e3d1SMasahiro Yamada// Device Tree Source for UniPhier LD20 SoC 405f7e3d1SMasahiro Yamada// 505f7e3d1SMasahiro Yamada// Copyright (C) 2015-2016 Socionext Inc. 605f7e3d1SMasahiro Yamada// Author: Masahiro Yamada <yamada.masahiro@socionext.com> 7cea59bd0SMasahiro Yamada 8b6e5ec20SMasahiro Yamada#include <dt-bindings/gpio/gpio.h> 98311ca57SMasahiro Yamada#include <dt-bindings/gpio/uniphier-gpio.h> 10dba74980SKunihiko Hayashi#include <dt-bindings/thermal/thermal.h> 11dba74980SKunihiko Hayashi 1279d4be39SMasahiro Yamada/memreserve/ 0x80000000 0x02000000; 13cea59bd0SMasahiro Yamada 14cea59bd0SMasahiro Yamada/ { 15cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20"; 16cea59bd0SMasahiro Yamada #address-cells = <2>; 17cea59bd0SMasahiro Yamada #size-cells = <2>; 18cea59bd0SMasahiro Yamada interrupt-parent = <&gic>; 19cea59bd0SMasahiro Yamada 20cea59bd0SMasahiro Yamada cpus { 21cea59bd0SMasahiro Yamada #address-cells = <2>; 22cea59bd0SMasahiro Yamada #size-cells = <0>; 23cea59bd0SMasahiro Yamada 24cea59bd0SMasahiro Yamada cpu-map { 25cea59bd0SMasahiro Yamada cluster0 { 26cea59bd0SMasahiro Yamada core0 { 27cea59bd0SMasahiro Yamada cpu = <&cpu0>; 28cea59bd0SMasahiro Yamada }; 29cea59bd0SMasahiro Yamada core1 { 30cea59bd0SMasahiro Yamada cpu = <&cpu1>; 31cea59bd0SMasahiro Yamada }; 32cea59bd0SMasahiro Yamada }; 33cea59bd0SMasahiro Yamada 34cea59bd0SMasahiro Yamada cluster1 { 35cea59bd0SMasahiro Yamada core0 { 36cea59bd0SMasahiro Yamada cpu = <&cpu2>; 37cea59bd0SMasahiro Yamada }; 38cea59bd0SMasahiro Yamada core1 { 39cea59bd0SMasahiro Yamada cpu = <&cpu3>; 40cea59bd0SMasahiro Yamada }; 41cea59bd0SMasahiro Yamada }; 42cea59bd0SMasahiro Yamada }; 43cea59bd0SMasahiro Yamada 44cea59bd0SMasahiro Yamada cpu0: cpu@0 { 45cea59bd0SMasahiro Yamada device_type = "cpu"; 46cea59bd0SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 47cea59bd0SMasahiro Yamada reg = <0 0x000>; 48183ad366SMasahiro Yamada clocks = <&sys_clk 32>; 492f81137fSMasahiro Yamada enable-method = "psci"; 50183ad366SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 51dba74980SKunihiko Hayashi #cooling-cells = <2>; 52cea59bd0SMasahiro Yamada }; 53cea59bd0SMasahiro Yamada 54cea59bd0SMasahiro Yamada cpu1: cpu@1 { 55cea59bd0SMasahiro Yamada device_type = "cpu"; 56cea59bd0SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 57cea59bd0SMasahiro Yamada reg = <0 0x001>; 58183ad366SMasahiro Yamada clocks = <&sys_clk 32>; 592f81137fSMasahiro Yamada enable-method = "psci"; 60183ad366SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 61cea59bd0SMasahiro Yamada }; 62cea59bd0SMasahiro Yamada 63cea59bd0SMasahiro Yamada cpu2: cpu@100 { 64cea59bd0SMasahiro Yamada device_type = "cpu"; 65cea59bd0SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 66cea59bd0SMasahiro Yamada reg = <0 0x100>; 67183ad366SMasahiro Yamada clocks = <&sys_clk 33>; 682f81137fSMasahiro Yamada enable-method = "psci"; 69183ad366SMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 70dba74980SKunihiko Hayashi #cooling-cells = <2>; 71cea59bd0SMasahiro Yamada }; 72cea59bd0SMasahiro Yamada 73cea59bd0SMasahiro Yamada cpu3: cpu@101 { 74cea59bd0SMasahiro Yamada device_type = "cpu"; 75cea59bd0SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 76cea59bd0SMasahiro Yamada reg = <0 0x101>; 77183ad366SMasahiro Yamada clocks = <&sys_clk 33>; 782f81137fSMasahiro Yamada enable-method = "psci"; 79183ad366SMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 80183ad366SMasahiro Yamada }; 81183ad366SMasahiro Yamada }; 82183ad366SMasahiro Yamada 839cd7d03fSMasahiro Yamada cluster0_opp: opp-table0 { 84183ad366SMasahiro Yamada compatible = "operating-points-v2"; 85183ad366SMasahiro Yamada opp-shared; 86183ad366SMasahiro Yamada 873fc9a121SViresh Kumar opp-250000000 { 88183ad366SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 89183ad366SMasahiro Yamada clock-latency-ns = <300>; 90183ad366SMasahiro Yamada }; 913fc9a121SViresh Kumar opp-275000000 { 92183ad366SMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 93183ad366SMasahiro Yamada clock-latency-ns = <300>; 94183ad366SMasahiro Yamada }; 953fc9a121SViresh Kumar opp-500000000 { 96183ad366SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 97183ad366SMasahiro Yamada clock-latency-ns = <300>; 98183ad366SMasahiro Yamada }; 993fc9a121SViresh Kumar opp-550000000 { 100183ad366SMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 101183ad366SMasahiro Yamada clock-latency-ns = <300>; 102183ad366SMasahiro Yamada }; 1033fc9a121SViresh Kumar opp-666667000 { 104183ad366SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 105183ad366SMasahiro Yamada clock-latency-ns = <300>; 106183ad366SMasahiro Yamada }; 1073fc9a121SViresh Kumar opp-733334000 { 108183ad366SMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 109183ad366SMasahiro Yamada clock-latency-ns = <300>; 110183ad366SMasahiro Yamada }; 1113fc9a121SViresh Kumar opp-1000000000 { 112183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 113183ad366SMasahiro Yamada clock-latency-ns = <300>; 114183ad366SMasahiro Yamada }; 1153fc9a121SViresh Kumar opp-1100000000 { 116183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 117183ad366SMasahiro Yamada clock-latency-ns = <300>; 118183ad366SMasahiro Yamada }; 119183ad366SMasahiro Yamada }; 120183ad366SMasahiro Yamada 1219cd7d03fSMasahiro Yamada cluster1_opp: opp-table1 { 122183ad366SMasahiro Yamada compatible = "operating-points-v2"; 123183ad366SMasahiro Yamada opp-shared; 124183ad366SMasahiro Yamada 1253fc9a121SViresh Kumar opp-250000000 { 126183ad366SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 127183ad366SMasahiro Yamada clock-latency-ns = <300>; 128183ad366SMasahiro Yamada }; 1293fc9a121SViresh Kumar opp-275000000 { 130183ad366SMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 131183ad366SMasahiro Yamada clock-latency-ns = <300>; 132183ad366SMasahiro Yamada }; 1333fc9a121SViresh Kumar opp-500000000 { 134183ad366SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 135183ad366SMasahiro Yamada clock-latency-ns = <300>; 136183ad366SMasahiro Yamada }; 1373fc9a121SViresh Kumar opp-550000000 { 138183ad366SMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 139183ad366SMasahiro Yamada clock-latency-ns = <300>; 140183ad366SMasahiro Yamada }; 1413fc9a121SViresh Kumar opp-666667000 { 142183ad366SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 143183ad366SMasahiro Yamada clock-latency-ns = <300>; 144183ad366SMasahiro Yamada }; 1453fc9a121SViresh Kumar opp-733334000 { 146183ad366SMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 147183ad366SMasahiro Yamada clock-latency-ns = <300>; 148183ad366SMasahiro Yamada }; 1493fc9a121SViresh Kumar opp-1000000000 { 150183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 151183ad366SMasahiro Yamada clock-latency-ns = <300>; 152183ad366SMasahiro Yamada }; 1533fc9a121SViresh Kumar opp-1100000000 { 154183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 155183ad366SMasahiro Yamada clock-latency-ns = <300>; 156cea59bd0SMasahiro Yamada }; 157cea59bd0SMasahiro Yamada }; 158cea59bd0SMasahiro Yamada 1592f81137fSMasahiro Yamada psci { 1602f81137fSMasahiro Yamada compatible = "arm,psci-1.0"; 1612f81137fSMasahiro Yamada method = "smc"; 1622f81137fSMasahiro Yamada }; 1632f81137fSMasahiro Yamada 164cea59bd0SMasahiro Yamada clocks { 165cea59bd0SMasahiro Yamada refclk: ref { 166cea59bd0SMasahiro Yamada compatible = "fixed-clock"; 167cea59bd0SMasahiro Yamada #clock-cells = <0>; 168cea59bd0SMasahiro Yamada clock-frequency = <25000000>; 169cea59bd0SMasahiro Yamada }; 170cea59bd0SMasahiro Yamada }; 171cea59bd0SMasahiro Yamada 172b6e5ec20SMasahiro Yamada emmc_pwrseq: emmc-pwrseq { 173b6e5ec20SMasahiro Yamada compatible = "mmc-pwrseq-emmc"; 1748311ca57SMasahiro Yamada reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>; 175b6e5ec20SMasahiro Yamada }; 176b6e5ec20SMasahiro Yamada 177cea59bd0SMasahiro Yamada timer { 178cea59bd0SMasahiro Yamada compatible = "arm,armv8-timer"; 17937179033SArnd Bergmann interrupts = <1 13 4>, 18037179033SArnd Bergmann <1 14 4>, 18137179033SArnd Bergmann <1 11 4>, 18237179033SArnd Bergmann <1 10 4>; 183cea59bd0SMasahiro Yamada }; 184cea59bd0SMasahiro Yamada 185dba74980SKunihiko Hayashi thermal-zones { 186dba74980SKunihiko Hayashi cpu-thermal { 187dba74980SKunihiko Hayashi polling-delay-passive = <250>; /* 250ms */ 188dba74980SKunihiko Hayashi polling-delay = <1000>; /* 1000ms */ 189dba74980SKunihiko Hayashi thermal-sensors = <&pvtctl>; 190dba74980SKunihiko Hayashi 191dba74980SKunihiko Hayashi trips { 192dba74980SKunihiko Hayashi cpu_crit: cpu-crit { 193dba74980SKunihiko Hayashi temperature = <110000>; /* 110C */ 194dba74980SKunihiko Hayashi hysteresis = <2000>; 195dba74980SKunihiko Hayashi type = "critical"; 196dba74980SKunihiko Hayashi }; 197dba74980SKunihiko Hayashi cpu_alert: cpu-alert { 198dba74980SKunihiko Hayashi temperature = <100000>; /* 100C */ 199dba74980SKunihiko Hayashi hysteresis = <2000>; 200dba74980SKunihiko Hayashi type = "passive"; 201dba74980SKunihiko Hayashi }; 202dba74980SKunihiko Hayashi }; 203dba74980SKunihiko Hayashi 204dba74980SKunihiko Hayashi cooling-maps { 205dba74980SKunihiko Hayashi map0 { 206dba74980SKunihiko Hayashi trip = <&cpu_alert>; 207dba74980SKunihiko Hayashi cooling-device = <&cpu0 208dba74980SKunihiko Hayashi THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 209dba74980SKunihiko Hayashi }; 210dba74980SKunihiko Hayashi map1 { 211dba74980SKunihiko Hayashi trip = <&cpu_alert>; 212dba74980SKunihiko Hayashi cooling-device = <&cpu2 213dba74980SKunihiko Hayashi THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 214dba74980SKunihiko Hayashi }; 215dba74980SKunihiko Hayashi }; 216dba74980SKunihiko Hayashi }; 217dba74980SKunihiko Hayashi }; 218dba74980SKunihiko Hayashi 219b5027603SMasahiro Yamada soc@0 { 220cea59bd0SMasahiro Yamada compatible = "simple-bus"; 221cea59bd0SMasahiro Yamada #address-cells = <1>; 222cea59bd0SMasahiro Yamada #size-cells = <1>; 223cea59bd0SMasahiro Yamada ranges = <0 0 0 0xffffffff>; 224cea59bd0SMasahiro Yamada 225cea59bd0SMasahiro Yamada serial0: serial@54006800 { 226cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 227cea59bd0SMasahiro Yamada status = "disabled"; 228cea59bd0SMasahiro Yamada reg = <0x54006800 0x40>; 229cea59bd0SMasahiro Yamada interrupts = <0 33 4>; 230cea59bd0SMasahiro Yamada pinctrl-names = "default"; 231cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 23242aee275SMasahiro Yamada clocks = <&peri_clk 0>; 23376c48e1eSMasahiro Yamada resets = <&peri_rst 0>; 234cea59bd0SMasahiro Yamada }; 235cea59bd0SMasahiro Yamada 236cea59bd0SMasahiro Yamada serial1: serial@54006900 { 237cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 238cea59bd0SMasahiro Yamada status = "disabled"; 239cea59bd0SMasahiro Yamada reg = <0x54006900 0x40>; 240cea59bd0SMasahiro Yamada interrupts = <0 35 4>; 241cea59bd0SMasahiro Yamada pinctrl-names = "default"; 242cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 24342aee275SMasahiro Yamada clocks = <&peri_clk 1>; 24476c48e1eSMasahiro Yamada resets = <&peri_rst 1>; 245cea59bd0SMasahiro Yamada }; 246cea59bd0SMasahiro Yamada 247cea59bd0SMasahiro Yamada serial2: serial@54006a00 { 248cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 249cea59bd0SMasahiro Yamada status = "disabled"; 250cea59bd0SMasahiro Yamada reg = <0x54006a00 0x40>; 251cea59bd0SMasahiro Yamada interrupts = <0 37 4>; 252cea59bd0SMasahiro Yamada pinctrl-names = "default"; 253cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 25442aee275SMasahiro Yamada clocks = <&peri_clk 2>; 25576c48e1eSMasahiro Yamada resets = <&peri_rst 2>; 256cea59bd0SMasahiro Yamada }; 257cea59bd0SMasahiro Yamada 258cea59bd0SMasahiro Yamada serial3: serial@54006b00 { 259cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 260cea59bd0SMasahiro Yamada status = "disabled"; 261cea59bd0SMasahiro Yamada reg = <0x54006b00 0x40>; 262cea59bd0SMasahiro Yamada interrupts = <0 177 4>; 263cea59bd0SMasahiro Yamada pinctrl-names = "default"; 264cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 26542aee275SMasahiro Yamada clocks = <&peri_clk 3>; 26676c48e1eSMasahiro Yamada resets = <&peri_rst 3>; 267cea59bd0SMasahiro Yamada }; 268cea59bd0SMasahiro Yamada 269277b51e7SMasahiro Yamada gpio: gpio@55000000 { 270277b51e7SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 271277b51e7SMasahiro Yamada reg = <0x55000000 0x200>; 272277b51e7SMasahiro Yamada interrupt-parent = <&aidet>; 273277b51e7SMasahiro Yamada interrupt-controller; 274277b51e7SMasahiro Yamada #interrupt-cells = <2>; 275277b51e7SMasahiro Yamada gpio-controller; 276277b51e7SMasahiro Yamada #gpio-cells = <2>; 277277b51e7SMasahiro Yamada gpio-ranges = <&pinctrl 0 0 0>, 278277b51e7SMasahiro Yamada <&pinctrl 96 0 0>, 279277b51e7SMasahiro Yamada <&pinctrl 160 0 0>; 280277b51e7SMasahiro Yamada gpio-ranges-group-names = "gpio_range0", 281277b51e7SMasahiro Yamada "gpio_range1", 282277b51e7SMasahiro Yamada "gpio_range2"; 283277b51e7SMasahiro Yamada ngpios = <205>; 284277b51e7SMasahiro Yamada socionext,interrupt-ranges = <0 48 16>, <16 154 5>, 285277b51e7SMasahiro Yamada <21 217 3>; 286277b51e7SMasahiro Yamada }; 287277b51e7SMasahiro Yamada 288fb21a0acSKatsuhiro Suzuki audio@56000000 { 289fb21a0acSKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-aio"; 290fb21a0acSKatsuhiro Suzuki reg = <0x56000000 0x80000>; 291fb21a0acSKatsuhiro Suzuki interrupts = <0 144 4>; 292fb21a0acSKatsuhiro Suzuki pinctrl-names = "default"; 293fb21a0acSKatsuhiro Suzuki pinctrl-0 = <&pinctrl_aout1>, 294fb21a0acSKatsuhiro Suzuki <&pinctrl_aoutiec1>; 295fb21a0acSKatsuhiro Suzuki clock-names = "aio"; 296fb21a0acSKatsuhiro Suzuki clocks = <&sys_clk 40>; 297fb21a0acSKatsuhiro Suzuki reset-names = "aio"; 298fb21a0acSKatsuhiro Suzuki resets = <&sys_rst 40>; 299fb21a0acSKatsuhiro Suzuki #sound-dai-cells = <1>; 3006c35921dSKatsuhiro Suzuki socionext,syscon = <&soc_glue>; 301fb21a0acSKatsuhiro Suzuki 302fb21a0acSKatsuhiro Suzuki i2s_port0: port@0 { 303fb21a0acSKatsuhiro Suzuki i2s_hdmi: endpoint { 304fb21a0acSKatsuhiro Suzuki }; 305fb21a0acSKatsuhiro Suzuki }; 306fb21a0acSKatsuhiro Suzuki 307fb21a0acSKatsuhiro Suzuki i2s_port1: port@1 { 308fb21a0acSKatsuhiro Suzuki i2s_pcmin2: endpoint { 309fb21a0acSKatsuhiro Suzuki }; 310fb21a0acSKatsuhiro Suzuki }; 311fb21a0acSKatsuhiro Suzuki 312fb21a0acSKatsuhiro Suzuki i2s_port2: port@2 { 313fb21a0acSKatsuhiro Suzuki i2s_line: endpoint { 314fb21a0acSKatsuhiro Suzuki dai-format = "i2s"; 315fb21a0acSKatsuhiro Suzuki remote-endpoint = <&evea_line>; 316fb21a0acSKatsuhiro Suzuki }; 317fb21a0acSKatsuhiro Suzuki }; 318fb21a0acSKatsuhiro Suzuki 319fb21a0acSKatsuhiro Suzuki i2s_port3: port@3 { 320fb21a0acSKatsuhiro Suzuki i2s_hpcmout1: endpoint { 321fb21a0acSKatsuhiro Suzuki }; 322fb21a0acSKatsuhiro Suzuki }; 323fb21a0acSKatsuhiro Suzuki 324fb21a0acSKatsuhiro Suzuki i2s_port4: port@4 { 325fb21a0acSKatsuhiro Suzuki i2s_hp: endpoint { 326fb21a0acSKatsuhiro Suzuki dai-format = "i2s"; 327fb21a0acSKatsuhiro Suzuki remote-endpoint = <&evea_hp>; 328fb21a0acSKatsuhiro Suzuki }; 329fb21a0acSKatsuhiro Suzuki }; 330fb21a0acSKatsuhiro Suzuki 331fb21a0acSKatsuhiro Suzuki spdif_port0: port@5 { 332fb21a0acSKatsuhiro Suzuki spdif_hiecout1: endpoint { 333fb21a0acSKatsuhiro Suzuki }; 334fb21a0acSKatsuhiro Suzuki }; 335fb21a0acSKatsuhiro Suzuki 336fb21a0acSKatsuhiro Suzuki src_port0: port@6 { 337fb21a0acSKatsuhiro Suzuki i2s_epcmout2: endpoint { 338fb21a0acSKatsuhiro Suzuki }; 339fb21a0acSKatsuhiro Suzuki }; 340fb21a0acSKatsuhiro Suzuki 341fb21a0acSKatsuhiro Suzuki src_port1: port@7 { 342fb21a0acSKatsuhiro Suzuki i2s_epcmout3: endpoint { 343fb21a0acSKatsuhiro Suzuki }; 344fb21a0acSKatsuhiro Suzuki }; 345fb21a0acSKatsuhiro Suzuki 346fb21a0acSKatsuhiro Suzuki comp_spdif_port0: port@8 { 347fb21a0acSKatsuhiro Suzuki comp_spdif_hiecout1: endpoint { 348fb21a0acSKatsuhiro Suzuki }; 349fb21a0acSKatsuhiro Suzuki }; 350fb21a0acSKatsuhiro Suzuki }; 351fb21a0acSKatsuhiro Suzuki 352fb21a0acSKatsuhiro Suzuki codec@57900000 { 353fb21a0acSKatsuhiro Suzuki compatible = "socionext,uniphier-evea"; 354fb21a0acSKatsuhiro Suzuki reg = <0x57900000 0x1000>; 355fb21a0acSKatsuhiro Suzuki clock-names = "evea", "exiv"; 356fb21a0acSKatsuhiro Suzuki clocks = <&sys_clk 41>, <&sys_clk 42>; 357fb21a0acSKatsuhiro Suzuki reset-names = "evea", "exiv", "adamv"; 358fb21a0acSKatsuhiro Suzuki resets = <&sys_rst 41>, <&sys_rst 42>, <&adamv_rst 0>; 359fb21a0acSKatsuhiro Suzuki #sound-dai-cells = <1>; 360fb21a0acSKatsuhiro Suzuki 361fb21a0acSKatsuhiro Suzuki port@0 { 362fb21a0acSKatsuhiro Suzuki evea_line: endpoint { 363fb21a0acSKatsuhiro Suzuki remote-endpoint = <&i2s_line>; 364fb21a0acSKatsuhiro Suzuki }; 365fb21a0acSKatsuhiro Suzuki }; 366fb21a0acSKatsuhiro Suzuki 367fb21a0acSKatsuhiro Suzuki port@1 { 368fb21a0acSKatsuhiro Suzuki evea_hp: endpoint { 369fb21a0acSKatsuhiro Suzuki remote-endpoint = <&i2s_hp>; 370fb21a0acSKatsuhiro Suzuki }; 371fb21a0acSKatsuhiro Suzuki }; 372fb21a0acSKatsuhiro Suzuki }; 373fb21a0acSKatsuhiro Suzuki 374178b3568SKatsuhiro Suzuki adamv@57920000 { 375178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-adamv", 376178b3568SKatsuhiro Suzuki "simple-mfd", "syscon"; 377178b3568SKatsuhiro Suzuki reg = <0x57920000 0x1000>; 378178b3568SKatsuhiro Suzuki 379178b3568SKatsuhiro Suzuki adamv_rst: reset { 380178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-adamv-reset"; 381178b3568SKatsuhiro Suzuki #reset-cells = <1>; 382178b3568SKatsuhiro Suzuki }; 383178b3568SKatsuhiro Suzuki }; 384178b3568SKatsuhiro Suzuki 385cea59bd0SMasahiro Yamada i2c0: i2c@58780000 { 386cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 387cea59bd0SMasahiro Yamada status = "disabled"; 388cea59bd0SMasahiro Yamada reg = <0x58780000 0x80>; 389cea59bd0SMasahiro Yamada #address-cells = <1>; 390cea59bd0SMasahiro Yamada #size-cells = <0>; 391cea59bd0SMasahiro Yamada interrupts = <0 41 4>; 392cea59bd0SMasahiro Yamada pinctrl-names = "default"; 393cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 39442aee275SMasahiro Yamada clocks = <&peri_clk 4>; 39576c48e1eSMasahiro Yamada resets = <&peri_rst 4>; 396cea59bd0SMasahiro Yamada clock-frequency = <100000>; 397cea59bd0SMasahiro Yamada }; 398cea59bd0SMasahiro Yamada 399cea59bd0SMasahiro Yamada i2c1: i2c@58781000 { 400cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 401cea59bd0SMasahiro Yamada status = "disabled"; 402cea59bd0SMasahiro Yamada reg = <0x58781000 0x80>; 403cea59bd0SMasahiro Yamada #address-cells = <1>; 404cea59bd0SMasahiro Yamada #size-cells = <0>; 405cea59bd0SMasahiro Yamada interrupts = <0 42 4>; 406cea59bd0SMasahiro Yamada pinctrl-names = "default"; 407cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 40842aee275SMasahiro Yamada clocks = <&peri_clk 5>; 40976c48e1eSMasahiro Yamada resets = <&peri_rst 5>; 410cea59bd0SMasahiro Yamada clock-frequency = <100000>; 411cea59bd0SMasahiro Yamada }; 412cea59bd0SMasahiro Yamada 413cea59bd0SMasahiro Yamada i2c2: i2c@58782000 { 414cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 415cea59bd0SMasahiro Yamada reg = <0x58782000 0x80>; 416cea59bd0SMasahiro Yamada #address-cells = <1>; 417cea59bd0SMasahiro Yamada #size-cells = <0>; 418cea59bd0SMasahiro Yamada interrupts = <0 43 4>; 41942aee275SMasahiro Yamada clocks = <&peri_clk 6>; 42076c48e1eSMasahiro Yamada resets = <&peri_rst 6>; 421cea59bd0SMasahiro Yamada clock-frequency = <400000>; 422cea59bd0SMasahiro Yamada }; 423cea59bd0SMasahiro Yamada 424cea59bd0SMasahiro Yamada i2c3: i2c@58783000 { 425cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 426cea59bd0SMasahiro Yamada status = "disabled"; 427cea59bd0SMasahiro Yamada reg = <0x58783000 0x80>; 428cea59bd0SMasahiro Yamada #address-cells = <1>; 429cea59bd0SMasahiro Yamada #size-cells = <0>; 430cea59bd0SMasahiro Yamada interrupts = <0 44 4>; 431cea59bd0SMasahiro Yamada pinctrl-names = "default"; 432cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 43342aee275SMasahiro Yamada clocks = <&peri_clk 7>; 43476c48e1eSMasahiro Yamada resets = <&peri_rst 7>; 435cea59bd0SMasahiro Yamada clock-frequency = <100000>; 436cea59bd0SMasahiro Yamada }; 437cea59bd0SMasahiro Yamada 438cea59bd0SMasahiro Yamada i2c4: i2c@58784000 { 439cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 440cea59bd0SMasahiro Yamada status = "disabled"; 441cea59bd0SMasahiro Yamada reg = <0x58784000 0x80>; 442cea59bd0SMasahiro Yamada #address-cells = <1>; 443cea59bd0SMasahiro Yamada #size-cells = <0>; 444cea59bd0SMasahiro Yamada interrupts = <0 45 4>; 445cea59bd0SMasahiro Yamada pinctrl-names = "default"; 446cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c4>; 44742aee275SMasahiro Yamada clocks = <&peri_clk 8>; 44876c48e1eSMasahiro Yamada resets = <&peri_rst 8>; 449cea59bd0SMasahiro Yamada clock-frequency = <100000>; 450cea59bd0SMasahiro Yamada }; 451cea59bd0SMasahiro Yamada 452cea59bd0SMasahiro Yamada i2c5: i2c@58785000 { 453cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 454cea59bd0SMasahiro Yamada reg = <0x58785000 0x80>; 455cea59bd0SMasahiro Yamada #address-cells = <1>; 456cea59bd0SMasahiro Yamada #size-cells = <0>; 457cea59bd0SMasahiro Yamada interrupts = <0 25 4>; 45842aee275SMasahiro Yamada clocks = <&peri_clk 9>; 45976c48e1eSMasahiro Yamada resets = <&peri_rst 9>; 460cea59bd0SMasahiro Yamada clock-frequency = <400000>; 461cea59bd0SMasahiro Yamada }; 462cea59bd0SMasahiro Yamada 463cea59bd0SMasahiro Yamada system_bus: system-bus@58c00000 { 464cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 465cea59bd0SMasahiro Yamada status = "disabled"; 466cea59bd0SMasahiro Yamada reg = <0x58c00000 0x400>; 467cea59bd0SMasahiro Yamada #address-cells = <2>; 468cea59bd0SMasahiro Yamada #size-cells = <1>; 4695d9a83c9SMasahiro Yamada pinctrl-names = "default"; 4705d9a83c9SMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 471cea59bd0SMasahiro Yamada }; 472cea59bd0SMasahiro Yamada 473b10ee7e3SMasahiro Yamada smpctrl@59801000 { 474cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 475cea59bd0SMasahiro Yamada reg = <0x59801000 0x400>; 476cea59bd0SMasahiro Yamada }; 477cea59bd0SMasahiro Yamada 4788e68c65dSMasahiro Yamada sdctrl@59810000 { 4798e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sdctrl", 48042aee275SMasahiro Yamada "simple-mfd", "syscon"; 481555861fbSMasahiro Yamada reg = <0x59810000 0x400>; 48242aee275SMasahiro Yamada 4838e68c65dSMasahiro Yamada sd_clk: clock { 4848e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-clock"; 48542aee275SMasahiro Yamada #clock-cells = <1>; 48642aee275SMasahiro Yamada }; 48742aee275SMasahiro Yamada 4888e68c65dSMasahiro Yamada sd_rst: reset { 4898e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-reset"; 49042aee275SMasahiro Yamada #reset-cells = <1>; 49142aee275SMasahiro Yamada }; 49242aee275SMasahiro Yamada }; 49342aee275SMasahiro Yamada 49442aee275SMasahiro Yamada perictrl@59820000 { 495fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-perictrl", 49642aee275SMasahiro Yamada "simple-mfd", "syscon"; 49742aee275SMasahiro Yamada reg = <0x59820000 0x200>; 49842aee275SMasahiro Yamada 49942aee275SMasahiro Yamada peri_clk: clock { 50042aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-clock"; 50142aee275SMasahiro Yamada #clock-cells = <1>; 50242aee275SMasahiro Yamada }; 50342aee275SMasahiro Yamada 50442aee275SMasahiro Yamada peri_rst: reset { 50542aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-reset"; 50642aee275SMasahiro Yamada #reset-cells = <1>; 50742aee275SMasahiro Yamada }; 50842aee275SMasahiro Yamada }; 50942aee275SMasahiro Yamada 5103a93cc26SMasahiro Yamada emmc: sdhc@5a000000 { 5113a93cc26SMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 5123a93cc26SMasahiro Yamada reg = <0x5a000000 0x400>; 5133a93cc26SMasahiro Yamada interrupts = <0 78 4>; 5149c0a9700SMasahiro Yamada pinctrl-names = "default"; 5159c0a9700SMasahiro Yamada pinctrl-0 = <&pinctrl_emmc>; 5163a93cc26SMasahiro Yamada clocks = <&sys_clk 4>; 51776c48e1eSMasahiro Yamada resets = <&sys_rst 4>; 5183a93cc26SMasahiro Yamada bus-width = <8>; 5193a93cc26SMasahiro Yamada mmc-ddr-1_8v; 5203a93cc26SMasahiro Yamada mmc-hs200-1_8v; 521b6e5ec20SMasahiro Yamada mmc-pwrseq = <&emmc_pwrseq>; 522ba6f7011SMasahiro Yamada cdns,phy-input-delay-legacy = <4>; 523ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 524ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 525e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 526e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 5273a93cc26SMasahiro Yamada }; 5283a93cc26SMasahiro Yamada 5296c35921dSKatsuhiro Suzuki soc_glue: soc-glue@5f800000 { 530fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-soc-glue", 5319d4f5505SMasahiro Yamada "simple-mfd", "syscon"; 532cea59bd0SMasahiro Yamada reg = <0x5f800000 0x2000>; 533cea59bd0SMasahiro Yamada 534cea59bd0SMasahiro Yamada pinctrl: pinctrl { 535cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20-pinctrl"; 536cea59bd0SMasahiro Yamada }; 537cea59bd0SMasahiro Yamada }; 538cea59bd0SMasahiro Yamada 539f05851e1SKeiji Hayashibara soc-glue@5f900000 { 540f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-ld20-soc-glue-debug", 541f05851e1SKeiji Hayashibara "simple-mfd"; 542f05851e1SKeiji Hayashibara #address-cells = <1>; 543f05851e1SKeiji Hayashibara #size-cells = <1>; 544f05851e1SKeiji Hayashibara ranges = <0 0x5f900000 0x2000>; 545f05851e1SKeiji Hayashibara 546f05851e1SKeiji Hayashibara efuse@100 { 547f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 548f05851e1SKeiji Hayashibara reg = <0x100 0x28>; 549f05851e1SKeiji Hayashibara }; 550f05851e1SKeiji Hayashibara 551f05851e1SKeiji Hayashibara efuse@200 { 552f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 553f05851e1SKeiji Hayashibara reg = <0x200 0x68>; 554f05851e1SKeiji Hayashibara }; 555f05851e1SKeiji Hayashibara }; 556f05851e1SKeiji Hayashibara 5573dfc6e98SMasahiro Yamada aidet: aidet@5fc20000 { 5583dfc6e98SMasahiro Yamada compatible = "socionext,uniphier-ld20-aidet"; 5593dfc6e98SMasahiro Yamada reg = <0x5fc20000 0x200>; 5603dfc6e98SMasahiro Yamada interrupt-controller; 5613dfc6e98SMasahiro Yamada #interrupt-cells = <2>; 5623dfc6e98SMasahiro Yamada }; 5633dfc6e98SMasahiro Yamada 564cea59bd0SMasahiro Yamada gic: interrupt-controller@5fe00000 { 565cea59bd0SMasahiro Yamada compatible = "arm,gic-v3"; 566cea59bd0SMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 567cea59bd0SMasahiro Yamada <0x5fe80000 0x80000>; /* GICR */ 568cea59bd0SMasahiro Yamada interrupt-controller; 569cea59bd0SMasahiro Yamada #interrupt-cells = <3>; 570cea59bd0SMasahiro Yamada interrupts = <1 9 4>; 571cea59bd0SMasahiro Yamada }; 57242aee275SMasahiro Yamada 57342aee275SMasahiro Yamada sysctrl@61840000 { 574fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-sysctrl", 57542aee275SMasahiro Yamada "simple-mfd", "syscon"; 5761ef64af8SMasahiro Yamada reg = <0x61840000 0x10000>; 57742aee275SMasahiro Yamada 57842aee275SMasahiro Yamada sys_clk: clock { 57942aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-clock"; 58042aee275SMasahiro Yamada #clock-cells = <1>; 58142aee275SMasahiro Yamada }; 58242aee275SMasahiro Yamada 58342aee275SMasahiro Yamada sys_rst: reset { 58442aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-reset"; 58542aee275SMasahiro Yamada #reset-cells = <1>; 58642aee275SMasahiro Yamada }; 5874c4c960aSKeiji Hayashibara 5884c4c960aSKeiji Hayashibara watchdog { 5894c4c960aSKeiji Hayashibara compatible = "socionext,uniphier-wdt"; 5904c4c960aSKeiji Hayashibara }; 591dba74980SKunihiko Hayashi 592dba74980SKunihiko Hayashi pvtctl: pvtctl { 593dba74980SKunihiko Hayashi compatible = "socionext,uniphier-ld20-thermal"; 594dba74980SKunihiko Hayashi interrupts = <0 3 4>; 595dba74980SKunihiko Hayashi #thermal-sensor-cells = <0>; 596dba74980SKunihiko Hayashi socionext,tmod-calibration = <0x0f22 0x68ee>; 597dba74980SKunihiko Hayashi }; 59842aee275SMasahiro Yamada }; 599e5aefb38SMasahiro Yamada 600c73730eeSKunihiko Hayashi eth: ethernet@65000000 { 601c73730eeSKunihiko Hayashi compatible = "socionext,uniphier-ld20-ave4"; 602c73730eeSKunihiko Hayashi status = "disabled"; 603c73730eeSKunihiko Hayashi reg = <0x65000000 0x8500>; 604c73730eeSKunihiko Hayashi interrupts = <0 66 4>; 605c73730eeSKunihiko Hayashi pinctrl-names = "default"; 606c73730eeSKunihiko Hayashi pinctrl-0 = <&pinctrl_ether_rgmii>; 607a34a464dSKunihiko Hayashi clock-names = "ether"; 608c73730eeSKunihiko Hayashi clocks = <&sys_clk 6>; 609a34a464dSKunihiko Hayashi reset-names = "ether"; 610c73730eeSKunihiko Hayashi resets = <&sys_rst 6>; 611c73730eeSKunihiko Hayashi phy-mode = "rgmii"; 612c73730eeSKunihiko Hayashi local-mac-address = [00 00 00 00 00 00]; 613c73730eeSKunihiko Hayashi 614c73730eeSKunihiko Hayashi mdio: mdio { 615c73730eeSKunihiko Hayashi #address-cells = <1>; 616c73730eeSKunihiko Hayashi #size-cells = <0>; 617c73730eeSKunihiko Hayashi }; 618c73730eeSKunihiko Hayashi }; 619c73730eeSKunihiko Hayashi 620e5aefb38SMasahiro Yamada nand: nand@68000000 { 621e5aefb38SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 622e5aefb38SMasahiro Yamada status = "disabled"; 623e5aefb38SMasahiro Yamada reg-names = "nand_data", "denali_reg"; 624e5aefb38SMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 625e5aefb38SMasahiro Yamada interrupts = <0 65 4>; 626e5aefb38SMasahiro Yamada pinctrl-names = "default"; 627e5aefb38SMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 628e5aefb38SMasahiro Yamada clocks = <&sys_clk 2>; 62976c48e1eSMasahiro Yamada resets = <&sys_rst 2>; 630e5aefb38SMasahiro Yamada }; 631cea59bd0SMasahiro Yamada }; 632cea59bd0SMasahiro Yamada}; 633cea59bd0SMasahiro Yamada 6345740ea4eSMasahiro Yamada#include "uniphier-pinctrl.dtsi" 635fb21a0acSKatsuhiro Suzuki 636fb21a0acSKatsuhiro Suzuki&pinctrl_aout1 { 637fb21a0acSKatsuhiro Suzuki drive-strength = <4>; /* default: 3.5mA */ 638fb21a0acSKatsuhiro Suzuki 639fb21a0acSKatsuhiro Suzuki ao1dacck { 640fb21a0acSKatsuhiro Suzuki pins = "AO1DACCK"; 641fb21a0acSKatsuhiro Suzuki drive-strength = <5>; /* 5mA */ 642fb21a0acSKatsuhiro Suzuki }; 643fb21a0acSKatsuhiro Suzuki}; 644fb21a0acSKatsuhiro Suzuki 645fb21a0acSKatsuhiro Suzuki&pinctrl_aoutiec1 { 646fb21a0acSKatsuhiro Suzuki drive-strength = <4>; /* default: 3.5mA */ 647fb21a0acSKatsuhiro Suzuki 648fb21a0acSKatsuhiro Suzuki ao1arc { 649fb21a0acSKatsuhiro Suzuki pins = "AO1ARC"; 650fb21a0acSKatsuhiro Suzuki drive-strength = <11>; /* 11mA */ 651fb21a0acSKatsuhiro Suzuki }; 652fb21a0acSKatsuhiro Suzuki}; 653