1cea59bd0SMasahiro Yamada/* 2cea59bd0SMasahiro Yamada * Device Tree Source for UniPhier LD20 SoC 3cea59bd0SMasahiro Yamada * 4cea59bd0SMasahiro Yamada * Copyright (C) 2015-2016 Socionext Inc. 5cea59bd0SMasahiro Yamada * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 6cea59bd0SMasahiro Yamada * 712301cffSMasahiro Yamada * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8cea59bd0SMasahiro Yamada */ 9cea59bd0SMasahiro Yamada 10dba74980SKunihiko Hayashi#include <dt-bindings/thermal/thermal.h> 11dba74980SKunihiko Hayashi 1279d4be39SMasahiro Yamada/memreserve/ 0x80000000 0x02000000; 13cea59bd0SMasahiro Yamada 14cea59bd0SMasahiro Yamada/ { 15cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20"; 16cea59bd0SMasahiro Yamada #address-cells = <2>; 17cea59bd0SMasahiro Yamada #size-cells = <2>; 18cea59bd0SMasahiro Yamada interrupt-parent = <&gic>; 19cea59bd0SMasahiro Yamada 20cea59bd0SMasahiro Yamada cpus { 21cea59bd0SMasahiro Yamada #address-cells = <2>; 22cea59bd0SMasahiro Yamada #size-cells = <0>; 23cea59bd0SMasahiro Yamada 24cea59bd0SMasahiro Yamada cpu-map { 25cea59bd0SMasahiro Yamada cluster0 { 26cea59bd0SMasahiro Yamada core0 { 27cea59bd0SMasahiro Yamada cpu = <&cpu0>; 28cea59bd0SMasahiro Yamada }; 29cea59bd0SMasahiro Yamada core1 { 30cea59bd0SMasahiro Yamada cpu = <&cpu1>; 31cea59bd0SMasahiro Yamada }; 32cea59bd0SMasahiro Yamada }; 33cea59bd0SMasahiro Yamada 34cea59bd0SMasahiro Yamada cluster1 { 35cea59bd0SMasahiro Yamada core0 { 36cea59bd0SMasahiro Yamada cpu = <&cpu2>; 37cea59bd0SMasahiro Yamada }; 38cea59bd0SMasahiro Yamada core1 { 39cea59bd0SMasahiro Yamada cpu = <&cpu3>; 40cea59bd0SMasahiro Yamada }; 41cea59bd0SMasahiro Yamada }; 42cea59bd0SMasahiro Yamada }; 43cea59bd0SMasahiro Yamada 44cea59bd0SMasahiro Yamada cpu0: cpu@0 { 45cea59bd0SMasahiro Yamada device_type = "cpu"; 46cea59bd0SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 47cea59bd0SMasahiro Yamada reg = <0 0x000>; 48183ad366SMasahiro Yamada clocks = <&sys_clk 32>; 492f81137fSMasahiro Yamada enable-method = "psci"; 50183ad366SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 51dba74980SKunihiko Hayashi #cooling-cells = <2>; 52cea59bd0SMasahiro Yamada }; 53cea59bd0SMasahiro Yamada 54cea59bd0SMasahiro Yamada cpu1: cpu@1 { 55cea59bd0SMasahiro Yamada device_type = "cpu"; 56cea59bd0SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 57cea59bd0SMasahiro Yamada reg = <0 0x001>; 58183ad366SMasahiro Yamada clocks = <&sys_clk 32>; 592f81137fSMasahiro Yamada enable-method = "psci"; 60183ad366SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 61cea59bd0SMasahiro Yamada }; 62cea59bd0SMasahiro Yamada 63cea59bd0SMasahiro Yamada cpu2: cpu@100 { 64cea59bd0SMasahiro Yamada device_type = "cpu"; 65cea59bd0SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 66cea59bd0SMasahiro Yamada reg = <0 0x100>; 67183ad366SMasahiro Yamada clocks = <&sys_clk 33>; 682f81137fSMasahiro Yamada enable-method = "psci"; 69183ad366SMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 70dba74980SKunihiko Hayashi #cooling-cells = <2>; 71cea59bd0SMasahiro Yamada }; 72cea59bd0SMasahiro Yamada 73cea59bd0SMasahiro Yamada cpu3: cpu@101 { 74cea59bd0SMasahiro Yamada device_type = "cpu"; 75cea59bd0SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 76cea59bd0SMasahiro Yamada reg = <0 0x101>; 77183ad366SMasahiro Yamada clocks = <&sys_clk 33>; 782f81137fSMasahiro Yamada enable-method = "psci"; 79183ad366SMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 80183ad366SMasahiro Yamada }; 81183ad366SMasahiro Yamada }; 82183ad366SMasahiro Yamada 839cd7d03fSMasahiro Yamada cluster0_opp: opp-table0 { 84183ad366SMasahiro Yamada compatible = "operating-points-v2"; 85183ad366SMasahiro Yamada opp-shared; 86183ad366SMasahiro Yamada 873fc9a121SViresh Kumar opp-250000000 { 88183ad366SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 89183ad366SMasahiro Yamada clock-latency-ns = <300>; 90183ad366SMasahiro Yamada }; 913fc9a121SViresh Kumar opp-275000000 { 92183ad366SMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 93183ad366SMasahiro Yamada clock-latency-ns = <300>; 94183ad366SMasahiro Yamada }; 953fc9a121SViresh Kumar opp-500000000 { 96183ad366SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 97183ad366SMasahiro Yamada clock-latency-ns = <300>; 98183ad366SMasahiro Yamada }; 993fc9a121SViresh Kumar opp-550000000 { 100183ad366SMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 101183ad366SMasahiro Yamada clock-latency-ns = <300>; 102183ad366SMasahiro Yamada }; 1033fc9a121SViresh Kumar opp-666667000 { 104183ad366SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 105183ad366SMasahiro Yamada clock-latency-ns = <300>; 106183ad366SMasahiro Yamada }; 1073fc9a121SViresh Kumar opp-733334000 { 108183ad366SMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 109183ad366SMasahiro Yamada clock-latency-ns = <300>; 110183ad366SMasahiro Yamada }; 1113fc9a121SViresh Kumar opp-1000000000 { 112183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 113183ad366SMasahiro Yamada clock-latency-ns = <300>; 114183ad366SMasahiro Yamada }; 1153fc9a121SViresh Kumar opp-1100000000 { 116183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 117183ad366SMasahiro Yamada clock-latency-ns = <300>; 118183ad366SMasahiro Yamada }; 119183ad366SMasahiro Yamada }; 120183ad366SMasahiro Yamada 1219cd7d03fSMasahiro Yamada cluster1_opp: opp-table1 { 122183ad366SMasahiro Yamada compatible = "operating-points-v2"; 123183ad366SMasahiro Yamada opp-shared; 124183ad366SMasahiro Yamada 1253fc9a121SViresh Kumar opp-250000000 { 126183ad366SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 127183ad366SMasahiro Yamada clock-latency-ns = <300>; 128183ad366SMasahiro Yamada }; 1293fc9a121SViresh Kumar opp-275000000 { 130183ad366SMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 131183ad366SMasahiro Yamada clock-latency-ns = <300>; 132183ad366SMasahiro Yamada }; 1333fc9a121SViresh Kumar opp-500000000 { 134183ad366SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 135183ad366SMasahiro Yamada clock-latency-ns = <300>; 136183ad366SMasahiro Yamada }; 1373fc9a121SViresh Kumar opp-550000000 { 138183ad366SMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 139183ad366SMasahiro Yamada clock-latency-ns = <300>; 140183ad366SMasahiro Yamada }; 1413fc9a121SViresh Kumar opp-666667000 { 142183ad366SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 143183ad366SMasahiro Yamada clock-latency-ns = <300>; 144183ad366SMasahiro Yamada }; 1453fc9a121SViresh Kumar opp-733334000 { 146183ad366SMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 147183ad366SMasahiro Yamada clock-latency-ns = <300>; 148183ad366SMasahiro Yamada }; 1493fc9a121SViresh Kumar opp-1000000000 { 150183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 151183ad366SMasahiro Yamada clock-latency-ns = <300>; 152183ad366SMasahiro Yamada }; 1533fc9a121SViresh Kumar opp-1100000000 { 154183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 155183ad366SMasahiro Yamada clock-latency-ns = <300>; 156cea59bd0SMasahiro Yamada }; 157cea59bd0SMasahiro Yamada }; 158cea59bd0SMasahiro Yamada 1592f81137fSMasahiro Yamada psci { 1602f81137fSMasahiro Yamada compatible = "arm,psci-1.0"; 1612f81137fSMasahiro Yamada method = "smc"; 1622f81137fSMasahiro Yamada }; 1632f81137fSMasahiro Yamada 164cea59bd0SMasahiro Yamada clocks { 165cea59bd0SMasahiro Yamada refclk: ref { 166cea59bd0SMasahiro Yamada compatible = "fixed-clock"; 167cea59bd0SMasahiro Yamada #clock-cells = <0>; 168cea59bd0SMasahiro Yamada clock-frequency = <25000000>; 169cea59bd0SMasahiro Yamada }; 170cea59bd0SMasahiro Yamada }; 171cea59bd0SMasahiro Yamada 172cea59bd0SMasahiro Yamada timer { 173cea59bd0SMasahiro Yamada compatible = "arm,armv8-timer"; 17437179033SArnd Bergmann interrupts = <1 13 4>, 17537179033SArnd Bergmann <1 14 4>, 17637179033SArnd Bergmann <1 11 4>, 17737179033SArnd Bergmann <1 10 4>; 178cea59bd0SMasahiro Yamada }; 179cea59bd0SMasahiro Yamada 180dba74980SKunihiko Hayashi thermal-zones { 181dba74980SKunihiko Hayashi cpu-thermal { 182dba74980SKunihiko Hayashi polling-delay-passive = <250>; /* 250ms */ 183dba74980SKunihiko Hayashi polling-delay = <1000>; /* 1000ms */ 184dba74980SKunihiko Hayashi thermal-sensors = <&pvtctl>; 185dba74980SKunihiko Hayashi 186dba74980SKunihiko Hayashi trips { 187dba74980SKunihiko Hayashi cpu_crit: cpu-crit { 188dba74980SKunihiko Hayashi temperature = <110000>; /* 110C */ 189dba74980SKunihiko Hayashi hysteresis = <2000>; 190dba74980SKunihiko Hayashi type = "critical"; 191dba74980SKunihiko Hayashi }; 192dba74980SKunihiko Hayashi cpu_alert: cpu-alert { 193dba74980SKunihiko Hayashi temperature = <100000>; /* 100C */ 194dba74980SKunihiko Hayashi hysteresis = <2000>; 195dba74980SKunihiko Hayashi type = "passive"; 196dba74980SKunihiko Hayashi }; 197dba74980SKunihiko Hayashi }; 198dba74980SKunihiko Hayashi 199dba74980SKunihiko Hayashi cooling-maps { 200dba74980SKunihiko Hayashi map0 { 201dba74980SKunihiko Hayashi trip = <&cpu_alert>; 202dba74980SKunihiko Hayashi cooling-device = <&cpu0 203dba74980SKunihiko Hayashi THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 204dba74980SKunihiko Hayashi }; 205dba74980SKunihiko Hayashi map1 { 206dba74980SKunihiko Hayashi trip = <&cpu_alert>; 207dba74980SKunihiko Hayashi cooling-device = <&cpu2 208dba74980SKunihiko Hayashi THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 209dba74980SKunihiko Hayashi }; 210dba74980SKunihiko Hayashi }; 211dba74980SKunihiko Hayashi }; 212dba74980SKunihiko Hayashi }; 213dba74980SKunihiko Hayashi 214b5027603SMasahiro Yamada soc@0 { 215cea59bd0SMasahiro Yamada compatible = "simple-bus"; 216cea59bd0SMasahiro Yamada #address-cells = <1>; 217cea59bd0SMasahiro Yamada #size-cells = <1>; 218cea59bd0SMasahiro Yamada ranges = <0 0 0 0xffffffff>; 219cea59bd0SMasahiro Yamada 220cea59bd0SMasahiro Yamada serial0: serial@54006800 { 221cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 222cea59bd0SMasahiro Yamada status = "disabled"; 223cea59bd0SMasahiro Yamada reg = <0x54006800 0x40>; 224cea59bd0SMasahiro Yamada interrupts = <0 33 4>; 225cea59bd0SMasahiro Yamada pinctrl-names = "default"; 226cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 22742aee275SMasahiro Yamada clocks = <&peri_clk 0>; 228cea59bd0SMasahiro Yamada }; 229cea59bd0SMasahiro Yamada 230cea59bd0SMasahiro Yamada serial1: serial@54006900 { 231cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 232cea59bd0SMasahiro Yamada status = "disabled"; 233cea59bd0SMasahiro Yamada reg = <0x54006900 0x40>; 234cea59bd0SMasahiro Yamada interrupts = <0 35 4>; 235cea59bd0SMasahiro Yamada pinctrl-names = "default"; 236cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 23742aee275SMasahiro Yamada clocks = <&peri_clk 1>; 238cea59bd0SMasahiro Yamada }; 239cea59bd0SMasahiro Yamada 240cea59bd0SMasahiro Yamada serial2: serial@54006a00 { 241cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 242cea59bd0SMasahiro Yamada status = "disabled"; 243cea59bd0SMasahiro Yamada reg = <0x54006a00 0x40>; 244cea59bd0SMasahiro Yamada interrupts = <0 37 4>; 245cea59bd0SMasahiro Yamada pinctrl-names = "default"; 246cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 24742aee275SMasahiro Yamada clocks = <&peri_clk 2>; 248cea59bd0SMasahiro Yamada }; 249cea59bd0SMasahiro Yamada 250cea59bd0SMasahiro Yamada serial3: serial@54006b00 { 251cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 252cea59bd0SMasahiro Yamada status = "disabled"; 253cea59bd0SMasahiro Yamada reg = <0x54006b00 0x40>; 254cea59bd0SMasahiro Yamada interrupts = <0 177 4>; 255cea59bd0SMasahiro Yamada pinctrl-names = "default"; 256cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 25742aee275SMasahiro Yamada clocks = <&peri_clk 3>; 258cea59bd0SMasahiro Yamada }; 259cea59bd0SMasahiro Yamada 260178b3568SKatsuhiro Suzuki adamv@57920000 { 261178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-adamv", 262178b3568SKatsuhiro Suzuki "simple-mfd", "syscon"; 263178b3568SKatsuhiro Suzuki reg = <0x57920000 0x1000>; 264178b3568SKatsuhiro Suzuki 265178b3568SKatsuhiro Suzuki adamv_rst: reset { 266178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-adamv-reset"; 267178b3568SKatsuhiro Suzuki #reset-cells = <1>; 268178b3568SKatsuhiro Suzuki }; 269178b3568SKatsuhiro Suzuki }; 270178b3568SKatsuhiro Suzuki 271cea59bd0SMasahiro Yamada i2c0: i2c@58780000 { 272cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 273cea59bd0SMasahiro Yamada status = "disabled"; 274cea59bd0SMasahiro Yamada reg = <0x58780000 0x80>; 275cea59bd0SMasahiro Yamada #address-cells = <1>; 276cea59bd0SMasahiro Yamada #size-cells = <0>; 277cea59bd0SMasahiro Yamada interrupts = <0 41 4>; 278cea59bd0SMasahiro Yamada pinctrl-names = "default"; 279cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 28042aee275SMasahiro Yamada clocks = <&peri_clk 4>; 281cea59bd0SMasahiro Yamada clock-frequency = <100000>; 282cea59bd0SMasahiro Yamada }; 283cea59bd0SMasahiro Yamada 284cea59bd0SMasahiro Yamada i2c1: i2c@58781000 { 285cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 286cea59bd0SMasahiro Yamada status = "disabled"; 287cea59bd0SMasahiro Yamada reg = <0x58781000 0x80>; 288cea59bd0SMasahiro Yamada #address-cells = <1>; 289cea59bd0SMasahiro Yamada #size-cells = <0>; 290cea59bd0SMasahiro Yamada interrupts = <0 42 4>; 291cea59bd0SMasahiro Yamada pinctrl-names = "default"; 292cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 29342aee275SMasahiro Yamada clocks = <&peri_clk 5>; 294cea59bd0SMasahiro Yamada clock-frequency = <100000>; 295cea59bd0SMasahiro Yamada }; 296cea59bd0SMasahiro Yamada 297cea59bd0SMasahiro Yamada i2c2: i2c@58782000 { 298cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 299cea59bd0SMasahiro Yamada reg = <0x58782000 0x80>; 300cea59bd0SMasahiro Yamada #address-cells = <1>; 301cea59bd0SMasahiro Yamada #size-cells = <0>; 302cea59bd0SMasahiro Yamada interrupts = <0 43 4>; 30342aee275SMasahiro Yamada clocks = <&peri_clk 6>; 304cea59bd0SMasahiro Yamada clock-frequency = <400000>; 305cea59bd0SMasahiro Yamada }; 306cea59bd0SMasahiro Yamada 307cea59bd0SMasahiro Yamada i2c3: i2c@58783000 { 308cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 309cea59bd0SMasahiro Yamada status = "disabled"; 310cea59bd0SMasahiro Yamada reg = <0x58783000 0x80>; 311cea59bd0SMasahiro Yamada #address-cells = <1>; 312cea59bd0SMasahiro Yamada #size-cells = <0>; 313cea59bd0SMasahiro Yamada interrupts = <0 44 4>; 314cea59bd0SMasahiro Yamada pinctrl-names = "default"; 315cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 31642aee275SMasahiro Yamada clocks = <&peri_clk 7>; 317cea59bd0SMasahiro Yamada clock-frequency = <100000>; 318cea59bd0SMasahiro Yamada }; 319cea59bd0SMasahiro Yamada 320cea59bd0SMasahiro Yamada i2c4: i2c@58784000 { 321cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 322cea59bd0SMasahiro Yamada status = "disabled"; 323cea59bd0SMasahiro Yamada reg = <0x58784000 0x80>; 324cea59bd0SMasahiro Yamada #address-cells = <1>; 325cea59bd0SMasahiro Yamada #size-cells = <0>; 326cea59bd0SMasahiro Yamada interrupts = <0 45 4>; 327cea59bd0SMasahiro Yamada pinctrl-names = "default"; 328cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c4>; 32942aee275SMasahiro Yamada clocks = <&peri_clk 8>; 330cea59bd0SMasahiro Yamada clock-frequency = <100000>; 331cea59bd0SMasahiro Yamada }; 332cea59bd0SMasahiro Yamada 333cea59bd0SMasahiro Yamada i2c5: i2c@58785000 { 334cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 335cea59bd0SMasahiro Yamada reg = <0x58785000 0x80>; 336cea59bd0SMasahiro Yamada #address-cells = <1>; 337cea59bd0SMasahiro Yamada #size-cells = <0>; 338cea59bd0SMasahiro Yamada interrupts = <0 25 4>; 33942aee275SMasahiro Yamada clocks = <&peri_clk 9>; 340cea59bd0SMasahiro Yamada clock-frequency = <400000>; 341cea59bd0SMasahiro Yamada }; 342cea59bd0SMasahiro Yamada 343cea59bd0SMasahiro Yamada system_bus: system-bus@58c00000 { 344cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 345cea59bd0SMasahiro Yamada status = "disabled"; 346cea59bd0SMasahiro Yamada reg = <0x58c00000 0x400>; 347cea59bd0SMasahiro Yamada #address-cells = <2>; 348cea59bd0SMasahiro Yamada #size-cells = <1>; 3495d9a83c9SMasahiro Yamada pinctrl-names = "default"; 3505d9a83c9SMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 351cea59bd0SMasahiro Yamada }; 352cea59bd0SMasahiro Yamada 353b10ee7e3SMasahiro Yamada smpctrl@59801000 { 354cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 355cea59bd0SMasahiro Yamada reg = <0x59801000 0x400>; 356cea59bd0SMasahiro Yamada }; 357cea59bd0SMasahiro Yamada 3588e68c65dSMasahiro Yamada sdctrl@59810000 { 3598e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sdctrl", 36042aee275SMasahiro Yamada "simple-mfd", "syscon"; 361555861fbSMasahiro Yamada reg = <0x59810000 0x400>; 36242aee275SMasahiro Yamada 3638e68c65dSMasahiro Yamada sd_clk: clock { 3648e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-clock"; 36542aee275SMasahiro Yamada #clock-cells = <1>; 36642aee275SMasahiro Yamada }; 36742aee275SMasahiro Yamada 3688e68c65dSMasahiro Yamada sd_rst: reset { 3698e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-reset"; 37042aee275SMasahiro Yamada #reset-cells = <1>; 37142aee275SMasahiro Yamada }; 37242aee275SMasahiro Yamada }; 37342aee275SMasahiro Yamada 37442aee275SMasahiro Yamada perictrl@59820000 { 375fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-perictrl", 37642aee275SMasahiro Yamada "simple-mfd", "syscon"; 37742aee275SMasahiro Yamada reg = <0x59820000 0x200>; 37842aee275SMasahiro Yamada 37942aee275SMasahiro Yamada peri_clk: clock { 38042aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-clock"; 38142aee275SMasahiro Yamada #clock-cells = <1>; 38242aee275SMasahiro Yamada }; 38342aee275SMasahiro Yamada 38442aee275SMasahiro Yamada peri_rst: reset { 38542aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-reset"; 38642aee275SMasahiro Yamada #reset-cells = <1>; 38742aee275SMasahiro Yamada }; 38842aee275SMasahiro Yamada }; 38942aee275SMasahiro Yamada 3903a93cc26SMasahiro Yamada emmc: sdhc@5a000000 { 3913a93cc26SMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 3923a93cc26SMasahiro Yamada reg = <0x5a000000 0x400>; 3933a93cc26SMasahiro Yamada interrupts = <0 78 4>; 3949c0a9700SMasahiro Yamada pinctrl-names = "default"; 3959c0a9700SMasahiro Yamada pinctrl-0 = <&pinctrl_emmc>; 3963a93cc26SMasahiro Yamada clocks = <&sys_clk 4>; 3973a93cc26SMasahiro Yamada bus-width = <8>; 3983a93cc26SMasahiro Yamada mmc-ddr-1_8v; 3993a93cc26SMasahiro Yamada mmc-hs200-1_8v; 400ba6f7011SMasahiro Yamada cdns,phy-input-delay-legacy = <4>; 401ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 402ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 403e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 404e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 4053a93cc26SMasahiro Yamada }; 4063a93cc26SMasahiro Yamada 407cea59bd0SMasahiro Yamada soc-glue@5f800000 { 408fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-soc-glue", 4099d4f5505SMasahiro Yamada "simple-mfd", "syscon"; 410cea59bd0SMasahiro Yamada reg = <0x5f800000 0x2000>; 411cea59bd0SMasahiro Yamada 412cea59bd0SMasahiro Yamada pinctrl: pinctrl { 413cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20-pinctrl"; 414cea59bd0SMasahiro Yamada }; 415cea59bd0SMasahiro Yamada }; 416cea59bd0SMasahiro Yamada 417f05851e1SKeiji Hayashibara soc-glue@5f900000 { 418f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-ld20-soc-glue-debug", 419f05851e1SKeiji Hayashibara "simple-mfd"; 420f05851e1SKeiji Hayashibara #address-cells = <1>; 421f05851e1SKeiji Hayashibara #size-cells = <1>; 422f05851e1SKeiji Hayashibara ranges = <0 0x5f900000 0x2000>; 423f05851e1SKeiji Hayashibara 424f05851e1SKeiji Hayashibara efuse@100 { 425f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 426f05851e1SKeiji Hayashibara reg = <0x100 0x28>; 427f05851e1SKeiji Hayashibara }; 428f05851e1SKeiji Hayashibara 429f05851e1SKeiji Hayashibara efuse@200 { 430f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 431f05851e1SKeiji Hayashibara reg = <0x200 0x68>; 432f05851e1SKeiji Hayashibara }; 433f05851e1SKeiji Hayashibara }; 434f05851e1SKeiji Hayashibara 4353dfc6e98SMasahiro Yamada aidet: aidet@5fc20000 { 4363dfc6e98SMasahiro Yamada compatible = "socionext,uniphier-ld20-aidet"; 4373dfc6e98SMasahiro Yamada reg = <0x5fc20000 0x200>; 4383dfc6e98SMasahiro Yamada interrupt-controller; 4393dfc6e98SMasahiro Yamada #interrupt-cells = <2>; 4403dfc6e98SMasahiro Yamada }; 4413dfc6e98SMasahiro Yamada 442cea59bd0SMasahiro Yamada gic: interrupt-controller@5fe00000 { 443cea59bd0SMasahiro Yamada compatible = "arm,gic-v3"; 444cea59bd0SMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 445cea59bd0SMasahiro Yamada <0x5fe80000 0x80000>; /* GICR */ 446cea59bd0SMasahiro Yamada interrupt-controller; 447cea59bd0SMasahiro Yamada #interrupt-cells = <3>; 448cea59bd0SMasahiro Yamada interrupts = <1 9 4>; 449cea59bd0SMasahiro Yamada }; 45042aee275SMasahiro Yamada 45142aee275SMasahiro Yamada sysctrl@61840000 { 452fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-sysctrl", 45342aee275SMasahiro Yamada "simple-mfd", "syscon"; 4541ef64af8SMasahiro Yamada reg = <0x61840000 0x10000>; 45542aee275SMasahiro Yamada 45642aee275SMasahiro Yamada sys_clk: clock { 45742aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-clock"; 45842aee275SMasahiro Yamada #clock-cells = <1>; 45942aee275SMasahiro Yamada }; 46042aee275SMasahiro Yamada 46142aee275SMasahiro Yamada sys_rst: reset { 46242aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-reset"; 46342aee275SMasahiro Yamada #reset-cells = <1>; 46442aee275SMasahiro Yamada }; 4654c4c960aSKeiji Hayashibara 4664c4c960aSKeiji Hayashibara watchdog { 4674c4c960aSKeiji Hayashibara compatible = "socionext,uniphier-wdt"; 4684c4c960aSKeiji Hayashibara }; 469dba74980SKunihiko Hayashi 470dba74980SKunihiko Hayashi pvtctl: pvtctl { 471dba74980SKunihiko Hayashi compatible = "socionext,uniphier-ld20-thermal"; 472dba74980SKunihiko Hayashi interrupts = <0 3 4>; 473dba74980SKunihiko Hayashi #thermal-sensor-cells = <0>; 474dba74980SKunihiko Hayashi socionext,tmod-calibration = <0x0f22 0x68ee>; 475dba74980SKunihiko Hayashi }; 47642aee275SMasahiro Yamada }; 477e5aefb38SMasahiro Yamada 478e5aefb38SMasahiro Yamada nand: nand@68000000 { 479e5aefb38SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 480e5aefb38SMasahiro Yamada status = "disabled"; 481e5aefb38SMasahiro Yamada reg-names = "nand_data", "denali_reg"; 482e5aefb38SMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 483e5aefb38SMasahiro Yamada interrupts = <0 65 4>; 484e5aefb38SMasahiro Yamada pinctrl-names = "default"; 485e5aefb38SMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 486e5aefb38SMasahiro Yamada clocks = <&sys_clk 2>; 487e5aefb38SMasahiro Yamada }; 488cea59bd0SMasahiro Yamada }; 489cea59bd0SMasahiro Yamada}; 490cea59bd0SMasahiro Yamada 4915740ea4eSMasahiro Yamada#include "uniphier-pinctrl.dtsi" 492