105f7e3d1SMasahiro Yamada// SPDX-License-Identifier: GPL-2.0+ OR MIT 205f7e3d1SMasahiro Yamada// 305f7e3d1SMasahiro Yamada// Device Tree Source for UniPhier LD20 SoC 405f7e3d1SMasahiro Yamada// 505f7e3d1SMasahiro Yamada// Copyright (C) 2015-2016 Socionext Inc. 605f7e3d1SMasahiro Yamada// Author: Masahiro Yamada <yamada.masahiro@socionext.com> 7cea59bd0SMasahiro Yamada 8b6e5ec20SMasahiro Yamada#include <dt-bindings/gpio/gpio.h> 98311ca57SMasahiro Yamada#include <dt-bindings/gpio/uniphier-gpio.h> 10dba74980SKunihiko Hayashi#include <dt-bindings/thermal/thermal.h> 11dba74980SKunihiko Hayashi 1279d4be39SMasahiro Yamada/memreserve/ 0x80000000 0x02000000; 13cea59bd0SMasahiro Yamada 14cea59bd0SMasahiro Yamada/ { 15cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20"; 16cea59bd0SMasahiro Yamada #address-cells = <2>; 17cea59bd0SMasahiro Yamada #size-cells = <2>; 18cea59bd0SMasahiro Yamada interrupt-parent = <&gic>; 19cea59bd0SMasahiro Yamada 20cea59bd0SMasahiro Yamada cpus { 21cea59bd0SMasahiro Yamada #address-cells = <2>; 22cea59bd0SMasahiro Yamada #size-cells = <0>; 23cea59bd0SMasahiro Yamada 24cea59bd0SMasahiro Yamada cpu-map { 25cea59bd0SMasahiro Yamada cluster0 { 26cea59bd0SMasahiro Yamada core0 { 27cea59bd0SMasahiro Yamada cpu = <&cpu0>; 28cea59bd0SMasahiro Yamada }; 29cea59bd0SMasahiro Yamada core1 { 30cea59bd0SMasahiro Yamada cpu = <&cpu1>; 31cea59bd0SMasahiro Yamada }; 32cea59bd0SMasahiro Yamada }; 33cea59bd0SMasahiro Yamada 34cea59bd0SMasahiro Yamada cluster1 { 35cea59bd0SMasahiro Yamada core0 { 36cea59bd0SMasahiro Yamada cpu = <&cpu2>; 37cea59bd0SMasahiro Yamada }; 38cea59bd0SMasahiro Yamada core1 { 39cea59bd0SMasahiro Yamada cpu = <&cpu3>; 40cea59bd0SMasahiro Yamada }; 41cea59bd0SMasahiro Yamada }; 42cea59bd0SMasahiro Yamada }; 43cea59bd0SMasahiro Yamada 44cea59bd0SMasahiro Yamada cpu0: cpu@0 { 45cea59bd0SMasahiro Yamada device_type = "cpu"; 46cea59bd0SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 47cea59bd0SMasahiro Yamada reg = <0 0x000>; 48183ad366SMasahiro Yamada clocks = <&sys_clk 32>; 492f81137fSMasahiro Yamada enable-method = "psci"; 50183ad366SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 51dba74980SKunihiko Hayashi #cooling-cells = <2>; 52cea59bd0SMasahiro Yamada }; 53cea59bd0SMasahiro Yamada 54cea59bd0SMasahiro Yamada cpu1: cpu@1 { 55cea59bd0SMasahiro Yamada device_type = "cpu"; 56cea59bd0SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 57cea59bd0SMasahiro Yamada reg = <0 0x001>; 58183ad366SMasahiro Yamada clocks = <&sys_clk 32>; 592f81137fSMasahiro Yamada enable-method = "psci"; 60183ad366SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 61af0e09d0SViresh Kumar #cooling-cells = <2>; 62cea59bd0SMasahiro Yamada }; 63cea59bd0SMasahiro Yamada 64cea59bd0SMasahiro Yamada cpu2: cpu@100 { 65cea59bd0SMasahiro Yamada device_type = "cpu"; 66cea59bd0SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 67cea59bd0SMasahiro Yamada reg = <0 0x100>; 68183ad366SMasahiro Yamada clocks = <&sys_clk 33>; 692f81137fSMasahiro Yamada enable-method = "psci"; 70183ad366SMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 71dba74980SKunihiko Hayashi #cooling-cells = <2>; 72cea59bd0SMasahiro Yamada }; 73cea59bd0SMasahiro Yamada 74cea59bd0SMasahiro Yamada cpu3: cpu@101 { 75cea59bd0SMasahiro Yamada device_type = "cpu"; 76cea59bd0SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 77cea59bd0SMasahiro Yamada reg = <0 0x101>; 78183ad366SMasahiro Yamada clocks = <&sys_clk 33>; 792f81137fSMasahiro Yamada enable-method = "psci"; 80183ad366SMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 81af0e09d0SViresh Kumar #cooling-cells = <2>; 82183ad366SMasahiro Yamada }; 83183ad366SMasahiro Yamada }; 84183ad366SMasahiro Yamada 859cd7d03fSMasahiro Yamada cluster0_opp: opp-table0 { 86183ad366SMasahiro Yamada compatible = "operating-points-v2"; 87183ad366SMasahiro Yamada opp-shared; 88183ad366SMasahiro Yamada 893fc9a121SViresh Kumar opp-250000000 { 90183ad366SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 91183ad366SMasahiro Yamada clock-latency-ns = <300>; 92183ad366SMasahiro Yamada }; 933fc9a121SViresh Kumar opp-275000000 { 94183ad366SMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 95183ad366SMasahiro Yamada clock-latency-ns = <300>; 96183ad366SMasahiro Yamada }; 973fc9a121SViresh Kumar opp-500000000 { 98183ad366SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 99183ad366SMasahiro Yamada clock-latency-ns = <300>; 100183ad366SMasahiro Yamada }; 1013fc9a121SViresh Kumar opp-550000000 { 102183ad366SMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 103183ad366SMasahiro Yamada clock-latency-ns = <300>; 104183ad366SMasahiro Yamada }; 1053fc9a121SViresh Kumar opp-666667000 { 106183ad366SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 107183ad366SMasahiro Yamada clock-latency-ns = <300>; 108183ad366SMasahiro Yamada }; 1093fc9a121SViresh Kumar opp-733334000 { 110183ad366SMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 111183ad366SMasahiro Yamada clock-latency-ns = <300>; 112183ad366SMasahiro Yamada }; 1133fc9a121SViresh Kumar opp-1000000000 { 114183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 115183ad366SMasahiro Yamada clock-latency-ns = <300>; 116183ad366SMasahiro Yamada }; 1173fc9a121SViresh Kumar opp-1100000000 { 118183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 119183ad366SMasahiro Yamada clock-latency-ns = <300>; 120183ad366SMasahiro Yamada }; 121183ad366SMasahiro Yamada }; 122183ad366SMasahiro Yamada 1239cd7d03fSMasahiro Yamada cluster1_opp: opp-table1 { 124183ad366SMasahiro Yamada compatible = "operating-points-v2"; 125183ad366SMasahiro Yamada opp-shared; 126183ad366SMasahiro Yamada 1273fc9a121SViresh Kumar opp-250000000 { 128183ad366SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 129183ad366SMasahiro Yamada clock-latency-ns = <300>; 130183ad366SMasahiro Yamada }; 1313fc9a121SViresh Kumar opp-275000000 { 132183ad366SMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 133183ad366SMasahiro Yamada clock-latency-ns = <300>; 134183ad366SMasahiro Yamada }; 1353fc9a121SViresh Kumar opp-500000000 { 136183ad366SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 137183ad366SMasahiro Yamada clock-latency-ns = <300>; 138183ad366SMasahiro Yamada }; 1393fc9a121SViresh Kumar opp-550000000 { 140183ad366SMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 141183ad366SMasahiro Yamada clock-latency-ns = <300>; 142183ad366SMasahiro Yamada }; 1433fc9a121SViresh Kumar opp-666667000 { 144183ad366SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 145183ad366SMasahiro Yamada clock-latency-ns = <300>; 146183ad366SMasahiro Yamada }; 1473fc9a121SViresh Kumar opp-733334000 { 148183ad366SMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 149183ad366SMasahiro Yamada clock-latency-ns = <300>; 150183ad366SMasahiro Yamada }; 1513fc9a121SViresh Kumar opp-1000000000 { 152183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 153183ad366SMasahiro Yamada clock-latency-ns = <300>; 154183ad366SMasahiro Yamada }; 1553fc9a121SViresh Kumar opp-1100000000 { 156183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 157183ad366SMasahiro Yamada clock-latency-ns = <300>; 158cea59bd0SMasahiro Yamada }; 159cea59bd0SMasahiro Yamada }; 160cea59bd0SMasahiro Yamada 1612f81137fSMasahiro Yamada psci { 1622f81137fSMasahiro Yamada compatible = "arm,psci-1.0"; 1632f81137fSMasahiro Yamada method = "smc"; 1642f81137fSMasahiro Yamada }; 1652f81137fSMasahiro Yamada 166cea59bd0SMasahiro Yamada clocks { 167cea59bd0SMasahiro Yamada refclk: ref { 168cea59bd0SMasahiro Yamada compatible = "fixed-clock"; 169cea59bd0SMasahiro Yamada #clock-cells = <0>; 170cea59bd0SMasahiro Yamada clock-frequency = <25000000>; 171cea59bd0SMasahiro Yamada }; 172cea59bd0SMasahiro Yamada }; 173cea59bd0SMasahiro Yamada 174b6e5ec20SMasahiro Yamada emmc_pwrseq: emmc-pwrseq { 175b6e5ec20SMasahiro Yamada compatible = "mmc-pwrseq-emmc"; 1768311ca57SMasahiro Yamada reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>; 177b6e5ec20SMasahiro Yamada }; 178b6e5ec20SMasahiro Yamada 179cea59bd0SMasahiro Yamada timer { 180cea59bd0SMasahiro Yamada compatible = "arm,armv8-timer"; 18137179033SArnd Bergmann interrupts = <1 13 4>, 18237179033SArnd Bergmann <1 14 4>, 18337179033SArnd Bergmann <1 11 4>, 18437179033SArnd Bergmann <1 10 4>; 185cea59bd0SMasahiro Yamada }; 186cea59bd0SMasahiro Yamada 187dba74980SKunihiko Hayashi thermal-zones { 188dba74980SKunihiko Hayashi cpu-thermal { 189dba74980SKunihiko Hayashi polling-delay-passive = <250>; /* 250ms */ 190dba74980SKunihiko Hayashi polling-delay = <1000>; /* 1000ms */ 191dba74980SKunihiko Hayashi thermal-sensors = <&pvtctl>; 192dba74980SKunihiko Hayashi 193dba74980SKunihiko Hayashi trips { 194dba74980SKunihiko Hayashi cpu_crit: cpu-crit { 195dba74980SKunihiko Hayashi temperature = <110000>; /* 110C */ 196dba74980SKunihiko Hayashi hysteresis = <2000>; 197dba74980SKunihiko Hayashi type = "critical"; 198dba74980SKunihiko Hayashi }; 199dba74980SKunihiko Hayashi cpu_alert: cpu-alert { 200dba74980SKunihiko Hayashi temperature = <100000>; /* 100C */ 201dba74980SKunihiko Hayashi hysteresis = <2000>; 202dba74980SKunihiko Hayashi type = "passive"; 203dba74980SKunihiko Hayashi }; 204dba74980SKunihiko Hayashi }; 205dba74980SKunihiko Hayashi 206dba74980SKunihiko Hayashi cooling-maps { 207dba74980SKunihiko Hayashi map0 { 208dba74980SKunihiko Hayashi trip = <&cpu_alert>; 209dba74980SKunihiko Hayashi cooling-device = <&cpu0 210dba74980SKunihiko Hayashi THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 211dba74980SKunihiko Hayashi }; 212dba74980SKunihiko Hayashi map1 { 213dba74980SKunihiko Hayashi trip = <&cpu_alert>; 214dba74980SKunihiko Hayashi cooling-device = <&cpu2 215dba74980SKunihiko Hayashi THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 216dba74980SKunihiko Hayashi }; 217dba74980SKunihiko Hayashi }; 218dba74980SKunihiko Hayashi }; 219dba74980SKunihiko Hayashi }; 220dba74980SKunihiko Hayashi 221b5027603SMasahiro Yamada soc@0 { 222cea59bd0SMasahiro Yamada compatible = "simple-bus"; 223cea59bd0SMasahiro Yamada #address-cells = <1>; 224cea59bd0SMasahiro Yamada #size-cells = <1>; 225cea59bd0SMasahiro Yamada ranges = <0 0 0 0xffffffff>; 226cea59bd0SMasahiro Yamada 227925c5c32SKunihiko Hayashi spi0: spi@54006000 { 228925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 229925c5c32SKunihiko Hayashi status = "disabled"; 230925c5c32SKunihiko Hayashi reg = <0x54006000 0x100>; 231925c5c32SKunihiko Hayashi interrupts = <0 39 4>; 232925c5c32SKunihiko Hayashi pinctrl-names = "default"; 233925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi0>; 234925c5c32SKunihiko Hayashi clocks = <&peri_clk 11>; 235925c5c32SKunihiko Hayashi resets = <&peri_rst 11>; 236925c5c32SKunihiko Hayashi }; 237925c5c32SKunihiko Hayashi 238925c5c32SKunihiko Hayashi spi1: spi@54006100 { 239925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 240925c5c32SKunihiko Hayashi status = "disabled"; 241925c5c32SKunihiko Hayashi reg = <0x54006100 0x100>; 242925c5c32SKunihiko Hayashi interrupts = <0 216 4>; 243925c5c32SKunihiko Hayashi pinctrl-names = "default"; 244925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi1>; 245925c5c32SKunihiko Hayashi clocks = <&peri_clk 11>; 246925c5c32SKunihiko Hayashi resets = <&peri_rst 11>; 247925c5c32SKunihiko Hayashi }; 248925c5c32SKunihiko Hayashi 249925c5c32SKunihiko Hayashi spi2: spi@54006200 { 250925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 251925c5c32SKunihiko Hayashi status = "disabled"; 252925c5c32SKunihiko Hayashi reg = <0x54006200 0x100>; 253925c5c32SKunihiko Hayashi interrupts = <0 229 4>; 254925c5c32SKunihiko Hayashi pinctrl-names = "default"; 255925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi2>; 256925c5c32SKunihiko Hayashi clocks = <&peri_clk 11>; 257925c5c32SKunihiko Hayashi resets = <&peri_rst 11>; 258925c5c32SKunihiko Hayashi }; 259925c5c32SKunihiko Hayashi 260925c5c32SKunihiko Hayashi spi3: spi@54006300 { 261925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 262925c5c32SKunihiko Hayashi status = "disabled"; 263925c5c32SKunihiko Hayashi reg = <0x54006300 0x100>; 264925c5c32SKunihiko Hayashi interrupts = <0 230 4>; 265925c5c32SKunihiko Hayashi pinctrl-names = "default"; 266925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi3>; 267925c5c32SKunihiko Hayashi clocks = <&peri_clk 11>; 268925c5c32SKunihiko Hayashi resets = <&peri_rst 11>; 269925c5c32SKunihiko Hayashi }; 270925c5c32SKunihiko Hayashi 271cea59bd0SMasahiro Yamada serial0: serial@54006800 { 272cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 273cea59bd0SMasahiro Yamada status = "disabled"; 274cea59bd0SMasahiro Yamada reg = <0x54006800 0x40>; 275cea59bd0SMasahiro Yamada interrupts = <0 33 4>; 276cea59bd0SMasahiro Yamada pinctrl-names = "default"; 277cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 27842aee275SMasahiro Yamada clocks = <&peri_clk 0>; 27976c48e1eSMasahiro Yamada resets = <&peri_rst 0>; 280cea59bd0SMasahiro Yamada }; 281cea59bd0SMasahiro Yamada 282cea59bd0SMasahiro Yamada serial1: serial@54006900 { 283cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 284cea59bd0SMasahiro Yamada status = "disabled"; 285cea59bd0SMasahiro Yamada reg = <0x54006900 0x40>; 286cea59bd0SMasahiro Yamada interrupts = <0 35 4>; 287cea59bd0SMasahiro Yamada pinctrl-names = "default"; 288cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 28942aee275SMasahiro Yamada clocks = <&peri_clk 1>; 29076c48e1eSMasahiro Yamada resets = <&peri_rst 1>; 291cea59bd0SMasahiro Yamada }; 292cea59bd0SMasahiro Yamada 293cea59bd0SMasahiro Yamada serial2: serial@54006a00 { 294cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 295cea59bd0SMasahiro Yamada status = "disabled"; 296cea59bd0SMasahiro Yamada reg = <0x54006a00 0x40>; 297cea59bd0SMasahiro Yamada interrupts = <0 37 4>; 298cea59bd0SMasahiro Yamada pinctrl-names = "default"; 299cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 30042aee275SMasahiro Yamada clocks = <&peri_clk 2>; 30176c48e1eSMasahiro Yamada resets = <&peri_rst 2>; 302cea59bd0SMasahiro Yamada }; 303cea59bd0SMasahiro Yamada 304cea59bd0SMasahiro Yamada serial3: serial@54006b00 { 305cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 306cea59bd0SMasahiro Yamada status = "disabled"; 307cea59bd0SMasahiro Yamada reg = <0x54006b00 0x40>; 308cea59bd0SMasahiro Yamada interrupts = <0 177 4>; 309cea59bd0SMasahiro Yamada pinctrl-names = "default"; 310cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 31142aee275SMasahiro Yamada clocks = <&peri_clk 3>; 31276c48e1eSMasahiro Yamada resets = <&peri_rst 3>; 313cea59bd0SMasahiro Yamada }; 314cea59bd0SMasahiro Yamada 315277b51e7SMasahiro Yamada gpio: gpio@55000000 { 316277b51e7SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 317277b51e7SMasahiro Yamada reg = <0x55000000 0x200>; 318277b51e7SMasahiro Yamada interrupt-parent = <&aidet>; 319277b51e7SMasahiro Yamada interrupt-controller; 320277b51e7SMasahiro Yamada #interrupt-cells = <2>; 321277b51e7SMasahiro Yamada gpio-controller; 322277b51e7SMasahiro Yamada #gpio-cells = <2>; 323277b51e7SMasahiro Yamada gpio-ranges = <&pinctrl 0 0 0>, 324277b51e7SMasahiro Yamada <&pinctrl 96 0 0>, 325277b51e7SMasahiro Yamada <&pinctrl 160 0 0>; 326277b51e7SMasahiro Yamada gpio-ranges-group-names = "gpio_range0", 327277b51e7SMasahiro Yamada "gpio_range1", 328277b51e7SMasahiro Yamada "gpio_range2"; 329277b51e7SMasahiro Yamada ngpios = <205>; 330277b51e7SMasahiro Yamada socionext,interrupt-ranges = <0 48 16>, <16 154 5>, 331277b51e7SMasahiro Yamada <21 217 3>; 332277b51e7SMasahiro Yamada }; 333277b51e7SMasahiro Yamada 334fb21a0acSKatsuhiro Suzuki audio@56000000 { 335fb21a0acSKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-aio"; 336fb21a0acSKatsuhiro Suzuki reg = <0x56000000 0x80000>; 337fb21a0acSKatsuhiro Suzuki interrupts = <0 144 4>; 338fb21a0acSKatsuhiro Suzuki pinctrl-names = "default"; 339fb21a0acSKatsuhiro Suzuki pinctrl-0 = <&pinctrl_aout1>, 340fb21a0acSKatsuhiro Suzuki <&pinctrl_aoutiec1>; 341fb21a0acSKatsuhiro Suzuki clock-names = "aio"; 342fb21a0acSKatsuhiro Suzuki clocks = <&sys_clk 40>; 343fb21a0acSKatsuhiro Suzuki reset-names = "aio"; 344fb21a0acSKatsuhiro Suzuki resets = <&sys_rst 40>; 345fb21a0acSKatsuhiro Suzuki #sound-dai-cells = <1>; 3466c35921dSKatsuhiro Suzuki socionext,syscon = <&soc_glue>; 347fb21a0acSKatsuhiro Suzuki 348fb21a0acSKatsuhiro Suzuki i2s_port0: port@0 { 349fb21a0acSKatsuhiro Suzuki i2s_hdmi: endpoint { 350fb21a0acSKatsuhiro Suzuki }; 351fb21a0acSKatsuhiro Suzuki }; 352fb21a0acSKatsuhiro Suzuki 353fb21a0acSKatsuhiro Suzuki i2s_port1: port@1 { 354fb21a0acSKatsuhiro Suzuki i2s_pcmin2: endpoint { 355fb21a0acSKatsuhiro Suzuki }; 356fb21a0acSKatsuhiro Suzuki }; 357fb21a0acSKatsuhiro Suzuki 358fb21a0acSKatsuhiro Suzuki i2s_port2: port@2 { 359fb21a0acSKatsuhiro Suzuki i2s_line: endpoint { 360fb21a0acSKatsuhiro Suzuki dai-format = "i2s"; 361fb21a0acSKatsuhiro Suzuki remote-endpoint = <&evea_line>; 362fb21a0acSKatsuhiro Suzuki }; 363fb21a0acSKatsuhiro Suzuki }; 364fb21a0acSKatsuhiro Suzuki 365fb21a0acSKatsuhiro Suzuki i2s_port3: port@3 { 366fb21a0acSKatsuhiro Suzuki i2s_hpcmout1: endpoint { 367fb21a0acSKatsuhiro Suzuki }; 368fb21a0acSKatsuhiro Suzuki }; 369fb21a0acSKatsuhiro Suzuki 370fb21a0acSKatsuhiro Suzuki i2s_port4: port@4 { 371fb21a0acSKatsuhiro Suzuki i2s_hp: endpoint { 372fb21a0acSKatsuhiro Suzuki dai-format = "i2s"; 373fb21a0acSKatsuhiro Suzuki remote-endpoint = <&evea_hp>; 374fb21a0acSKatsuhiro Suzuki }; 375fb21a0acSKatsuhiro Suzuki }; 376fb21a0acSKatsuhiro Suzuki 377fb21a0acSKatsuhiro Suzuki spdif_port0: port@5 { 378fb21a0acSKatsuhiro Suzuki spdif_hiecout1: endpoint { 379fb21a0acSKatsuhiro Suzuki }; 380fb21a0acSKatsuhiro Suzuki }; 381fb21a0acSKatsuhiro Suzuki 382fb21a0acSKatsuhiro Suzuki src_port0: port@6 { 383fb21a0acSKatsuhiro Suzuki i2s_epcmout2: endpoint { 384fb21a0acSKatsuhiro Suzuki }; 385fb21a0acSKatsuhiro Suzuki }; 386fb21a0acSKatsuhiro Suzuki 387fb21a0acSKatsuhiro Suzuki src_port1: port@7 { 388fb21a0acSKatsuhiro Suzuki i2s_epcmout3: endpoint { 389fb21a0acSKatsuhiro Suzuki }; 390fb21a0acSKatsuhiro Suzuki }; 391fb21a0acSKatsuhiro Suzuki 392fb21a0acSKatsuhiro Suzuki comp_spdif_port0: port@8 { 393fb21a0acSKatsuhiro Suzuki comp_spdif_hiecout1: endpoint { 394fb21a0acSKatsuhiro Suzuki }; 395fb21a0acSKatsuhiro Suzuki }; 396fb21a0acSKatsuhiro Suzuki }; 397fb21a0acSKatsuhiro Suzuki 398fb21a0acSKatsuhiro Suzuki codec@57900000 { 399fb21a0acSKatsuhiro Suzuki compatible = "socionext,uniphier-evea"; 400fb21a0acSKatsuhiro Suzuki reg = <0x57900000 0x1000>; 401fb21a0acSKatsuhiro Suzuki clock-names = "evea", "exiv"; 402fb21a0acSKatsuhiro Suzuki clocks = <&sys_clk 41>, <&sys_clk 42>; 403fb21a0acSKatsuhiro Suzuki reset-names = "evea", "exiv", "adamv"; 404fb21a0acSKatsuhiro Suzuki resets = <&sys_rst 41>, <&sys_rst 42>, <&adamv_rst 0>; 405fb21a0acSKatsuhiro Suzuki #sound-dai-cells = <1>; 406fb21a0acSKatsuhiro Suzuki 407fb21a0acSKatsuhiro Suzuki port@0 { 408fb21a0acSKatsuhiro Suzuki evea_line: endpoint { 409fb21a0acSKatsuhiro Suzuki remote-endpoint = <&i2s_line>; 410fb21a0acSKatsuhiro Suzuki }; 411fb21a0acSKatsuhiro Suzuki }; 412fb21a0acSKatsuhiro Suzuki 413fb21a0acSKatsuhiro Suzuki port@1 { 414fb21a0acSKatsuhiro Suzuki evea_hp: endpoint { 415fb21a0acSKatsuhiro Suzuki remote-endpoint = <&i2s_hp>; 416fb21a0acSKatsuhiro Suzuki }; 417fb21a0acSKatsuhiro Suzuki }; 418fb21a0acSKatsuhiro Suzuki }; 419fb21a0acSKatsuhiro Suzuki 420178b3568SKatsuhiro Suzuki adamv@57920000 { 421178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-adamv", 422178b3568SKatsuhiro Suzuki "simple-mfd", "syscon"; 423178b3568SKatsuhiro Suzuki reg = <0x57920000 0x1000>; 424178b3568SKatsuhiro Suzuki 425178b3568SKatsuhiro Suzuki adamv_rst: reset { 426178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-adamv-reset"; 427178b3568SKatsuhiro Suzuki #reset-cells = <1>; 428178b3568SKatsuhiro Suzuki }; 429178b3568SKatsuhiro Suzuki }; 430178b3568SKatsuhiro Suzuki 431cea59bd0SMasahiro Yamada i2c0: i2c@58780000 { 432cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 433cea59bd0SMasahiro Yamada status = "disabled"; 434cea59bd0SMasahiro Yamada reg = <0x58780000 0x80>; 435cea59bd0SMasahiro Yamada #address-cells = <1>; 436cea59bd0SMasahiro Yamada #size-cells = <0>; 437cea59bd0SMasahiro Yamada interrupts = <0 41 4>; 438cea59bd0SMasahiro Yamada pinctrl-names = "default"; 439cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 44042aee275SMasahiro Yamada clocks = <&peri_clk 4>; 44176c48e1eSMasahiro Yamada resets = <&peri_rst 4>; 442cea59bd0SMasahiro Yamada clock-frequency = <100000>; 443cea59bd0SMasahiro Yamada }; 444cea59bd0SMasahiro Yamada 445cea59bd0SMasahiro Yamada i2c1: i2c@58781000 { 446cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 447cea59bd0SMasahiro Yamada status = "disabled"; 448cea59bd0SMasahiro Yamada reg = <0x58781000 0x80>; 449cea59bd0SMasahiro Yamada #address-cells = <1>; 450cea59bd0SMasahiro Yamada #size-cells = <0>; 451cea59bd0SMasahiro Yamada interrupts = <0 42 4>; 452cea59bd0SMasahiro Yamada pinctrl-names = "default"; 453cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 45442aee275SMasahiro Yamada clocks = <&peri_clk 5>; 45576c48e1eSMasahiro Yamada resets = <&peri_rst 5>; 456cea59bd0SMasahiro Yamada clock-frequency = <100000>; 457cea59bd0SMasahiro Yamada }; 458cea59bd0SMasahiro Yamada 459cea59bd0SMasahiro Yamada i2c2: i2c@58782000 { 460cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 461cea59bd0SMasahiro Yamada reg = <0x58782000 0x80>; 462cea59bd0SMasahiro Yamada #address-cells = <1>; 463cea59bd0SMasahiro Yamada #size-cells = <0>; 464cea59bd0SMasahiro Yamada interrupts = <0 43 4>; 46542aee275SMasahiro Yamada clocks = <&peri_clk 6>; 46676c48e1eSMasahiro Yamada resets = <&peri_rst 6>; 467cea59bd0SMasahiro Yamada clock-frequency = <400000>; 468cea59bd0SMasahiro Yamada }; 469cea59bd0SMasahiro Yamada 470cea59bd0SMasahiro Yamada i2c3: i2c@58783000 { 471cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 472cea59bd0SMasahiro Yamada status = "disabled"; 473cea59bd0SMasahiro Yamada reg = <0x58783000 0x80>; 474cea59bd0SMasahiro Yamada #address-cells = <1>; 475cea59bd0SMasahiro Yamada #size-cells = <0>; 476cea59bd0SMasahiro Yamada interrupts = <0 44 4>; 477cea59bd0SMasahiro Yamada pinctrl-names = "default"; 478cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 47942aee275SMasahiro Yamada clocks = <&peri_clk 7>; 48076c48e1eSMasahiro Yamada resets = <&peri_rst 7>; 481cea59bd0SMasahiro Yamada clock-frequency = <100000>; 482cea59bd0SMasahiro Yamada }; 483cea59bd0SMasahiro Yamada 484cea59bd0SMasahiro Yamada i2c4: i2c@58784000 { 485cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 486cea59bd0SMasahiro Yamada status = "disabled"; 487cea59bd0SMasahiro Yamada reg = <0x58784000 0x80>; 488cea59bd0SMasahiro Yamada #address-cells = <1>; 489cea59bd0SMasahiro Yamada #size-cells = <0>; 490cea59bd0SMasahiro Yamada interrupts = <0 45 4>; 491cea59bd0SMasahiro Yamada pinctrl-names = "default"; 492cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c4>; 49342aee275SMasahiro Yamada clocks = <&peri_clk 8>; 49476c48e1eSMasahiro Yamada resets = <&peri_rst 8>; 495cea59bd0SMasahiro Yamada clock-frequency = <100000>; 496cea59bd0SMasahiro Yamada }; 497cea59bd0SMasahiro Yamada 498cea59bd0SMasahiro Yamada i2c5: i2c@58785000 { 499cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 500cea59bd0SMasahiro Yamada reg = <0x58785000 0x80>; 501cea59bd0SMasahiro Yamada #address-cells = <1>; 502cea59bd0SMasahiro Yamada #size-cells = <0>; 503cea59bd0SMasahiro Yamada interrupts = <0 25 4>; 50442aee275SMasahiro Yamada clocks = <&peri_clk 9>; 50576c48e1eSMasahiro Yamada resets = <&peri_rst 9>; 506cea59bd0SMasahiro Yamada clock-frequency = <400000>; 507cea59bd0SMasahiro Yamada }; 508cea59bd0SMasahiro Yamada 509cea59bd0SMasahiro Yamada system_bus: system-bus@58c00000 { 510cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 511cea59bd0SMasahiro Yamada status = "disabled"; 512cea59bd0SMasahiro Yamada reg = <0x58c00000 0x400>; 513cea59bd0SMasahiro Yamada #address-cells = <2>; 514cea59bd0SMasahiro Yamada #size-cells = <1>; 5155d9a83c9SMasahiro Yamada pinctrl-names = "default"; 5165d9a83c9SMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 517cea59bd0SMasahiro Yamada }; 518cea59bd0SMasahiro Yamada 519b10ee7e3SMasahiro Yamada smpctrl@59801000 { 520cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 521cea59bd0SMasahiro Yamada reg = <0x59801000 0x400>; 522cea59bd0SMasahiro Yamada }; 523cea59bd0SMasahiro Yamada 5248e68c65dSMasahiro Yamada sdctrl@59810000 { 5258e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sdctrl", 52642aee275SMasahiro Yamada "simple-mfd", "syscon"; 527555861fbSMasahiro Yamada reg = <0x59810000 0x400>; 52842aee275SMasahiro Yamada 5298e68c65dSMasahiro Yamada sd_clk: clock { 5308e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-clock"; 53142aee275SMasahiro Yamada #clock-cells = <1>; 53242aee275SMasahiro Yamada }; 53342aee275SMasahiro Yamada 5348e68c65dSMasahiro Yamada sd_rst: reset { 5358e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-reset"; 53642aee275SMasahiro Yamada #reset-cells = <1>; 53742aee275SMasahiro Yamada }; 53842aee275SMasahiro Yamada }; 53942aee275SMasahiro Yamada 54042aee275SMasahiro Yamada perictrl@59820000 { 541fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-perictrl", 54242aee275SMasahiro Yamada "simple-mfd", "syscon"; 54342aee275SMasahiro Yamada reg = <0x59820000 0x200>; 54442aee275SMasahiro Yamada 54542aee275SMasahiro Yamada peri_clk: clock { 54642aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-clock"; 54742aee275SMasahiro Yamada #clock-cells = <1>; 54842aee275SMasahiro Yamada }; 54942aee275SMasahiro Yamada 55042aee275SMasahiro Yamada peri_rst: reset { 55142aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-reset"; 55242aee275SMasahiro Yamada #reset-cells = <1>; 55342aee275SMasahiro Yamada }; 55442aee275SMasahiro Yamada }; 55542aee275SMasahiro Yamada 5563a93cc26SMasahiro Yamada emmc: sdhc@5a000000 { 5573a93cc26SMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 5583a93cc26SMasahiro Yamada reg = <0x5a000000 0x400>; 5593a93cc26SMasahiro Yamada interrupts = <0 78 4>; 5609c0a9700SMasahiro Yamada pinctrl-names = "default"; 5619c0a9700SMasahiro Yamada pinctrl-0 = <&pinctrl_emmc>; 5623a93cc26SMasahiro Yamada clocks = <&sys_clk 4>; 56376c48e1eSMasahiro Yamada resets = <&sys_rst 4>; 5643a93cc26SMasahiro Yamada bus-width = <8>; 5653a93cc26SMasahiro Yamada mmc-ddr-1_8v; 5663a93cc26SMasahiro Yamada mmc-hs200-1_8v; 567b6e5ec20SMasahiro Yamada mmc-pwrseq = <&emmc_pwrseq>; 568f4e5200fSMasahiro Yamada cdns,phy-input-delay-legacy = <9>; 569ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 570ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 571e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 572e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 5733a93cc26SMasahiro Yamada }; 5743a93cc26SMasahiro Yamada 57584a9c4d5SMasahiro Yamada sd: sdhc@5a400000 { 57684a9c4d5SMasahiro Yamada compatible = "socionext,uniphier-sd-v3.1.1"; 57784a9c4d5SMasahiro Yamada status = "disabled"; 57884a9c4d5SMasahiro Yamada reg = <0x5a400000 0x800>; 57984a9c4d5SMasahiro Yamada interrupts = <0 76 4>; 58084a9c4d5SMasahiro Yamada pinctrl-names = "default"; 58184a9c4d5SMasahiro Yamada pinctrl-0 = <&pinctrl_sd>; 58284a9c4d5SMasahiro Yamada clocks = <&sd_clk 0>; 58384a9c4d5SMasahiro Yamada reset-names = "host"; 58484a9c4d5SMasahiro Yamada resets = <&sd_rst 0>; 58584a9c4d5SMasahiro Yamada bus-width = <4>; 58684a9c4d5SMasahiro Yamada cap-sd-highspeed; 58784a9c4d5SMasahiro Yamada }; 58884a9c4d5SMasahiro Yamada 5896c35921dSKatsuhiro Suzuki soc_glue: soc-glue@5f800000 { 590fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-soc-glue", 5919d4f5505SMasahiro Yamada "simple-mfd", "syscon"; 592cea59bd0SMasahiro Yamada reg = <0x5f800000 0x2000>; 593cea59bd0SMasahiro Yamada 594cea59bd0SMasahiro Yamada pinctrl: pinctrl { 595cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20-pinctrl"; 596cea59bd0SMasahiro Yamada }; 597cea59bd0SMasahiro Yamada }; 598cea59bd0SMasahiro Yamada 599f05851e1SKeiji Hayashibara soc-glue@5f900000 { 600f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-ld20-soc-glue-debug", 601f05851e1SKeiji Hayashibara "simple-mfd"; 602f05851e1SKeiji Hayashibara #address-cells = <1>; 603f05851e1SKeiji Hayashibara #size-cells = <1>; 604f05851e1SKeiji Hayashibara ranges = <0 0x5f900000 0x2000>; 605f05851e1SKeiji Hayashibara 606f05851e1SKeiji Hayashibara efuse@100 { 607f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 608f05851e1SKeiji Hayashibara reg = <0x100 0x28>; 609f05851e1SKeiji Hayashibara }; 610f05851e1SKeiji Hayashibara 611f05851e1SKeiji Hayashibara efuse@200 { 612f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 613f05851e1SKeiji Hayashibara reg = <0x200 0x68>; 614f05851e1SKeiji Hayashibara }; 615f05851e1SKeiji Hayashibara }; 616f05851e1SKeiji Hayashibara 6173dfc6e98SMasahiro Yamada aidet: aidet@5fc20000 { 6183dfc6e98SMasahiro Yamada compatible = "socionext,uniphier-ld20-aidet"; 6193dfc6e98SMasahiro Yamada reg = <0x5fc20000 0x200>; 6203dfc6e98SMasahiro Yamada interrupt-controller; 6213dfc6e98SMasahiro Yamada #interrupt-cells = <2>; 6223dfc6e98SMasahiro Yamada }; 6233dfc6e98SMasahiro Yamada 624cea59bd0SMasahiro Yamada gic: interrupt-controller@5fe00000 { 625cea59bd0SMasahiro Yamada compatible = "arm,gic-v3"; 626cea59bd0SMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 627cea59bd0SMasahiro Yamada <0x5fe80000 0x80000>; /* GICR */ 628cea59bd0SMasahiro Yamada interrupt-controller; 629cea59bd0SMasahiro Yamada #interrupt-cells = <3>; 630cea59bd0SMasahiro Yamada interrupts = <1 9 4>; 631cea59bd0SMasahiro Yamada }; 63242aee275SMasahiro Yamada 63342aee275SMasahiro Yamada sysctrl@61840000 { 634fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-sysctrl", 63542aee275SMasahiro Yamada "simple-mfd", "syscon"; 6361ef64af8SMasahiro Yamada reg = <0x61840000 0x10000>; 63742aee275SMasahiro Yamada 63842aee275SMasahiro Yamada sys_clk: clock { 63942aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-clock"; 64042aee275SMasahiro Yamada #clock-cells = <1>; 64142aee275SMasahiro Yamada }; 64242aee275SMasahiro Yamada 64342aee275SMasahiro Yamada sys_rst: reset { 64442aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-reset"; 64542aee275SMasahiro Yamada #reset-cells = <1>; 64642aee275SMasahiro Yamada }; 6474c4c960aSKeiji Hayashibara 6484c4c960aSKeiji Hayashibara watchdog { 6494c4c960aSKeiji Hayashibara compatible = "socionext,uniphier-wdt"; 6504c4c960aSKeiji Hayashibara }; 651dba74980SKunihiko Hayashi 652dba74980SKunihiko Hayashi pvtctl: pvtctl { 653dba74980SKunihiko Hayashi compatible = "socionext,uniphier-ld20-thermal"; 654dba74980SKunihiko Hayashi interrupts = <0 3 4>; 655dba74980SKunihiko Hayashi #thermal-sensor-cells = <0>; 656dba74980SKunihiko Hayashi socionext,tmod-calibration = <0x0f22 0x68ee>; 657dba74980SKunihiko Hayashi }; 65842aee275SMasahiro Yamada }; 659e5aefb38SMasahiro Yamada 660c73730eeSKunihiko Hayashi eth: ethernet@65000000 { 661c73730eeSKunihiko Hayashi compatible = "socionext,uniphier-ld20-ave4"; 662c73730eeSKunihiko Hayashi status = "disabled"; 663c73730eeSKunihiko Hayashi reg = <0x65000000 0x8500>; 664c73730eeSKunihiko Hayashi interrupts = <0 66 4>; 665c73730eeSKunihiko Hayashi pinctrl-names = "default"; 666c73730eeSKunihiko Hayashi pinctrl-0 = <&pinctrl_ether_rgmii>; 667a34a464dSKunihiko Hayashi clock-names = "ether"; 668c73730eeSKunihiko Hayashi clocks = <&sys_clk 6>; 669a34a464dSKunihiko Hayashi reset-names = "ether"; 670c73730eeSKunihiko Hayashi resets = <&sys_rst 6>; 671c73730eeSKunihiko Hayashi phy-mode = "rgmii"; 672c73730eeSKunihiko Hayashi local-mac-address = [00 00 00 00 00 00]; 673b076ff8bSKunihiko Hayashi socionext,syscon-phy-mode = <&soc_glue 0>; 674c73730eeSKunihiko Hayashi 675c73730eeSKunihiko Hayashi mdio: mdio { 676c73730eeSKunihiko Hayashi #address-cells = <1>; 677c73730eeSKunihiko Hayashi #size-cells = <0>; 678c73730eeSKunihiko Hayashi }; 679c73730eeSKunihiko Hayashi }; 680c73730eeSKunihiko Hayashi 681e5aefb38SMasahiro Yamada nand: nand@68000000 { 682e5aefb38SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 683e5aefb38SMasahiro Yamada status = "disabled"; 684e5aefb38SMasahiro Yamada reg-names = "nand_data", "denali_reg"; 685e5aefb38SMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 686e5aefb38SMasahiro Yamada interrupts = <0 65 4>; 687e5aefb38SMasahiro Yamada pinctrl-names = "default"; 688e5aefb38SMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 689bae120f8SMasahiro Yamada clock-names = "nand", "nand_x", "ecc"; 690bae120f8SMasahiro Yamada clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; 69176c48e1eSMasahiro Yamada resets = <&sys_rst 2>; 692e5aefb38SMasahiro Yamada }; 693cea59bd0SMasahiro Yamada }; 694cea59bd0SMasahiro Yamada}; 695cea59bd0SMasahiro Yamada 6965740ea4eSMasahiro Yamada#include "uniphier-pinctrl.dtsi" 697fb21a0acSKatsuhiro Suzuki 698fb21a0acSKatsuhiro Suzuki&pinctrl_aout1 { 699fb21a0acSKatsuhiro Suzuki drive-strength = <4>; /* default: 3.5mA */ 700fb21a0acSKatsuhiro Suzuki 701fb21a0acSKatsuhiro Suzuki ao1dacck { 702fb21a0acSKatsuhiro Suzuki pins = "AO1DACCK"; 703fb21a0acSKatsuhiro Suzuki drive-strength = <5>; /* 5mA */ 704fb21a0acSKatsuhiro Suzuki }; 705fb21a0acSKatsuhiro Suzuki}; 706fb21a0acSKatsuhiro Suzuki 707fb21a0acSKatsuhiro Suzuki&pinctrl_aoutiec1 { 708fb21a0acSKatsuhiro Suzuki drive-strength = <4>; /* default: 3.5mA */ 709fb21a0acSKatsuhiro Suzuki 710fb21a0acSKatsuhiro Suzuki ao1arc { 711fb21a0acSKatsuhiro Suzuki pins = "AO1ARC"; 712fb21a0acSKatsuhiro Suzuki drive-strength = <11>; /* 11mA */ 713fb21a0acSKatsuhiro Suzuki }; 714fb21a0acSKatsuhiro Suzuki}; 715