105f7e3d1SMasahiro Yamada// SPDX-License-Identifier: GPL-2.0+ OR MIT 205f7e3d1SMasahiro Yamada// 305f7e3d1SMasahiro Yamada// Device Tree Source for UniPhier LD20 SoC 405f7e3d1SMasahiro Yamada// 505f7e3d1SMasahiro Yamada// Copyright (C) 2015-2016 Socionext Inc. 605f7e3d1SMasahiro Yamada// Author: Masahiro Yamada <yamada.masahiro@socionext.com> 7cea59bd0SMasahiro Yamada 8b6e5ec20SMasahiro Yamada#include <dt-bindings/gpio/gpio.h> 98311ca57SMasahiro Yamada#include <dt-bindings/gpio/uniphier-gpio.h> 10*5ba95e8eSKunihiko Hayashi#include <dt-bindings/interrupt-controller/arm-gic.h> 11dba74980SKunihiko Hayashi#include <dt-bindings/thermal/thermal.h> 12dba74980SKunihiko Hayashi 13cea59bd0SMasahiro Yamada/ { 14cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20"; 15cea59bd0SMasahiro Yamada #address-cells = <2>; 16cea59bd0SMasahiro Yamada #size-cells = <2>; 17cea59bd0SMasahiro Yamada interrupt-parent = <&gic>; 18cea59bd0SMasahiro Yamada 19cea59bd0SMasahiro Yamada cpus { 20cea59bd0SMasahiro Yamada #address-cells = <2>; 21cea59bd0SMasahiro Yamada #size-cells = <0>; 22cea59bd0SMasahiro Yamada 23cea59bd0SMasahiro Yamada cpu-map { 24cea59bd0SMasahiro Yamada cluster0 { 25cea59bd0SMasahiro Yamada core0 { 26cea59bd0SMasahiro Yamada cpu = <&cpu0>; 27cea59bd0SMasahiro Yamada }; 28cea59bd0SMasahiro Yamada core1 { 29cea59bd0SMasahiro Yamada cpu = <&cpu1>; 30cea59bd0SMasahiro Yamada }; 31cea59bd0SMasahiro Yamada }; 32cea59bd0SMasahiro Yamada 33cea59bd0SMasahiro Yamada cluster1 { 34cea59bd0SMasahiro Yamada core0 { 35cea59bd0SMasahiro Yamada cpu = <&cpu2>; 36cea59bd0SMasahiro Yamada }; 37cea59bd0SMasahiro Yamada core1 { 38cea59bd0SMasahiro Yamada cpu = <&cpu3>; 39cea59bd0SMasahiro Yamada }; 40cea59bd0SMasahiro Yamada }; 41cea59bd0SMasahiro Yamada }; 42cea59bd0SMasahiro Yamada 43cea59bd0SMasahiro Yamada cpu0: cpu@0 { 44cea59bd0SMasahiro Yamada device_type = "cpu"; 4531af04cdSRob Herring compatible = "arm,cortex-a72"; 46cea59bd0SMasahiro Yamada reg = <0 0x000>; 47183ad366SMasahiro Yamada clocks = <&sys_clk 32>; 482f81137fSMasahiro Yamada enable-method = "psci"; 49183ad366SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 50dba74980SKunihiko Hayashi #cooling-cells = <2>; 51cea59bd0SMasahiro Yamada }; 52cea59bd0SMasahiro Yamada 53cea59bd0SMasahiro Yamada cpu1: cpu@1 { 54cea59bd0SMasahiro Yamada device_type = "cpu"; 5531af04cdSRob Herring compatible = "arm,cortex-a72"; 56cea59bd0SMasahiro Yamada reg = <0 0x001>; 57183ad366SMasahiro Yamada clocks = <&sys_clk 32>; 582f81137fSMasahiro Yamada enable-method = "psci"; 59183ad366SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 60af0e09d0SViresh Kumar #cooling-cells = <2>; 61cea59bd0SMasahiro Yamada }; 62cea59bd0SMasahiro Yamada 63cea59bd0SMasahiro Yamada cpu2: cpu@100 { 64cea59bd0SMasahiro Yamada device_type = "cpu"; 6531af04cdSRob Herring compatible = "arm,cortex-a53"; 66cea59bd0SMasahiro Yamada reg = <0 0x100>; 67183ad366SMasahiro Yamada clocks = <&sys_clk 33>; 682f81137fSMasahiro Yamada enable-method = "psci"; 69183ad366SMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 70dba74980SKunihiko Hayashi #cooling-cells = <2>; 71cea59bd0SMasahiro Yamada }; 72cea59bd0SMasahiro Yamada 73cea59bd0SMasahiro Yamada cpu3: cpu@101 { 74cea59bd0SMasahiro Yamada device_type = "cpu"; 7531af04cdSRob Herring compatible = "arm,cortex-a53"; 76cea59bd0SMasahiro Yamada reg = <0 0x101>; 77183ad366SMasahiro Yamada clocks = <&sys_clk 33>; 782f81137fSMasahiro Yamada enable-method = "psci"; 79183ad366SMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 80af0e09d0SViresh Kumar #cooling-cells = <2>; 81183ad366SMasahiro Yamada }; 82183ad366SMasahiro Yamada }; 83183ad366SMasahiro Yamada 849cd7d03fSMasahiro Yamada cluster0_opp: opp-table0 { 85183ad366SMasahiro Yamada compatible = "operating-points-v2"; 86183ad366SMasahiro Yamada opp-shared; 87183ad366SMasahiro Yamada 883fc9a121SViresh Kumar opp-250000000 { 89183ad366SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 90183ad366SMasahiro Yamada clock-latency-ns = <300>; 91183ad366SMasahiro Yamada }; 923fc9a121SViresh Kumar opp-275000000 { 93183ad366SMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 94183ad366SMasahiro Yamada clock-latency-ns = <300>; 95183ad366SMasahiro Yamada }; 963fc9a121SViresh Kumar opp-500000000 { 97183ad366SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 98183ad366SMasahiro Yamada clock-latency-ns = <300>; 99183ad366SMasahiro Yamada }; 1003fc9a121SViresh Kumar opp-550000000 { 101183ad366SMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 102183ad366SMasahiro Yamada clock-latency-ns = <300>; 103183ad366SMasahiro Yamada }; 1043fc9a121SViresh Kumar opp-666667000 { 105183ad366SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 106183ad366SMasahiro Yamada clock-latency-ns = <300>; 107183ad366SMasahiro Yamada }; 1083fc9a121SViresh Kumar opp-733334000 { 109183ad366SMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 110183ad366SMasahiro Yamada clock-latency-ns = <300>; 111183ad366SMasahiro Yamada }; 1123fc9a121SViresh Kumar opp-1000000000 { 113183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 114183ad366SMasahiro Yamada clock-latency-ns = <300>; 115183ad366SMasahiro Yamada }; 1163fc9a121SViresh Kumar opp-1100000000 { 117183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 118183ad366SMasahiro Yamada clock-latency-ns = <300>; 119183ad366SMasahiro Yamada }; 120183ad366SMasahiro Yamada }; 121183ad366SMasahiro Yamada 1229cd7d03fSMasahiro Yamada cluster1_opp: opp-table1 { 123183ad366SMasahiro Yamada compatible = "operating-points-v2"; 124183ad366SMasahiro Yamada opp-shared; 125183ad366SMasahiro Yamada 1263fc9a121SViresh Kumar opp-250000000 { 127183ad366SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 128183ad366SMasahiro Yamada clock-latency-ns = <300>; 129183ad366SMasahiro Yamada }; 1303fc9a121SViresh Kumar opp-275000000 { 131183ad366SMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 132183ad366SMasahiro Yamada clock-latency-ns = <300>; 133183ad366SMasahiro Yamada }; 1343fc9a121SViresh Kumar opp-500000000 { 135183ad366SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 136183ad366SMasahiro Yamada clock-latency-ns = <300>; 137183ad366SMasahiro Yamada }; 1383fc9a121SViresh Kumar opp-550000000 { 139183ad366SMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 140183ad366SMasahiro Yamada clock-latency-ns = <300>; 141183ad366SMasahiro Yamada }; 1423fc9a121SViresh Kumar opp-666667000 { 143183ad366SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 144183ad366SMasahiro Yamada clock-latency-ns = <300>; 145183ad366SMasahiro Yamada }; 1463fc9a121SViresh Kumar opp-733334000 { 147183ad366SMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 148183ad366SMasahiro Yamada clock-latency-ns = <300>; 149183ad366SMasahiro Yamada }; 1503fc9a121SViresh Kumar opp-1000000000 { 151183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 152183ad366SMasahiro Yamada clock-latency-ns = <300>; 153183ad366SMasahiro Yamada }; 1543fc9a121SViresh Kumar opp-1100000000 { 155183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 156183ad366SMasahiro Yamada clock-latency-ns = <300>; 157cea59bd0SMasahiro Yamada }; 158cea59bd0SMasahiro Yamada }; 159cea59bd0SMasahiro Yamada 1602f81137fSMasahiro Yamada psci { 1612f81137fSMasahiro Yamada compatible = "arm,psci-1.0"; 1622f81137fSMasahiro Yamada method = "smc"; 1632f81137fSMasahiro Yamada }; 1642f81137fSMasahiro Yamada 165cea59bd0SMasahiro Yamada clocks { 166cea59bd0SMasahiro Yamada refclk: ref { 167cea59bd0SMasahiro Yamada compatible = "fixed-clock"; 168cea59bd0SMasahiro Yamada #clock-cells = <0>; 169cea59bd0SMasahiro Yamada clock-frequency = <25000000>; 170cea59bd0SMasahiro Yamada }; 171cea59bd0SMasahiro Yamada }; 172cea59bd0SMasahiro Yamada 173b6e5ec20SMasahiro Yamada emmc_pwrseq: emmc-pwrseq { 174b6e5ec20SMasahiro Yamada compatible = "mmc-pwrseq-emmc"; 1758311ca57SMasahiro Yamada reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>; 176b6e5ec20SMasahiro Yamada }; 177b6e5ec20SMasahiro Yamada 178cea59bd0SMasahiro Yamada timer { 179cea59bd0SMasahiro Yamada compatible = "arm,armv8-timer"; 180*5ba95e8eSKunihiko Hayashi interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>, 181*5ba95e8eSKunihiko Hayashi <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>, 182*5ba95e8eSKunihiko Hayashi <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>, 183*5ba95e8eSKunihiko Hayashi <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>; 184cea59bd0SMasahiro Yamada }; 185cea59bd0SMasahiro Yamada 186dba74980SKunihiko Hayashi thermal-zones { 187dba74980SKunihiko Hayashi cpu-thermal { 188dba74980SKunihiko Hayashi polling-delay-passive = <250>; /* 250ms */ 189dba74980SKunihiko Hayashi polling-delay = <1000>; /* 1000ms */ 190dba74980SKunihiko Hayashi thermal-sensors = <&pvtctl>; 191dba74980SKunihiko Hayashi 192dba74980SKunihiko Hayashi trips { 193dba74980SKunihiko Hayashi cpu_crit: cpu-crit { 194dba74980SKunihiko Hayashi temperature = <110000>; /* 110C */ 195dba74980SKunihiko Hayashi hysteresis = <2000>; 196dba74980SKunihiko Hayashi type = "critical"; 197dba74980SKunihiko Hayashi }; 198dba74980SKunihiko Hayashi cpu_alert: cpu-alert { 199dba74980SKunihiko Hayashi temperature = <100000>; /* 100C */ 200dba74980SKunihiko Hayashi hysteresis = <2000>; 201dba74980SKunihiko Hayashi type = "passive"; 202dba74980SKunihiko Hayashi }; 203dba74980SKunihiko Hayashi }; 204dba74980SKunihiko Hayashi 205dba74980SKunihiko Hayashi cooling-maps { 206dba74980SKunihiko Hayashi map0 { 207dba74980SKunihiko Hayashi trip = <&cpu_alert>; 208072ae88aSViresh Kumar cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 209072ae88aSViresh Kumar <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 210072ae88aSViresh Kumar <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 211072ae88aSViresh Kumar <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 212dba74980SKunihiko Hayashi }; 213dba74980SKunihiko Hayashi }; 214dba74980SKunihiko Hayashi }; 215dba74980SKunihiko Hayashi }; 216dba74980SKunihiko Hayashi 217aa385712SMasahiro Yamada reserved-memory { 218aa385712SMasahiro Yamada #address-cells = <2>; 219aa385712SMasahiro Yamada #size-cells = <2>; 220aa385712SMasahiro Yamada ranges; 221aa385712SMasahiro Yamada 222aa385712SMasahiro Yamada secure-memory@81000000 { 223aa385712SMasahiro Yamada reg = <0x0 0x81000000 0x0 0x01000000>; 224aa385712SMasahiro Yamada no-map; 225aa385712SMasahiro Yamada }; 226aa385712SMasahiro Yamada }; 227aa385712SMasahiro Yamada 228b5027603SMasahiro Yamada soc@0 { 229cea59bd0SMasahiro Yamada compatible = "simple-bus"; 230cea59bd0SMasahiro Yamada #address-cells = <1>; 231cea59bd0SMasahiro Yamada #size-cells = <1>; 232cea59bd0SMasahiro Yamada ranges = <0 0 0 0xffffffff>; 233cea59bd0SMasahiro Yamada 234925c5c32SKunihiko Hayashi spi0: spi@54006000 { 235925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 236925c5c32SKunihiko Hayashi status = "disabled"; 237925c5c32SKunihiko Hayashi reg = <0x54006000 0x100>; 2381a13827bSMasahiro Yamada #address-cells = <1>; 2391a13827bSMasahiro Yamada #size-cells = <0>; 240*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 241925c5c32SKunihiko Hayashi pinctrl-names = "default"; 242925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi0>; 243925c5c32SKunihiko Hayashi clocks = <&peri_clk 11>; 244925c5c32SKunihiko Hayashi resets = <&peri_rst 11>; 245925c5c32SKunihiko Hayashi }; 246925c5c32SKunihiko Hayashi 247925c5c32SKunihiko Hayashi spi1: spi@54006100 { 248925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 249925c5c32SKunihiko Hayashi status = "disabled"; 250925c5c32SKunihiko Hayashi reg = <0x54006100 0x100>; 2511a13827bSMasahiro Yamada #address-cells = <1>; 2521a13827bSMasahiro Yamada #size-cells = <0>; 253*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>; 254925c5c32SKunihiko Hayashi pinctrl-names = "default"; 255925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi1>; 256fdf9c17bSKunihiko Hayashi clocks = <&peri_clk 12>; 257fdf9c17bSKunihiko Hayashi resets = <&peri_rst 12>; 258925c5c32SKunihiko Hayashi }; 259925c5c32SKunihiko Hayashi 260925c5c32SKunihiko Hayashi spi2: spi@54006200 { 261925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 262925c5c32SKunihiko Hayashi status = "disabled"; 263925c5c32SKunihiko Hayashi reg = <0x54006200 0x100>; 2641a13827bSMasahiro Yamada #address-cells = <1>; 2651a13827bSMasahiro Yamada #size-cells = <0>; 266*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; 267925c5c32SKunihiko Hayashi pinctrl-names = "default"; 268925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi2>; 269fdf9c17bSKunihiko Hayashi clocks = <&peri_clk 13>; 270fdf9c17bSKunihiko Hayashi resets = <&peri_rst 13>; 271925c5c32SKunihiko Hayashi }; 272925c5c32SKunihiko Hayashi 273925c5c32SKunihiko Hayashi spi3: spi@54006300 { 274925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 275925c5c32SKunihiko Hayashi status = "disabled"; 276925c5c32SKunihiko Hayashi reg = <0x54006300 0x100>; 2771a13827bSMasahiro Yamada #address-cells = <1>; 2781a13827bSMasahiro Yamada #size-cells = <0>; 279*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>; 280925c5c32SKunihiko Hayashi pinctrl-names = "default"; 281925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi3>; 282fdf9c17bSKunihiko Hayashi clocks = <&peri_clk 14>; 283fdf9c17bSKunihiko Hayashi resets = <&peri_rst 14>; 284925c5c32SKunihiko Hayashi }; 285925c5c32SKunihiko Hayashi 286cea59bd0SMasahiro Yamada serial0: serial@54006800 { 287cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 288cea59bd0SMasahiro Yamada status = "disabled"; 289cea59bd0SMasahiro Yamada reg = <0x54006800 0x40>; 290*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 291cea59bd0SMasahiro Yamada pinctrl-names = "default"; 292cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 29342aee275SMasahiro Yamada clocks = <&peri_clk 0>; 29476c48e1eSMasahiro Yamada resets = <&peri_rst 0>; 295cea59bd0SMasahiro Yamada }; 296cea59bd0SMasahiro Yamada 297cea59bd0SMasahiro Yamada serial1: serial@54006900 { 298cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 299cea59bd0SMasahiro Yamada status = "disabled"; 300cea59bd0SMasahiro Yamada reg = <0x54006900 0x40>; 301*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 302cea59bd0SMasahiro Yamada pinctrl-names = "default"; 303cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 30442aee275SMasahiro Yamada clocks = <&peri_clk 1>; 30576c48e1eSMasahiro Yamada resets = <&peri_rst 1>; 306cea59bd0SMasahiro Yamada }; 307cea59bd0SMasahiro Yamada 308cea59bd0SMasahiro Yamada serial2: serial@54006a00 { 309cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 310cea59bd0SMasahiro Yamada status = "disabled"; 311cea59bd0SMasahiro Yamada reg = <0x54006a00 0x40>; 312*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 313cea59bd0SMasahiro Yamada pinctrl-names = "default"; 314cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 31542aee275SMasahiro Yamada clocks = <&peri_clk 2>; 31676c48e1eSMasahiro Yamada resets = <&peri_rst 2>; 317cea59bd0SMasahiro Yamada }; 318cea59bd0SMasahiro Yamada 319cea59bd0SMasahiro Yamada serial3: serial@54006b00 { 320cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 321cea59bd0SMasahiro Yamada status = "disabled"; 322cea59bd0SMasahiro Yamada reg = <0x54006b00 0x40>; 323*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; 324cea59bd0SMasahiro Yamada pinctrl-names = "default"; 325cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 32642aee275SMasahiro Yamada clocks = <&peri_clk 3>; 32776c48e1eSMasahiro Yamada resets = <&peri_rst 3>; 328cea59bd0SMasahiro Yamada }; 329cea59bd0SMasahiro Yamada 330277b51e7SMasahiro Yamada gpio: gpio@55000000 { 331277b51e7SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 332277b51e7SMasahiro Yamada reg = <0x55000000 0x200>; 333277b51e7SMasahiro Yamada interrupt-parent = <&aidet>; 334277b51e7SMasahiro Yamada interrupt-controller; 335277b51e7SMasahiro Yamada #interrupt-cells = <2>; 336277b51e7SMasahiro Yamada gpio-controller; 337277b51e7SMasahiro Yamada #gpio-cells = <2>; 338277b51e7SMasahiro Yamada gpio-ranges = <&pinctrl 0 0 0>, 339277b51e7SMasahiro Yamada <&pinctrl 96 0 0>, 340277b51e7SMasahiro Yamada <&pinctrl 160 0 0>; 341277b51e7SMasahiro Yamada gpio-ranges-group-names = "gpio_range0", 342277b51e7SMasahiro Yamada "gpio_range1", 343277b51e7SMasahiro Yamada "gpio_range2"; 344277b51e7SMasahiro Yamada ngpios = <205>; 345277b51e7SMasahiro Yamada socionext,interrupt-ranges = <0 48 16>, <16 154 5>, 346277b51e7SMasahiro Yamada <21 217 3>; 347277b51e7SMasahiro Yamada }; 348277b51e7SMasahiro Yamada 349fb21a0acSKatsuhiro Suzuki audio@56000000 { 350fb21a0acSKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-aio"; 351fb21a0acSKatsuhiro Suzuki reg = <0x56000000 0x80000>; 352*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 353fb21a0acSKatsuhiro Suzuki pinctrl-names = "default"; 354fb21a0acSKatsuhiro Suzuki pinctrl-0 = <&pinctrl_aout1>, 355fb21a0acSKatsuhiro Suzuki <&pinctrl_aoutiec1>; 356fb21a0acSKatsuhiro Suzuki clock-names = "aio"; 357fb21a0acSKatsuhiro Suzuki clocks = <&sys_clk 40>; 358fb21a0acSKatsuhiro Suzuki reset-names = "aio"; 359fb21a0acSKatsuhiro Suzuki resets = <&sys_rst 40>; 360fb21a0acSKatsuhiro Suzuki #sound-dai-cells = <1>; 3616c35921dSKatsuhiro Suzuki socionext,syscon = <&soc_glue>; 362fb21a0acSKatsuhiro Suzuki 363fb21a0acSKatsuhiro Suzuki i2s_port0: port@0 { 364fb21a0acSKatsuhiro Suzuki i2s_hdmi: endpoint { 365fb21a0acSKatsuhiro Suzuki }; 366fb21a0acSKatsuhiro Suzuki }; 367fb21a0acSKatsuhiro Suzuki 368fb21a0acSKatsuhiro Suzuki i2s_port1: port@1 { 369fb21a0acSKatsuhiro Suzuki i2s_pcmin2: endpoint { 370fb21a0acSKatsuhiro Suzuki }; 371fb21a0acSKatsuhiro Suzuki }; 372fb21a0acSKatsuhiro Suzuki 373fb21a0acSKatsuhiro Suzuki i2s_port2: port@2 { 374fb21a0acSKatsuhiro Suzuki i2s_line: endpoint { 375fb21a0acSKatsuhiro Suzuki dai-format = "i2s"; 376fb21a0acSKatsuhiro Suzuki remote-endpoint = <&evea_line>; 377fb21a0acSKatsuhiro Suzuki }; 378fb21a0acSKatsuhiro Suzuki }; 379fb21a0acSKatsuhiro Suzuki 380fb21a0acSKatsuhiro Suzuki i2s_port3: port@3 { 381fb21a0acSKatsuhiro Suzuki i2s_hpcmout1: endpoint { 382fb21a0acSKatsuhiro Suzuki }; 383fb21a0acSKatsuhiro Suzuki }; 384fb21a0acSKatsuhiro Suzuki 385fb21a0acSKatsuhiro Suzuki i2s_port4: port@4 { 386fb21a0acSKatsuhiro Suzuki i2s_hp: endpoint { 387fb21a0acSKatsuhiro Suzuki dai-format = "i2s"; 388fb21a0acSKatsuhiro Suzuki remote-endpoint = <&evea_hp>; 389fb21a0acSKatsuhiro Suzuki }; 390fb21a0acSKatsuhiro Suzuki }; 391fb21a0acSKatsuhiro Suzuki 392fb21a0acSKatsuhiro Suzuki spdif_port0: port@5 { 393fb21a0acSKatsuhiro Suzuki spdif_hiecout1: endpoint { 394fb21a0acSKatsuhiro Suzuki }; 395fb21a0acSKatsuhiro Suzuki }; 396fb21a0acSKatsuhiro Suzuki 397fb21a0acSKatsuhiro Suzuki src_port0: port@6 { 398fb21a0acSKatsuhiro Suzuki i2s_epcmout2: endpoint { 399fb21a0acSKatsuhiro Suzuki }; 400fb21a0acSKatsuhiro Suzuki }; 401fb21a0acSKatsuhiro Suzuki 402fb21a0acSKatsuhiro Suzuki src_port1: port@7 { 403fb21a0acSKatsuhiro Suzuki i2s_epcmout3: endpoint { 404fb21a0acSKatsuhiro Suzuki }; 405fb21a0acSKatsuhiro Suzuki }; 406fb21a0acSKatsuhiro Suzuki 407fb21a0acSKatsuhiro Suzuki comp_spdif_port0: port@8 { 408fb21a0acSKatsuhiro Suzuki comp_spdif_hiecout1: endpoint { 409fb21a0acSKatsuhiro Suzuki }; 410fb21a0acSKatsuhiro Suzuki }; 411fb21a0acSKatsuhiro Suzuki }; 412fb21a0acSKatsuhiro Suzuki 413fb21a0acSKatsuhiro Suzuki codec@57900000 { 414fb21a0acSKatsuhiro Suzuki compatible = "socionext,uniphier-evea"; 415fb21a0acSKatsuhiro Suzuki reg = <0x57900000 0x1000>; 416fb21a0acSKatsuhiro Suzuki clock-names = "evea", "exiv"; 417fb21a0acSKatsuhiro Suzuki clocks = <&sys_clk 41>, <&sys_clk 42>; 418fb21a0acSKatsuhiro Suzuki reset-names = "evea", "exiv", "adamv"; 419fb21a0acSKatsuhiro Suzuki resets = <&sys_rst 41>, <&sys_rst 42>, <&adamv_rst 0>; 420fb21a0acSKatsuhiro Suzuki #sound-dai-cells = <1>; 421fb21a0acSKatsuhiro Suzuki 422fb21a0acSKatsuhiro Suzuki port@0 { 423fb21a0acSKatsuhiro Suzuki evea_line: endpoint { 424fb21a0acSKatsuhiro Suzuki remote-endpoint = <&i2s_line>; 425fb21a0acSKatsuhiro Suzuki }; 426fb21a0acSKatsuhiro Suzuki }; 427fb21a0acSKatsuhiro Suzuki 428fb21a0acSKatsuhiro Suzuki port@1 { 429fb21a0acSKatsuhiro Suzuki evea_hp: endpoint { 430fb21a0acSKatsuhiro Suzuki remote-endpoint = <&i2s_hp>; 431fb21a0acSKatsuhiro Suzuki }; 432fb21a0acSKatsuhiro Suzuki }; 433fb21a0acSKatsuhiro Suzuki }; 434fb21a0acSKatsuhiro Suzuki 435178b3568SKatsuhiro Suzuki adamv@57920000 { 436178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-adamv", 437178b3568SKatsuhiro Suzuki "simple-mfd", "syscon"; 438178b3568SKatsuhiro Suzuki reg = <0x57920000 0x1000>; 439178b3568SKatsuhiro Suzuki 440178b3568SKatsuhiro Suzuki adamv_rst: reset { 441178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-adamv-reset"; 442178b3568SKatsuhiro Suzuki #reset-cells = <1>; 443178b3568SKatsuhiro Suzuki }; 444178b3568SKatsuhiro Suzuki }; 445178b3568SKatsuhiro Suzuki 446cea59bd0SMasahiro Yamada i2c0: i2c@58780000 { 447cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 448cea59bd0SMasahiro Yamada status = "disabled"; 449cea59bd0SMasahiro Yamada reg = <0x58780000 0x80>; 450cea59bd0SMasahiro Yamada #address-cells = <1>; 451cea59bd0SMasahiro Yamada #size-cells = <0>; 452*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 453cea59bd0SMasahiro Yamada pinctrl-names = "default"; 454cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 45542aee275SMasahiro Yamada clocks = <&peri_clk 4>; 45676c48e1eSMasahiro Yamada resets = <&peri_rst 4>; 457cea59bd0SMasahiro Yamada clock-frequency = <100000>; 458cea59bd0SMasahiro Yamada }; 459cea59bd0SMasahiro Yamada 460cea59bd0SMasahiro Yamada i2c1: i2c@58781000 { 461cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 462cea59bd0SMasahiro Yamada status = "disabled"; 463cea59bd0SMasahiro Yamada reg = <0x58781000 0x80>; 464cea59bd0SMasahiro Yamada #address-cells = <1>; 465cea59bd0SMasahiro Yamada #size-cells = <0>; 466*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; 467cea59bd0SMasahiro Yamada pinctrl-names = "default"; 468cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 46942aee275SMasahiro Yamada clocks = <&peri_clk 5>; 47076c48e1eSMasahiro Yamada resets = <&peri_rst 5>; 471cea59bd0SMasahiro Yamada clock-frequency = <100000>; 472cea59bd0SMasahiro Yamada }; 473cea59bd0SMasahiro Yamada 474cea59bd0SMasahiro Yamada i2c2: i2c@58782000 { 475cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 476cea59bd0SMasahiro Yamada reg = <0x58782000 0x80>; 477cea59bd0SMasahiro Yamada #address-cells = <1>; 478cea59bd0SMasahiro Yamada #size-cells = <0>; 479*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 48042aee275SMasahiro Yamada clocks = <&peri_clk 6>; 48176c48e1eSMasahiro Yamada resets = <&peri_rst 6>; 482cea59bd0SMasahiro Yamada clock-frequency = <400000>; 483cea59bd0SMasahiro Yamada }; 484cea59bd0SMasahiro Yamada 485cea59bd0SMasahiro Yamada i2c3: i2c@58783000 { 486cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 487cea59bd0SMasahiro Yamada status = "disabled"; 488cea59bd0SMasahiro Yamada reg = <0x58783000 0x80>; 489cea59bd0SMasahiro Yamada #address-cells = <1>; 490cea59bd0SMasahiro Yamada #size-cells = <0>; 491*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 492cea59bd0SMasahiro Yamada pinctrl-names = "default"; 493cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 49442aee275SMasahiro Yamada clocks = <&peri_clk 7>; 49576c48e1eSMasahiro Yamada resets = <&peri_rst 7>; 496cea59bd0SMasahiro Yamada clock-frequency = <100000>; 497cea59bd0SMasahiro Yamada }; 498cea59bd0SMasahiro Yamada 499cea59bd0SMasahiro Yamada i2c4: i2c@58784000 { 500cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 501cea59bd0SMasahiro Yamada status = "disabled"; 502cea59bd0SMasahiro Yamada reg = <0x58784000 0x80>; 503cea59bd0SMasahiro Yamada #address-cells = <1>; 504cea59bd0SMasahiro Yamada #size-cells = <0>; 505*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 506cea59bd0SMasahiro Yamada pinctrl-names = "default"; 507cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c4>; 50842aee275SMasahiro Yamada clocks = <&peri_clk 8>; 50976c48e1eSMasahiro Yamada resets = <&peri_rst 8>; 510cea59bd0SMasahiro Yamada clock-frequency = <100000>; 511cea59bd0SMasahiro Yamada }; 512cea59bd0SMasahiro Yamada 513cea59bd0SMasahiro Yamada i2c5: i2c@58785000 { 514cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 515cea59bd0SMasahiro Yamada reg = <0x58785000 0x80>; 516cea59bd0SMasahiro Yamada #address-cells = <1>; 517cea59bd0SMasahiro Yamada #size-cells = <0>; 518*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 51942aee275SMasahiro Yamada clocks = <&peri_clk 9>; 52076c48e1eSMasahiro Yamada resets = <&peri_rst 9>; 521cea59bd0SMasahiro Yamada clock-frequency = <400000>; 522cea59bd0SMasahiro Yamada }; 523cea59bd0SMasahiro Yamada 524cea59bd0SMasahiro Yamada system_bus: system-bus@58c00000 { 525cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 526cea59bd0SMasahiro Yamada status = "disabled"; 527cea59bd0SMasahiro Yamada reg = <0x58c00000 0x400>; 528cea59bd0SMasahiro Yamada #address-cells = <2>; 529cea59bd0SMasahiro Yamada #size-cells = <1>; 5305d9a83c9SMasahiro Yamada pinctrl-names = "default"; 5315d9a83c9SMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 532cea59bd0SMasahiro Yamada }; 533cea59bd0SMasahiro Yamada 534b10ee7e3SMasahiro Yamada smpctrl@59801000 { 535cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 536cea59bd0SMasahiro Yamada reg = <0x59801000 0x400>; 537cea59bd0SMasahiro Yamada }; 538cea59bd0SMasahiro Yamada 5398e68c65dSMasahiro Yamada sdctrl@59810000 { 5408e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sdctrl", 54142aee275SMasahiro Yamada "simple-mfd", "syscon"; 542555861fbSMasahiro Yamada reg = <0x59810000 0x400>; 54342aee275SMasahiro Yamada 5448e68c65dSMasahiro Yamada sd_clk: clock { 5458e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-clock"; 54642aee275SMasahiro Yamada #clock-cells = <1>; 54742aee275SMasahiro Yamada }; 54842aee275SMasahiro Yamada 5498e68c65dSMasahiro Yamada sd_rst: reset { 5508e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-reset"; 55142aee275SMasahiro Yamada #reset-cells = <1>; 55242aee275SMasahiro Yamada }; 55342aee275SMasahiro Yamada }; 55442aee275SMasahiro Yamada 55542aee275SMasahiro Yamada perictrl@59820000 { 556fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-perictrl", 55742aee275SMasahiro Yamada "simple-mfd", "syscon"; 55842aee275SMasahiro Yamada reg = <0x59820000 0x200>; 55942aee275SMasahiro Yamada 56042aee275SMasahiro Yamada peri_clk: clock { 56142aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-clock"; 56242aee275SMasahiro Yamada #clock-cells = <1>; 56342aee275SMasahiro Yamada }; 56442aee275SMasahiro Yamada 56542aee275SMasahiro Yamada peri_rst: reset { 56642aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-reset"; 56742aee275SMasahiro Yamada #reset-cells = <1>; 56842aee275SMasahiro Yamada }; 56942aee275SMasahiro Yamada }; 57042aee275SMasahiro Yamada 571bb3f4672SMasahiro Yamada emmc: mmc@5a000000 { 5723a93cc26SMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 5733a93cc26SMasahiro Yamada reg = <0x5a000000 0x400>; 574*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 5759c0a9700SMasahiro Yamada pinctrl-names = "default"; 5769c0a9700SMasahiro Yamada pinctrl-0 = <&pinctrl_emmc>; 5773a93cc26SMasahiro Yamada clocks = <&sys_clk 4>; 57876c48e1eSMasahiro Yamada resets = <&sys_rst 4>; 5793a93cc26SMasahiro Yamada bus-width = <8>; 5803a93cc26SMasahiro Yamada mmc-ddr-1_8v; 5813a93cc26SMasahiro Yamada mmc-hs200-1_8v; 582b6e5ec20SMasahiro Yamada mmc-pwrseq = <&emmc_pwrseq>; 583f4e5200fSMasahiro Yamada cdns,phy-input-delay-legacy = <9>; 584ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 585ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 586e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 587e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 5883a93cc26SMasahiro Yamada }; 5893a93cc26SMasahiro Yamada 590bb3f4672SMasahiro Yamada sd: mmc@5a400000 { 59184a9c4d5SMasahiro Yamada compatible = "socionext,uniphier-sd-v3.1.1"; 59284a9c4d5SMasahiro Yamada status = "disabled"; 59384a9c4d5SMasahiro Yamada reg = <0x5a400000 0x800>; 594*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 59584a9c4d5SMasahiro Yamada pinctrl-names = "default"; 59684a9c4d5SMasahiro Yamada pinctrl-0 = <&pinctrl_sd>; 59784a9c4d5SMasahiro Yamada clocks = <&sd_clk 0>; 59884a9c4d5SMasahiro Yamada reset-names = "host"; 59984a9c4d5SMasahiro Yamada resets = <&sd_rst 0>; 60084a9c4d5SMasahiro Yamada bus-width = <4>; 60184a9c4d5SMasahiro Yamada cap-sd-highspeed; 60284a9c4d5SMasahiro Yamada }; 60384a9c4d5SMasahiro Yamada 6046c35921dSKatsuhiro Suzuki soc_glue: soc-glue@5f800000 { 605fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-soc-glue", 6069d4f5505SMasahiro Yamada "simple-mfd", "syscon"; 607cea59bd0SMasahiro Yamada reg = <0x5f800000 0x2000>; 608cea59bd0SMasahiro Yamada 609cea59bd0SMasahiro Yamada pinctrl: pinctrl { 610cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20-pinctrl"; 611cea59bd0SMasahiro Yamada }; 612cea59bd0SMasahiro Yamada }; 613cea59bd0SMasahiro Yamada 614f05851e1SKeiji Hayashibara soc-glue@5f900000 { 615f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-ld20-soc-glue-debug", 616f05851e1SKeiji Hayashibara "simple-mfd"; 617f05851e1SKeiji Hayashibara #address-cells = <1>; 618f05851e1SKeiji Hayashibara #size-cells = <1>; 619f05851e1SKeiji Hayashibara ranges = <0 0x5f900000 0x2000>; 620f05851e1SKeiji Hayashibara 621f05851e1SKeiji Hayashibara efuse@100 { 622f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 623f05851e1SKeiji Hayashibara reg = <0x100 0x28>; 624f05851e1SKeiji Hayashibara }; 625f05851e1SKeiji Hayashibara 626f05851e1SKeiji Hayashibara efuse@200 { 627f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 628f05851e1SKeiji Hayashibara reg = <0x200 0x68>; 629d7b9beb8SKunihiko Hayashi #address-cells = <1>; 630d7b9beb8SKunihiko Hayashi #size-cells = <1>; 631d7b9beb8SKunihiko Hayashi 632d7b9beb8SKunihiko Hayashi /* USB cells */ 633d7b9beb8SKunihiko Hayashi usb_rterm0: trim@54,4 { 634d7b9beb8SKunihiko Hayashi reg = <0x54 1>; 635d7b9beb8SKunihiko Hayashi bits = <4 2>; 636d7b9beb8SKunihiko Hayashi }; 637d7b9beb8SKunihiko Hayashi usb_rterm1: trim@55,4 { 638d7b9beb8SKunihiko Hayashi reg = <0x55 1>; 639d7b9beb8SKunihiko Hayashi bits = <4 2>; 640d7b9beb8SKunihiko Hayashi }; 641d7b9beb8SKunihiko Hayashi usb_rterm2: trim@58,4 { 642d7b9beb8SKunihiko Hayashi reg = <0x58 1>; 643d7b9beb8SKunihiko Hayashi bits = <4 2>; 644d7b9beb8SKunihiko Hayashi }; 645d7b9beb8SKunihiko Hayashi usb_rterm3: trim@59,4 { 646d7b9beb8SKunihiko Hayashi reg = <0x59 1>; 647d7b9beb8SKunihiko Hayashi bits = <4 2>; 648d7b9beb8SKunihiko Hayashi }; 649d7b9beb8SKunihiko Hayashi usb_sel_t0: trim@54,0 { 650d7b9beb8SKunihiko Hayashi reg = <0x54 1>; 651d7b9beb8SKunihiko Hayashi bits = <0 4>; 652d7b9beb8SKunihiko Hayashi }; 653d7b9beb8SKunihiko Hayashi usb_sel_t1: trim@55,0 { 654d7b9beb8SKunihiko Hayashi reg = <0x55 1>; 655d7b9beb8SKunihiko Hayashi bits = <0 4>; 656d7b9beb8SKunihiko Hayashi }; 657d7b9beb8SKunihiko Hayashi usb_sel_t2: trim@58,0 { 658d7b9beb8SKunihiko Hayashi reg = <0x58 1>; 659d7b9beb8SKunihiko Hayashi bits = <0 4>; 660d7b9beb8SKunihiko Hayashi }; 661d7b9beb8SKunihiko Hayashi usb_sel_t3: trim@59,0 { 662d7b9beb8SKunihiko Hayashi reg = <0x59 1>; 663d7b9beb8SKunihiko Hayashi bits = <0 4>; 664d7b9beb8SKunihiko Hayashi }; 665d7b9beb8SKunihiko Hayashi usb_hs_i0: trim@56,0 { 666d7b9beb8SKunihiko Hayashi reg = <0x56 1>; 667d7b9beb8SKunihiko Hayashi bits = <0 4>; 668d7b9beb8SKunihiko Hayashi }; 669d7b9beb8SKunihiko Hayashi usb_hs_i2: trim@5a,0 { 670d7b9beb8SKunihiko Hayashi reg = <0x5a 1>; 671d7b9beb8SKunihiko Hayashi bits = <0 4>; 672d7b9beb8SKunihiko Hayashi }; 673f05851e1SKeiji Hayashibara }; 674f05851e1SKeiji Hayashibara }; 675f05851e1SKeiji Hayashibara 676f03b998dSKunihiko Hayashi xdmac: dma-controller@5fc10000 { 677f03b998dSKunihiko Hayashi compatible = "socionext,uniphier-xdmac"; 678f03b998dSKunihiko Hayashi reg = <0x5fc10000 0x5300>; 679*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 680f03b998dSKunihiko Hayashi dma-channels = <16>; 681f03b998dSKunihiko Hayashi #dma-cells = <2>; 682f03b998dSKunihiko Hayashi }; 683f03b998dSKunihiko Hayashi 6849ddc285bSMasahiro Yamada aidet: interrupt-controller@5fc20000 { 6853dfc6e98SMasahiro Yamada compatible = "socionext,uniphier-ld20-aidet"; 6863dfc6e98SMasahiro Yamada reg = <0x5fc20000 0x200>; 6873dfc6e98SMasahiro Yamada interrupt-controller; 6883dfc6e98SMasahiro Yamada #interrupt-cells = <2>; 6893dfc6e98SMasahiro Yamada }; 6903dfc6e98SMasahiro Yamada 691cea59bd0SMasahiro Yamada gic: interrupt-controller@5fe00000 { 692cea59bd0SMasahiro Yamada compatible = "arm,gic-v3"; 693cea59bd0SMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 694cea59bd0SMasahiro Yamada <0x5fe80000 0x80000>; /* GICR */ 695cea59bd0SMasahiro Yamada interrupt-controller; 696cea59bd0SMasahiro Yamada #interrupt-cells = <3>; 697*5ba95e8eSKunihiko Hayashi interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 698cea59bd0SMasahiro Yamada }; 69942aee275SMasahiro Yamada 70042aee275SMasahiro Yamada sysctrl@61840000 { 701fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-sysctrl", 70242aee275SMasahiro Yamada "simple-mfd", "syscon"; 7031ef64af8SMasahiro Yamada reg = <0x61840000 0x10000>; 70442aee275SMasahiro Yamada 70542aee275SMasahiro Yamada sys_clk: clock { 70642aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-clock"; 70742aee275SMasahiro Yamada #clock-cells = <1>; 70842aee275SMasahiro Yamada }; 70942aee275SMasahiro Yamada 71042aee275SMasahiro Yamada sys_rst: reset { 71142aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-reset"; 71242aee275SMasahiro Yamada #reset-cells = <1>; 71342aee275SMasahiro Yamada }; 7144c4c960aSKeiji Hayashibara 7154c4c960aSKeiji Hayashibara watchdog { 7164c4c960aSKeiji Hayashibara compatible = "socionext,uniphier-wdt"; 7174c4c960aSKeiji Hayashibara }; 718dba74980SKunihiko Hayashi 7192dfb62d6SKunihiko Hayashi pvtctl: thermal-sensor { 720dba74980SKunihiko Hayashi compatible = "socionext,uniphier-ld20-thermal"; 721*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 722dba74980SKunihiko Hayashi #thermal-sensor-cells = <0>; 723dba74980SKunihiko Hayashi socionext,tmod-calibration = <0x0f22 0x68ee>; 724dba74980SKunihiko Hayashi }; 72542aee275SMasahiro Yamada }; 726e5aefb38SMasahiro Yamada 727c73730eeSKunihiko Hayashi eth: ethernet@65000000 { 728c73730eeSKunihiko Hayashi compatible = "socionext,uniphier-ld20-ave4"; 729c73730eeSKunihiko Hayashi status = "disabled"; 730c73730eeSKunihiko Hayashi reg = <0x65000000 0x8500>; 731*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; 732c73730eeSKunihiko Hayashi pinctrl-names = "default"; 733c73730eeSKunihiko Hayashi pinctrl-0 = <&pinctrl_ether_rgmii>; 734a34a464dSKunihiko Hayashi clock-names = "ether"; 735c73730eeSKunihiko Hayashi clocks = <&sys_clk 6>; 736a34a464dSKunihiko Hayashi reset-names = "ether"; 737c73730eeSKunihiko Hayashi resets = <&sys_rst 6>; 738dcabb06bSKunihiko Hayashi phy-mode = "rgmii-id"; 739c73730eeSKunihiko Hayashi local-mac-address = [00 00 00 00 00 00]; 740b076ff8bSKunihiko Hayashi socionext,syscon-phy-mode = <&soc_glue 0>; 741c73730eeSKunihiko Hayashi 742c73730eeSKunihiko Hayashi mdio: mdio { 743c73730eeSKunihiko Hayashi #address-cells = <1>; 744c73730eeSKunihiko Hayashi #size-cells = <0>; 745c73730eeSKunihiko Hayashi }; 746c73730eeSKunihiko Hayashi }; 747c73730eeSKunihiko Hayashi 748d7b9beb8SKunihiko Hayashi usb: usb@65a00000 { 749d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-dwc3", "snps,dwc3"; 750d7b9beb8SKunihiko Hayashi status = "disabled"; 751d7b9beb8SKunihiko Hayashi reg = <0x65a00000 0xcd00>; 752d7b9beb8SKunihiko Hayashi interrupt-names = "host"; 753*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; 754d7b9beb8SKunihiko Hayashi pinctrl-names = "default"; 755d7b9beb8SKunihiko Hayashi pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb1>, 756d7b9beb8SKunihiko Hayashi <&pinctrl_usb2>, <&pinctrl_usb3>; 757d7b9beb8SKunihiko Hayashi clock-names = "ref", "bus_early", "suspend"; 758d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 14>, <&sys_clk 14>; 759d7b9beb8SKunihiko Hayashi resets = <&usb_rst 15>; 760d7b9beb8SKunihiko Hayashi phys = <&usb_hsphy0>, <&usb_hsphy1>, 761d7b9beb8SKunihiko Hayashi <&usb_hsphy2>, <&usb_hsphy3>, 762d7b9beb8SKunihiko Hayashi <&usb_ssphy0>, <&usb_ssphy1>; 763d7b9beb8SKunihiko Hayashi dr_mode = "host"; 764d7b9beb8SKunihiko Hayashi }; 765d7b9beb8SKunihiko Hayashi 7664cc752a8SKunihiko Hayashi usb-controller@65b00000 { 767d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-dwc3-glue", 768d7b9beb8SKunihiko Hayashi "simple-mfd"; 769d7b9beb8SKunihiko Hayashi #address-cells = <1>; 770d7b9beb8SKunihiko Hayashi #size-cells = <1>; 771d7b9beb8SKunihiko Hayashi ranges = <0 0x65b00000 0x400>; 772d7b9beb8SKunihiko Hayashi 773d7b9beb8SKunihiko Hayashi usb_rst: reset@0 { 774d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-reset"; 775d7b9beb8SKunihiko Hayashi reg = <0x0 0x4>; 776d7b9beb8SKunihiko Hayashi #reset-cells = <1>; 777d7b9beb8SKunihiko Hayashi clock-names = "link"; 778d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>; 779d7b9beb8SKunihiko Hayashi reset-names = "link"; 780d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>; 781d7b9beb8SKunihiko Hayashi }; 782d7b9beb8SKunihiko Hayashi 783d7b9beb8SKunihiko Hayashi usb_vbus0: regulator@100 { 784d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-regulator"; 785d7b9beb8SKunihiko Hayashi reg = <0x100 0x10>; 786d7b9beb8SKunihiko Hayashi clock-names = "link"; 787d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>; 788d7b9beb8SKunihiko Hayashi reset-names = "link"; 789d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>; 790d7b9beb8SKunihiko Hayashi }; 791d7b9beb8SKunihiko Hayashi 792d7b9beb8SKunihiko Hayashi usb_vbus1: regulator@110 { 793d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-regulator"; 794d7b9beb8SKunihiko Hayashi reg = <0x110 0x10>; 795d7b9beb8SKunihiko Hayashi clock-names = "link"; 796d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>; 797d7b9beb8SKunihiko Hayashi reset-names = "link"; 798d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>; 799d7b9beb8SKunihiko Hayashi }; 800d7b9beb8SKunihiko Hayashi 801d7b9beb8SKunihiko Hayashi usb_vbus2: regulator@120 { 802d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-regulator"; 803d7b9beb8SKunihiko Hayashi reg = <0x120 0x10>; 804d7b9beb8SKunihiko Hayashi clock-names = "link"; 805d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>; 806d7b9beb8SKunihiko Hayashi reset-names = "link"; 807d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>; 808d7b9beb8SKunihiko Hayashi }; 809d7b9beb8SKunihiko Hayashi 810d7b9beb8SKunihiko Hayashi usb_vbus3: regulator@130 { 811d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-regulator"; 812d7b9beb8SKunihiko Hayashi reg = <0x130 0x10>; 813d7b9beb8SKunihiko Hayashi clock-names = "link"; 814d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>; 815d7b9beb8SKunihiko Hayashi reset-names = "link"; 816d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>; 817d7b9beb8SKunihiko Hayashi }; 818d7b9beb8SKunihiko Hayashi 819d7b9beb8SKunihiko Hayashi usb_hsphy0: hs-phy@200 { 820d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-hsphy"; 821d7b9beb8SKunihiko Hayashi reg = <0x200 0x10>; 822d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 823d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 824d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 16>; 825d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 826d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 16>; 827d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus0>; 828d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 829d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm0>, <&usb_sel_t0>, 830d7b9beb8SKunihiko Hayashi <&usb_hs_i0>; 831d7b9beb8SKunihiko Hayashi }; 832d7b9beb8SKunihiko Hayashi 833d7b9beb8SKunihiko Hayashi usb_hsphy1: hs-phy@210 { 834d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-hsphy"; 835d7b9beb8SKunihiko Hayashi reg = <0x210 0x10>; 836d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 837d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 838d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 16>; 839d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 840d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 16>; 841d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus1>; 842d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 843d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm1>, <&usb_sel_t1>, 844d7b9beb8SKunihiko Hayashi <&usb_hs_i0>; 845d7b9beb8SKunihiko Hayashi }; 846d7b9beb8SKunihiko Hayashi 847d7b9beb8SKunihiko Hayashi usb_hsphy2: hs-phy@220 { 848d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-hsphy"; 849d7b9beb8SKunihiko Hayashi reg = <0x220 0x10>; 850d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 851d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 852d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 17>; 853d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 854d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 17>; 855d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus2>; 856d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 857d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm2>, <&usb_sel_t2>, 858d7b9beb8SKunihiko Hayashi <&usb_hs_i2>; 859d7b9beb8SKunihiko Hayashi }; 860d7b9beb8SKunihiko Hayashi 861d7b9beb8SKunihiko Hayashi usb_hsphy3: hs-phy@230 { 862d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-hsphy"; 863d7b9beb8SKunihiko Hayashi reg = <0x230 0x10>; 864d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 865d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 866d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 17>; 867d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 868d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 17>; 869d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus3>; 870d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 871d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm3>, <&usb_sel_t3>, 872d7b9beb8SKunihiko Hayashi <&usb_hs_i2>; 873d7b9beb8SKunihiko Hayashi }; 874d7b9beb8SKunihiko Hayashi 875d7b9beb8SKunihiko Hayashi usb_ssphy0: ss-phy@300 { 876d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-ssphy"; 877d7b9beb8SKunihiko Hayashi reg = <0x300 0x10>; 878d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 879d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 880d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 18>; 881d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 882d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 18>; 883d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus0>; 884d7b9beb8SKunihiko Hayashi }; 885d7b9beb8SKunihiko Hayashi 886d7b9beb8SKunihiko Hayashi usb_ssphy1: ss-phy@310 { 887d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-ssphy"; 888d7b9beb8SKunihiko Hayashi reg = <0x310 0x10>; 889d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 890d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 891d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 19>; 892d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 893d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 19>; 894d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus1>; 895d7b9beb8SKunihiko Hayashi }; 896d7b9beb8SKunihiko Hayashi }; 897d7b9beb8SKunihiko Hayashi 89832dfc773SKunihiko Hayashi pcie: pcie@66000000 { 89932dfc773SKunihiko Hayashi compatible = "socionext,uniphier-pcie", "snps,dw-pcie"; 90032dfc773SKunihiko Hayashi status = "disabled"; 90132dfc773SKunihiko Hayashi reg-names = "dbi", "link", "config"; 90232dfc773SKunihiko Hayashi reg = <0x66000000 0x1000>, <0x66010000 0x10000>, 90332dfc773SKunihiko Hayashi <0x2fff0000 0x10000>; 90432dfc773SKunihiko Hayashi #address-cells = <3>; 90532dfc773SKunihiko Hayashi #size-cells = <2>; 90632dfc773SKunihiko Hayashi clocks = <&sys_clk 24>; 90732dfc773SKunihiko Hayashi resets = <&sys_rst 24>; 90832dfc773SKunihiko Hayashi num-lanes = <1>; 90932dfc773SKunihiko Hayashi num-viewport = <1>; 91032dfc773SKunihiko Hayashi bus-range = <0x0 0xff>; 91132dfc773SKunihiko Hayashi device_type = "pci"; 91232dfc773SKunihiko Hayashi ranges = 91332dfc773SKunihiko Hayashi /* downstream I/O */ 91432dfc773SKunihiko Hayashi <0x81000000 0 0x00000000 0x2ffe0000 0 0x00010000>, 91532dfc773SKunihiko Hayashi /* non-prefetchable memory */ 91632dfc773SKunihiko Hayashi <0x82000000 0 0x20000000 0x20000000 0 0x0ffe0000>; 91732dfc773SKunihiko Hayashi #interrupt-cells = <1>; 91832dfc773SKunihiko Hayashi interrupt-names = "dma", "msi"; 919*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>, 920*5ba95e8eSKunihiko Hayashi <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 92132dfc773SKunihiko Hayashi interrupt-map-mask = <0 0 0 7>; 92232dfc773SKunihiko Hayashi interrupt-map = <0 0 0 1 &pcie_intc 0>, /* INTA */ 92332dfc773SKunihiko Hayashi <0 0 0 2 &pcie_intc 1>, /* INTB */ 92432dfc773SKunihiko Hayashi <0 0 0 3 &pcie_intc 2>, /* INTC */ 92532dfc773SKunihiko Hayashi <0 0 0 4 &pcie_intc 3>; /* INTD */ 92632dfc773SKunihiko Hayashi phy-names = "pcie-phy"; 92732dfc773SKunihiko Hayashi phys = <&pcie_phy>; 92832dfc773SKunihiko Hayashi 92932dfc773SKunihiko Hayashi pcie_intc: legacy-interrupt-controller { 93032dfc773SKunihiko Hayashi interrupt-controller; 93132dfc773SKunihiko Hayashi #interrupt-cells = <1>; 93232dfc773SKunihiko Hayashi interrupt-parent = <&gic>; 933*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 93432dfc773SKunihiko Hayashi }; 93532dfc773SKunihiko Hayashi }; 93632dfc773SKunihiko Hayashi 93732dfc773SKunihiko Hayashi pcie_phy: phy@66038000 { 93832dfc773SKunihiko Hayashi compatible = "socionext,uniphier-ld20-pcie-phy"; 93932dfc773SKunihiko Hayashi reg = <0x66038000 0x4000>; 94032dfc773SKunihiko Hayashi #phy-cells = <0>; 941e6bd81a2SKunihiko Hayashi clock-names = "link"; 94232dfc773SKunihiko Hayashi clocks = <&sys_clk 24>; 943e6bd81a2SKunihiko Hayashi reset-names = "link"; 94432dfc773SKunihiko Hayashi resets = <&sys_rst 24>; 94532dfc773SKunihiko Hayashi socionext,syscon = <&soc_glue>; 94632dfc773SKunihiko Hayashi }; 94732dfc773SKunihiko Hayashi 948fcb0e53cSMasahiro Yamada nand: nand-controller@68000000 { 949e5aefb38SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 950e5aefb38SMasahiro Yamada status = "disabled"; 951e5aefb38SMasahiro Yamada reg-names = "nand_data", "denali_reg"; 952e5aefb38SMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 95353c580c1SMasahiro Yamada #address-cells = <1>; 95453c580c1SMasahiro Yamada #size-cells = <0>; 955*5ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 956e5aefb38SMasahiro Yamada pinctrl-names = "default"; 957e5aefb38SMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 958bae120f8SMasahiro Yamada clock-names = "nand", "nand_x", "ecc"; 959bae120f8SMasahiro Yamada clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; 960e98d5023SMasahiro Yamada reset-names = "nand", "reg"; 961e98d5023SMasahiro Yamada resets = <&sys_rst 2>, <&sys_rst 2>; 962e5aefb38SMasahiro Yamada }; 963cea59bd0SMasahiro Yamada }; 964cea59bd0SMasahiro Yamada}; 965cea59bd0SMasahiro Yamada 9665740ea4eSMasahiro Yamada#include "uniphier-pinctrl.dtsi" 967fb21a0acSKatsuhiro Suzuki 968fb21a0acSKatsuhiro Suzuki&pinctrl_aout1 { 969fb21a0acSKatsuhiro Suzuki drive-strength = <4>; /* default: 3.5mA */ 970fb21a0acSKatsuhiro Suzuki 971fb21a0acSKatsuhiro Suzuki ao1dacck { 972fb21a0acSKatsuhiro Suzuki pins = "AO1DACCK"; 973fb21a0acSKatsuhiro Suzuki drive-strength = <5>; /* 5mA */ 974fb21a0acSKatsuhiro Suzuki }; 975fb21a0acSKatsuhiro Suzuki}; 976fb21a0acSKatsuhiro Suzuki 977fb21a0acSKatsuhiro Suzuki&pinctrl_aoutiec1 { 978fb21a0acSKatsuhiro Suzuki drive-strength = <4>; /* default: 3.5mA */ 979fb21a0acSKatsuhiro Suzuki 980fb21a0acSKatsuhiro Suzuki ao1arc { 981fb21a0acSKatsuhiro Suzuki pins = "AO1ARC"; 982fb21a0acSKatsuhiro Suzuki drive-strength = <11>; /* 11mA */ 983fb21a0acSKatsuhiro Suzuki }; 984fb21a0acSKatsuhiro Suzuki}; 985