105f7e3d1SMasahiro Yamada// SPDX-License-Identifier: GPL-2.0+ OR MIT 205f7e3d1SMasahiro Yamada// 305f7e3d1SMasahiro Yamada// Device Tree Source for UniPhier LD20 SoC 405f7e3d1SMasahiro Yamada// 505f7e3d1SMasahiro Yamada// Copyright (C) 2015-2016 Socionext Inc. 605f7e3d1SMasahiro Yamada// Author: Masahiro Yamada <yamada.masahiro@socionext.com> 7cea59bd0SMasahiro Yamada 8b6e5ec20SMasahiro Yamada#include <dt-bindings/gpio/gpio.h> 98311ca57SMasahiro Yamada#include <dt-bindings/gpio/uniphier-gpio.h> 105ba95e8eSKunihiko Hayashi#include <dt-bindings/interrupt-controller/arm-gic.h> 11dba74980SKunihiko Hayashi#include <dt-bindings/thermal/thermal.h> 12dba74980SKunihiko Hayashi 13cea59bd0SMasahiro Yamada/ { 14cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20"; 15cea59bd0SMasahiro Yamada #address-cells = <2>; 16cea59bd0SMasahiro Yamada #size-cells = <2>; 17cea59bd0SMasahiro Yamada interrupt-parent = <&gic>; 18cea59bd0SMasahiro Yamada 19cea59bd0SMasahiro Yamada cpus { 20cea59bd0SMasahiro Yamada #address-cells = <2>; 21cea59bd0SMasahiro Yamada #size-cells = <0>; 22cea59bd0SMasahiro Yamada 23cea59bd0SMasahiro Yamada cpu-map { 24cea59bd0SMasahiro Yamada cluster0 { 25cea59bd0SMasahiro Yamada core0 { 26cea59bd0SMasahiro Yamada cpu = <&cpu0>; 27cea59bd0SMasahiro Yamada }; 28cea59bd0SMasahiro Yamada core1 { 29cea59bd0SMasahiro Yamada cpu = <&cpu1>; 30cea59bd0SMasahiro Yamada }; 31cea59bd0SMasahiro Yamada }; 32cea59bd0SMasahiro Yamada 33cea59bd0SMasahiro Yamada cluster1 { 34cea59bd0SMasahiro Yamada core0 { 35cea59bd0SMasahiro Yamada cpu = <&cpu2>; 36cea59bd0SMasahiro Yamada }; 37cea59bd0SMasahiro Yamada core1 { 38cea59bd0SMasahiro Yamada cpu = <&cpu3>; 39cea59bd0SMasahiro Yamada }; 40cea59bd0SMasahiro Yamada }; 41cea59bd0SMasahiro Yamada }; 42cea59bd0SMasahiro Yamada 43cea59bd0SMasahiro Yamada cpu0: cpu@0 { 44cea59bd0SMasahiro Yamada device_type = "cpu"; 4531af04cdSRob Herring compatible = "arm,cortex-a72"; 46cea59bd0SMasahiro Yamada reg = <0 0x000>; 47183ad366SMasahiro Yamada clocks = <&sys_clk 32>; 482f81137fSMasahiro Yamada enable-method = "psci"; 49*5381a96cSKunihiko Hayashi next-level-cache = <&a72_l2>; 50183ad366SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 51dba74980SKunihiko Hayashi #cooling-cells = <2>; 52cea59bd0SMasahiro Yamada }; 53cea59bd0SMasahiro Yamada 54cea59bd0SMasahiro Yamada cpu1: cpu@1 { 55cea59bd0SMasahiro Yamada device_type = "cpu"; 5631af04cdSRob Herring compatible = "arm,cortex-a72"; 57cea59bd0SMasahiro Yamada reg = <0 0x001>; 58183ad366SMasahiro Yamada clocks = <&sys_clk 32>; 592f81137fSMasahiro Yamada enable-method = "psci"; 60*5381a96cSKunihiko Hayashi next-level-cache = <&a72_l2>; 61183ad366SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 62af0e09d0SViresh Kumar #cooling-cells = <2>; 63cea59bd0SMasahiro Yamada }; 64cea59bd0SMasahiro Yamada 65cea59bd0SMasahiro Yamada cpu2: cpu@100 { 66cea59bd0SMasahiro Yamada device_type = "cpu"; 6731af04cdSRob Herring compatible = "arm,cortex-a53"; 68cea59bd0SMasahiro Yamada reg = <0 0x100>; 69183ad366SMasahiro Yamada clocks = <&sys_clk 33>; 702f81137fSMasahiro Yamada enable-method = "psci"; 71*5381a96cSKunihiko Hayashi next-level-cache = <&a53_l2>; 72183ad366SMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 73dba74980SKunihiko Hayashi #cooling-cells = <2>; 74cea59bd0SMasahiro Yamada }; 75cea59bd0SMasahiro Yamada 76cea59bd0SMasahiro Yamada cpu3: cpu@101 { 77cea59bd0SMasahiro Yamada device_type = "cpu"; 7831af04cdSRob Herring compatible = "arm,cortex-a53"; 79cea59bd0SMasahiro Yamada reg = <0 0x101>; 80183ad366SMasahiro Yamada clocks = <&sys_clk 33>; 812f81137fSMasahiro Yamada enable-method = "psci"; 82*5381a96cSKunihiko Hayashi next-level-cache = <&a53_l2>; 83183ad366SMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 84af0e09d0SViresh Kumar #cooling-cells = <2>; 85183ad366SMasahiro Yamada }; 86*5381a96cSKunihiko Hayashi 87*5381a96cSKunihiko Hayashi a72_l2: l2-cache0 { 88*5381a96cSKunihiko Hayashi compatible = "cache"; 89*5381a96cSKunihiko Hayashi }; 90*5381a96cSKunihiko Hayashi 91*5381a96cSKunihiko Hayashi a53_l2: l2-cache1 { 92*5381a96cSKunihiko Hayashi compatible = "cache"; 93*5381a96cSKunihiko Hayashi }; 94183ad366SMasahiro Yamada }; 95183ad366SMasahiro Yamada 964ff64e70SKunihiko Hayashi cluster0_opp: opp-table-0 { 97183ad366SMasahiro Yamada compatible = "operating-points-v2"; 98183ad366SMasahiro Yamada opp-shared; 99183ad366SMasahiro Yamada 1003fc9a121SViresh Kumar opp-250000000 { 101183ad366SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 102183ad366SMasahiro Yamada clock-latency-ns = <300>; 103183ad366SMasahiro Yamada }; 1043fc9a121SViresh Kumar opp-275000000 { 105183ad366SMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 106183ad366SMasahiro Yamada clock-latency-ns = <300>; 107183ad366SMasahiro Yamada }; 1083fc9a121SViresh Kumar opp-500000000 { 109183ad366SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 110183ad366SMasahiro Yamada clock-latency-ns = <300>; 111183ad366SMasahiro Yamada }; 1123fc9a121SViresh Kumar opp-550000000 { 113183ad366SMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 114183ad366SMasahiro Yamada clock-latency-ns = <300>; 115183ad366SMasahiro Yamada }; 1163fc9a121SViresh Kumar opp-666667000 { 117183ad366SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 118183ad366SMasahiro Yamada clock-latency-ns = <300>; 119183ad366SMasahiro Yamada }; 1203fc9a121SViresh Kumar opp-733334000 { 121183ad366SMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 122183ad366SMasahiro Yamada clock-latency-ns = <300>; 123183ad366SMasahiro Yamada }; 1243fc9a121SViresh Kumar opp-1000000000 { 125183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 126183ad366SMasahiro Yamada clock-latency-ns = <300>; 127183ad366SMasahiro Yamada }; 1283fc9a121SViresh Kumar opp-1100000000 { 129183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 130183ad366SMasahiro Yamada clock-latency-ns = <300>; 131183ad366SMasahiro Yamada }; 132183ad366SMasahiro Yamada }; 133183ad366SMasahiro Yamada 1344ff64e70SKunihiko Hayashi cluster1_opp: opp-table-1 { 135183ad366SMasahiro Yamada compatible = "operating-points-v2"; 136183ad366SMasahiro Yamada opp-shared; 137183ad366SMasahiro Yamada 1383fc9a121SViresh Kumar opp-250000000 { 139183ad366SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 140183ad366SMasahiro Yamada clock-latency-ns = <300>; 141183ad366SMasahiro Yamada }; 1423fc9a121SViresh Kumar opp-275000000 { 143183ad366SMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 144183ad366SMasahiro Yamada clock-latency-ns = <300>; 145183ad366SMasahiro Yamada }; 1463fc9a121SViresh Kumar opp-500000000 { 147183ad366SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 148183ad366SMasahiro Yamada clock-latency-ns = <300>; 149183ad366SMasahiro Yamada }; 1503fc9a121SViresh Kumar opp-550000000 { 151183ad366SMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 152183ad366SMasahiro Yamada clock-latency-ns = <300>; 153183ad366SMasahiro Yamada }; 1543fc9a121SViresh Kumar opp-666667000 { 155183ad366SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 156183ad366SMasahiro Yamada clock-latency-ns = <300>; 157183ad366SMasahiro Yamada }; 1583fc9a121SViresh Kumar opp-733334000 { 159183ad366SMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 160183ad366SMasahiro Yamada clock-latency-ns = <300>; 161183ad366SMasahiro Yamada }; 1623fc9a121SViresh Kumar opp-1000000000 { 163183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 164183ad366SMasahiro Yamada clock-latency-ns = <300>; 165183ad366SMasahiro Yamada }; 1663fc9a121SViresh Kumar opp-1100000000 { 167183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 168183ad366SMasahiro Yamada clock-latency-ns = <300>; 169cea59bd0SMasahiro Yamada }; 170cea59bd0SMasahiro Yamada }; 171cea59bd0SMasahiro Yamada 1722f81137fSMasahiro Yamada psci { 1732f81137fSMasahiro Yamada compatible = "arm,psci-1.0"; 1742f81137fSMasahiro Yamada method = "smc"; 1752f81137fSMasahiro Yamada }; 1762f81137fSMasahiro Yamada 177cea59bd0SMasahiro Yamada clocks { 178cea59bd0SMasahiro Yamada refclk: ref { 179cea59bd0SMasahiro Yamada compatible = "fixed-clock"; 180cea59bd0SMasahiro Yamada #clock-cells = <0>; 181cea59bd0SMasahiro Yamada clock-frequency = <25000000>; 182cea59bd0SMasahiro Yamada }; 183cea59bd0SMasahiro Yamada }; 184cea59bd0SMasahiro Yamada 185b6e5ec20SMasahiro Yamada emmc_pwrseq: emmc-pwrseq { 186b6e5ec20SMasahiro Yamada compatible = "mmc-pwrseq-emmc"; 1878311ca57SMasahiro Yamada reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>; 188b6e5ec20SMasahiro Yamada }; 189b6e5ec20SMasahiro Yamada 190cea59bd0SMasahiro Yamada timer { 191cea59bd0SMasahiro Yamada compatible = "arm,armv8-timer"; 1925ba95e8eSKunihiko Hayashi interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>, 1935ba95e8eSKunihiko Hayashi <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>, 1945ba95e8eSKunihiko Hayashi <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>, 1955ba95e8eSKunihiko Hayashi <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>; 196cea59bd0SMasahiro Yamada }; 197cea59bd0SMasahiro Yamada 198dba74980SKunihiko Hayashi thermal-zones { 199dba74980SKunihiko Hayashi cpu-thermal { 200dba74980SKunihiko Hayashi polling-delay-passive = <250>; /* 250ms */ 201dba74980SKunihiko Hayashi polling-delay = <1000>; /* 1000ms */ 202dba74980SKunihiko Hayashi thermal-sensors = <&pvtctl>; 203dba74980SKunihiko Hayashi 204dba74980SKunihiko Hayashi trips { 205dba74980SKunihiko Hayashi cpu_crit: cpu-crit { 206dba74980SKunihiko Hayashi temperature = <110000>; /* 110C */ 207dba74980SKunihiko Hayashi hysteresis = <2000>; 208dba74980SKunihiko Hayashi type = "critical"; 209dba74980SKunihiko Hayashi }; 210dba74980SKunihiko Hayashi cpu_alert: cpu-alert { 211dba74980SKunihiko Hayashi temperature = <100000>; /* 100C */ 212dba74980SKunihiko Hayashi hysteresis = <2000>; 213dba74980SKunihiko Hayashi type = "passive"; 214dba74980SKunihiko Hayashi }; 215dba74980SKunihiko Hayashi }; 216dba74980SKunihiko Hayashi 217dba74980SKunihiko Hayashi cooling-maps { 218dba74980SKunihiko Hayashi map0 { 219dba74980SKunihiko Hayashi trip = <&cpu_alert>; 220072ae88aSViresh Kumar cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 221072ae88aSViresh Kumar <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 222072ae88aSViresh Kumar <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 223072ae88aSViresh Kumar <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 224dba74980SKunihiko Hayashi }; 225dba74980SKunihiko Hayashi }; 226dba74980SKunihiko Hayashi }; 227dba74980SKunihiko Hayashi }; 228dba74980SKunihiko Hayashi 229aa385712SMasahiro Yamada reserved-memory { 230aa385712SMasahiro Yamada #address-cells = <2>; 231aa385712SMasahiro Yamada #size-cells = <2>; 232aa385712SMasahiro Yamada ranges; 233aa385712SMasahiro Yamada 234aa385712SMasahiro Yamada secure-memory@81000000 { 235aa385712SMasahiro Yamada reg = <0x0 0x81000000 0x0 0x01000000>; 236aa385712SMasahiro Yamada no-map; 237aa385712SMasahiro Yamada }; 238aa385712SMasahiro Yamada }; 239aa385712SMasahiro Yamada 240b5027603SMasahiro Yamada soc@0 { 241cea59bd0SMasahiro Yamada compatible = "simple-bus"; 242cea59bd0SMasahiro Yamada #address-cells = <1>; 243cea59bd0SMasahiro Yamada #size-cells = <1>; 244cea59bd0SMasahiro Yamada ranges = <0 0 0 0xffffffff>; 245cea59bd0SMasahiro Yamada 246925c5c32SKunihiko Hayashi spi0: spi@54006000 { 247925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 248925c5c32SKunihiko Hayashi status = "disabled"; 249925c5c32SKunihiko Hayashi reg = <0x54006000 0x100>; 2501a13827bSMasahiro Yamada #address-cells = <1>; 2511a13827bSMasahiro Yamada #size-cells = <0>; 2525ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 253925c5c32SKunihiko Hayashi pinctrl-names = "default"; 254925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi0>; 255925c5c32SKunihiko Hayashi clocks = <&peri_clk 11>; 256925c5c32SKunihiko Hayashi resets = <&peri_rst 11>; 257925c5c32SKunihiko Hayashi }; 258925c5c32SKunihiko Hayashi 259925c5c32SKunihiko Hayashi spi1: spi@54006100 { 260925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 261925c5c32SKunihiko Hayashi status = "disabled"; 262925c5c32SKunihiko Hayashi reg = <0x54006100 0x100>; 2631a13827bSMasahiro Yamada #address-cells = <1>; 2641a13827bSMasahiro Yamada #size-cells = <0>; 2655ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>; 266925c5c32SKunihiko Hayashi pinctrl-names = "default"; 267925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi1>; 268fdf9c17bSKunihiko Hayashi clocks = <&peri_clk 12>; 269fdf9c17bSKunihiko Hayashi resets = <&peri_rst 12>; 270925c5c32SKunihiko Hayashi }; 271925c5c32SKunihiko Hayashi 272925c5c32SKunihiko Hayashi spi2: spi@54006200 { 273925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 274925c5c32SKunihiko Hayashi status = "disabled"; 275925c5c32SKunihiko Hayashi reg = <0x54006200 0x100>; 2761a13827bSMasahiro Yamada #address-cells = <1>; 2771a13827bSMasahiro Yamada #size-cells = <0>; 2785ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; 279925c5c32SKunihiko Hayashi pinctrl-names = "default"; 280925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi2>; 281fdf9c17bSKunihiko Hayashi clocks = <&peri_clk 13>; 282fdf9c17bSKunihiko Hayashi resets = <&peri_rst 13>; 283925c5c32SKunihiko Hayashi }; 284925c5c32SKunihiko Hayashi 285925c5c32SKunihiko Hayashi spi3: spi@54006300 { 286925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 287925c5c32SKunihiko Hayashi status = "disabled"; 288925c5c32SKunihiko Hayashi reg = <0x54006300 0x100>; 2891a13827bSMasahiro Yamada #address-cells = <1>; 2901a13827bSMasahiro Yamada #size-cells = <0>; 2915ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>; 292925c5c32SKunihiko Hayashi pinctrl-names = "default"; 293925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi3>; 294fdf9c17bSKunihiko Hayashi clocks = <&peri_clk 14>; 295fdf9c17bSKunihiko Hayashi resets = <&peri_rst 14>; 296925c5c32SKunihiko Hayashi }; 297925c5c32SKunihiko Hayashi 298cea59bd0SMasahiro Yamada serial0: serial@54006800 { 299cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 300cea59bd0SMasahiro Yamada status = "disabled"; 301cea59bd0SMasahiro Yamada reg = <0x54006800 0x40>; 3025ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 303cea59bd0SMasahiro Yamada pinctrl-names = "default"; 304cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 30542aee275SMasahiro Yamada clocks = <&peri_clk 0>; 30676c48e1eSMasahiro Yamada resets = <&peri_rst 0>; 307cea59bd0SMasahiro Yamada }; 308cea59bd0SMasahiro Yamada 309cea59bd0SMasahiro Yamada serial1: serial@54006900 { 310cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 311cea59bd0SMasahiro Yamada status = "disabled"; 312cea59bd0SMasahiro Yamada reg = <0x54006900 0x40>; 3135ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 314cea59bd0SMasahiro Yamada pinctrl-names = "default"; 315cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 31642aee275SMasahiro Yamada clocks = <&peri_clk 1>; 31776c48e1eSMasahiro Yamada resets = <&peri_rst 1>; 318cea59bd0SMasahiro Yamada }; 319cea59bd0SMasahiro Yamada 320cea59bd0SMasahiro Yamada serial2: serial@54006a00 { 321cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 322cea59bd0SMasahiro Yamada status = "disabled"; 323cea59bd0SMasahiro Yamada reg = <0x54006a00 0x40>; 3245ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 325cea59bd0SMasahiro Yamada pinctrl-names = "default"; 326cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 32742aee275SMasahiro Yamada clocks = <&peri_clk 2>; 32876c48e1eSMasahiro Yamada resets = <&peri_rst 2>; 329cea59bd0SMasahiro Yamada }; 330cea59bd0SMasahiro Yamada 331cea59bd0SMasahiro Yamada serial3: serial@54006b00 { 332cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 333cea59bd0SMasahiro Yamada status = "disabled"; 334cea59bd0SMasahiro Yamada reg = <0x54006b00 0x40>; 3355ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; 336cea59bd0SMasahiro Yamada pinctrl-names = "default"; 337cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 33842aee275SMasahiro Yamada clocks = <&peri_clk 3>; 33976c48e1eSMasahiro Yamada resets = <&peri_rst 3>; 340cea59bd0SMasahiro Yamada }; 341cea59bd0SMasahiro Yamada 342277b51e7SMasahiro Yamada gpio: gpio@55000000 { 343277b51e7SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 344277b51e7SMasahiro Yamada reg = <0x55000000 0x200>; 345277b51e7SMasahiro Yamada interrupt-parent = <&aidet>; 346277b51e7SMasahiro Yamada interrupt-controller; 347277b51e7SMasahiro Yamada #interrupt-cells = <2>; 348277b51e7SMasahiro Yamada gpio-controller; 349277b51e7SMasahiro Yamada #gpio-cells = <2>; 350277b51e7SMasahiro Yamada gpio-ranges = <&pinctrl 0 0 0>, 351277b51e7SMasahiro Yamada <&pinctrl 96 0 0>, 352277b51e7SMasahiro Yamada <&pinctrl 160 0 0>; 353277b51e7SMasahiro Yamada gpio-ranges-group-names = "gpio_range0", 354277b51e7SMasahiro Yamada "gpio_range1", 355277b51e7SMasahiro Yamada "gpio_range2"; 356277b51e7SMasahiro Yamada ngpios = <205>; 357277b51e7SMasahiro Yamada socionext,interrupt-ranges = <0 48 16>, <16 154 5>, 358277b51e7SMasahiro Yamada <21 217 3>; 359277b51e7SMasahiro Yamada }; 360277b51e7SMasahiro Yamada 361fb21a0acSKatsuhiro Suzuki audio@56000000 { 362fb21a0acSKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-aio"; 363fb21a0acSKatsuhiro Suzuki reg = <0x56000000 0x80000>; 3645ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 365fb21a0acSKatsuhiro Suzuki pinctrl-names = "default"; 366fb21a0acSKatsuhiro Suzuki pinctrl-0 = <&pinctrl_aout1>, 367fb21a0acSKatsuhiro Suzuki <&pinctrl_aoutiec1>; 368fb21a0acSKatsuhiro Suzuki clock-names = "aio"; 369fb21a0acSKatsuhiro Suzuki clocks = <&sys_clk 40>; 370fb21a0acSKatsuhiro Suzuki reset-names = "aio"; 371fb21a0acSKatsuhiro Suzuki resets = <&sys_rst 40>; 372fb21a0acSKatsuhiro Suzuki #sound-dai-cells = <1>; 3736c35921dSKatsuhiro Suzuki socionext,syscon = <&soc_glue>; 374fb21a0acSKatsuhiro Suzuki 375fb21a0acSKatsuhiro Suzuki i2s_port0: port@0 { 376fb21a0acSKatsuhiro Suzuki i2s_hdmi: endpoint { 377fb21a0acSKatsuhiro Suzuki }; 378fb21a0acSKatsuhiro Suzuki }; 379fb21a0acSKatsuhiro Suzuki 380fb21a0acSKatsuhiro Suzuki i2s_port1: port@1 { 381fb21a0acSKatsuhiro Suzuki i2s_pcmin2: endpoint { 382fb21a0acSKatsuhiro Suzuki }; 383fb21a0acSKatsuhiro Suzuki }; 384fb21a0acSKatsuhiro Suzuki 385fb21a0acSKatsuhiro Suzuki i2s_port2: port@2 { 386fb21a0acSKatsuhiro Suzuki i2s_line: endpoint { 387fb21a0acSKatsuhiro Suzuki dai-format = "i2s"; 388fb21a0acSKatsuhiro Suzuki remote-endpoint = <&evea_line>; 389fb21a0acSKatsuhiro Suzuki }; 390fb21a0acSKatsuhiro Suzuki }; 391fb21a0acSKatsuhiro Suzuki 392fb21a0acSKatsuhiro Suzuki i2s_port3: port@3 { 393fb21a0acSKatsuhiro Suzuki i2s_hpcmout1: endpoint { 394fb21a0acSKatsuhiro Suzuki }; 395fb21a0acSKatsuhiro Suzuki }; 396fb21a0acSKatsuhiro Suzuki 397fb21a0acSKatsuhiro Suzuki i2s_port4: port@4 { 398fb21a0acSKatsuhiro Suzuki i2s_hp: endpoint { 399fb21a0acSKatsuhiro Suzuki dai-format = "i2s"; 400fb21a0acSKatsuhiro Suzuki remote-endpoint = <&evea_hp>; 401fb21a0acSKatsuhiro Suzuki }; 402fb21a0acSKatsuhiro Suzuki }; 403fb21a0acSKatsuhiro Suzuki 404fb21a0acSKatsuhiro Suzuki spdif_port0: port@5 { 405fb21a0acSKatsuhiro Suzuki spdif_hiecout1: endpoint { 406fb21a0acSKatsuhiro Suzuki }; 407fb21a0acSKatsuhiro Suzuki }; 408fb21a0acSKatsuhiro Suzuki 409fb21a0acSKatsuhiro Suzuki src_port0: port@6 { 410fb21a0acSKatsuhiro Suzuki i2s_epcmout2: endpoint { 411fb21a0acSKatsuhiro Suzuki }; 412fb21a0acSKatsuhiro Suzuki }; 413fb21a0acSKatsuhiro Suzuki 414fb21a0acSKatsuhiro Suzuki src_port1: port@7 { 415fb21a0acSKatsuhiro Suzuki i2s_epcmout3: endpoint { 416fb21a0acSKatsuhiro Suzuki }; 417fb21a0acSKatsuhiro Suzuki }; 418fb21a0acSKatsuhiro Suzuki 419fb21a0acSKatsuhiro Suzuki comp_spdif_port0: port@8 { 420fb21a0acSKatsuhiro Suzuki comp_spdif_hiecout1: endpoint { 421fb21a0acSKatsuhiro Suzuki }; 422fb21a0acSKatsuhiro Suzuki }; 423fb21a0acSKatsuhiro Suzuki }; 424fb21a0acSKatsuhiro Suzuki 425fb21a0acSKatsuhiro Suzuki codec@57900000 { 426fb21a0acSKatsuhiro Suzuki compatible = "socionext,uniphier-evea"; 427fb21a0acSKatsuhiro Suzuki reg = <0x57900000 0x1000>; 428fb21a0acSKatsuhiro Suzuki clock-names = "evea", "exiv"; 429fb21a0acSKatsuhiro Suzuki clocks = <&sys_clk 41>, <&sys_clk 42>; 430fb21a0acSKatsuhiro Suzuki reset-names = "evea", "exiv", "adamv"; 431fb21a0acSKatsuhiro Suzuki resets = <&sys_rst 41>, <&sys_rst 42>, <&adamv_rst 0>; 432fb21a0acSKatsuhiro Suzuki #sound-dai-cells = <1>; 433fb21a0acSKatsuhiro Suzuki 434fb21a0acSKatsuhiro Suzuki port@0 { 435fb21a0acSKatsuhiro Suzuki evea_line: endpoint { 436fb21a0acSKatsuhiro Suzuki remote-endpoint = <&i2s_line>; 437fb21a0acSKatsuhiro Suzuki }; 438fb21a0acSKatsuhiro Suzuki }; 439fb21a0acSKatsuhiro Suzuki 440fb21a0acSKatsuhiro Suzuki port@1 { 441fb21a0acSKatsuhiro Suzuki evea_hp: endpoint { 442fb21a0acSKatsuhiro Suzuki remote-endpoint = <&i2s_hp>; 443fb21a0acSKatsuhiro Suzuki }; 444fb21a0acSKatsuhiro Suzuki }; 445fb21a0acSKatsuhiro Suzuki }; 446fb21a0acSKatsuhiro Suzuki 447178b3568SKatsuhiro Suzuki adamv@57920000 { 448178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-adamv", 449178b3568SKatsuhiro Suzuki "simple-mfd", "syscon"; 450178b3568SKatsuhiro Suzuki reg = <0x57920000 0x1000>; 451178b3568SKatsuhiro Suzuki 452178b3568SKatsuhiro Suzuki adamv_rst: reset { 453178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-adamv-reset"; 454178b3568SKatsuhiro Suzuki #reset-cells = <1>; 455178b3568SKatsuhiro Suzuki }; 456178b3568SKatsuhiro Suzuki }; 457178b3568SKatsuhiro Suzuki 458cea59bd0SMasahiro Yamada i2c0: i2c@58780000 { 459cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 460cea59bd0SMasahiro Yamada status = "disabled"; 461cea59bd0SMasahiro Yamada reg = <0x58780000 0x80>; 462cea59bd0SMasahiro Yamada #address-cells = <1>; 463cea59bd0SMasahiro Yamada #size-cells = <0>; 4645ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 465cea59bd0SMasahiro Yamada pinctrl-names = "default"; 466cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 46742aee275SMasahiro Yamada clocks = <&peri_clk 4>; 46876c48e1eSMasahiro Yamada resets = <&peri_rst 4>; 469cea59bd0SMasahiro Yamada clock-frequency = <100000>; 470cea59bd0SMasahiro Yamada }; 471cea59bd0SMasahiro Yamada 472cea59bd0SMasahiro Yamada i2c1: i2c@58781000 { 473cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 474cea59bd0SMasahiro Yamada status = "disabled"; 475cea59bd0SMasahiro Yamada reg = <0x58781000 0x80>; 476cea59bd0SMasahiro Yamada #address-cells = <1>; 477cea59bd0SMasahiro Yamada #size-cells = <0>; 4785ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; 479cea59bd0SMasahiro Yamada pinctrl-names = "default"; 480cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 48142aee275SMasahiro Yamada clocks = <&peri_clk 5>; 48276c48e1eSMasahiro Yamada resets = <&peri_rst 5>; 483cea59bd0SMasahiro Yamada clock-frequency = <100000>; 484cea59bd0SMasahiro Yamada }; 485cea59bd0SMasahiro Yamada 486cea59bd0SMasahiro Yamada i2c2: i2c@58782000 { 487cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 488cea59bd0SMasahiro Yamada reg = <0x58782000 0x80>; 489cea59bd0SMasahiro Yamada #address-cells = <1>; 490cea59bd0SMasahiro Yamada #size-cells = <0>; 4915ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 49242aee275SMasahiro Yamada clocks = <&peri_clk 6>; 49376c48e1eSMasahiro Yamada resets = <&peri_rst 6>; 494cea59bd0SMasahiro Yamada clock-frequency = <400000>; 495cea59bd0SMasahiro Yamada }; 496cea59bd0SMasahiro Yamada 497cea59bd0SMasahiro Yamada i2c3: i2c@58783000 { 498cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 499cea59bd0SMasahiro Yamada status = "disabled"; 500cea59bd0SMasahiro Yamada reg = <0x58783000 0x80>; 501cea59bd0SMasahiro Yamada #address-cells = <1>; 502cea59bd0SMasahiro Yamada #size-cells = <0>; 5035ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 504cea59bd0SMasahiro Yamada pinctrl-names = "default"; 505cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 50642aee275SMasahiro Yamada clocks = <&peri_clk 7>; 50776c48e1eSMasahiro Yamada resets = <&peri_rst 7>; 508cea59bd0SMasahiro Yamada clock-frequency = <100000>; 509cea59bd0SMasahiro Yamada }; 510cea59bd0SMasahiro Yamada 511cea59bd0SMasahiro Yamada i2c4: i2c@58784000 { 512cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 513cea59bd0SMasahiro Yamada status = "disabled"; 514cea59bd0SMasahiro Yamada reg = <0x58784000 0x80>; 515cea59bd0SMasahiro Yamada #address-cells = <1>; 516cea59bd0SMasahiro Yamada #size-cells = <0>; 5175ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 518cea59bd0SMasahiro Yamada pinctrl-names = "default"; 519cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c4>; 52042aee275SMasahiro Yamada clocks = <&peri_clk 8>; 52176c48e1eSMasahiro Yamada resets = <&peri_rst 8>; 522cea59bd0SMasahiro Yamada clock-frequency = <100000>; 523cea59bd0SMasahiro Yamada }; 524cea59bd0SMasahiro Yamada 525cea59bd0SMasahiro Yamada i2c5: i2c@58785000 { 526cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 527cea59bd0SMasahiro Yamada reg = <0x58785000 0x80>; 528cea59bd0SMasahiro Yamada #address-cells = <1>; 529cea59bd0SMasahiro Yamada #size-cells = <0>; 5305ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 53142aee275SMasahiro Yamada clocks = <&peri_clk 9>; 53276c48e1eSMasahiro Yamada resets = <&peri_rst 9>; 533cea59bd0SMasahiro Yamada clock-frequency = <400000>; 534cea59bd0SMasahiro Yamada }; 535cea59bd0SMasahiro Yamada 536cea59bd0SMasahiro Yamada system_bus: system-bus@58c00000 { 537cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 538cea59bd0SMasahiro Yamada status = "disabled"; 539cea59bd0SMasahiro Yamada reg = <0x58c00000 0x400>; 540cea59bd0SMasahiro Yamada #address-cells = <2>; 541cea59bd0SMasahiro Yamada #size-cells = <1>; 5425d9a83c9SMasahiro Yamada pinctrl-names = "default"; 5435d9a83c9SMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 544cea59bd0SMasahiro Yamada }; 545cea59bd0SMasahiro Yamada 546b10ee7e3SMasahiro Yamada smpctrl@59801000 { 547cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 548cea59bd0SMasahiro Yamada reg = <0x59801000 0x400>; 549cea59bd0SMasahiro Yamada }; 550cea59bd0SMasahiro Yamada 5518e68c65dSMasahiro Yamada sdctrl@59810000 { 5528e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sdctrl", 55342aee275SMasahiro Yamada "simple-mfd", "syscon"; 554555861fbSMasahiro Yamada reg = <0x59810000 0x400>; 55542aee275SMasahiro Yamada 5568e68c65dSMasahiro Yamada sd_clk: clock { 5578e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-clock"; 55842aee275SMasahiro Yamada #clock-cells = <1>; 55942aee275SMasahiro Yamada }; 56042aee275SMasahiro Yamada 5618e68c65dSMasahiro Yamada sd_rst: reset { 5628e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-reset"; 56342aee275SMasahiro Yamada #reset-cells = <1>; 56442aee275SMasahiro Yamada }; 56542aee275SMasahiro Yamada }; 56642aee275SMasahiro Yamada 56742aee275SMasahiro Yamada perictrl@59820000 { 568fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-perictrl", 56942aee275SMasahiro Yamada "simple-mfd", "syscon"; 57042aee275SMasahiro Yamada reg = <0x59820000 0x200>; 57142aee275SMasahiro Yamada 57242aee275SMasahiro Yamada peri_clk: clock { 57342aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-clock"; 57442aee275SMasahiro Yamada #clock-cells = <1>; 57542aee275SMasahiro Yamada }; 57642aee275SMasahiro Yamada 57742aee275SMasahiro Yamada peri_rst: reset { 57842aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-reset"; 57942aee275SMasahiro Yamada #reset-cells = <1>; 58042aee275SMasahiro Yamada }; 58142aee275SMasahiro Yamada }; 58242aee275SMasahiro Yamada 583bb3f4672SMasahiro Yamada emmc: mmc@5a000000 { 5843a93cc26SMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 5853a93cc26SMasahiro Yamada reg = <0x5a000000 0x400>; 5865ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 5879c0a9700SMasahiro Yamada pinctrl-names = "default"; 5889c0a9700SMasahiro Yamada pinctrl-0 = <&pinctrl_emmc>; 5893a93cc26SMasahiro Yamada clocks = <&sys_clk 4>; 59076c48e1eSMasahiro Yamada resets = <&sys_rst 4>; 5913a93cc26SMasahiro Yamada bus-width = <8>; 5923a93cc26SMasahiro Yamada mmc-ddr-1_8v; 5933a93cc26SMasahiro Yamada mmc-hs200-1_8v; 594b6e5ec20SMasahiro Yamada mmc-pwrseq = <&emmc_pwrseq>; 595f4e5200fSMasahiro Yamada cdns,phy-input-delay-legacy = <9>; 596ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 597ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 598e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 599e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 6003a93cc26SMasahiro Yamada }; 6013a93cc26SMasahiro Yamada 602bb3f4672SMasahiro Yamada sd: mmc@5a400000 { 60384a9c4d5SMasahiro Yamada compatible = "socionext,uniphier-sd-v3.1.1"; 60484a9c4d5SMasahiro Yamada status = "disabled"; 60584a9c4d5SMasahiro Yamada reg = <0x5a400000 0x800>; 6065ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 60784a9c4d5SMasahiro Yamada pinctrl-names = "default"; 60884a9c4d5SMasahiro Yamada pinctrl-0 = <&pinctrl_sd>; 60984a9c4d5SMasahiro Yamada clocks = <&sd_clk 0>; 61084a9c4d5SMasahiro Yamada reset-names = "host"; 61184a9c4d5SMasahiro Yamada resets = <&sd_rst 0>; 61284a9c4d5SMasahiro Yamada bus-width = <4>; 61384a9c4d5SMasahiro Yamada cap-sd-highspeed; 61484a9c4d5SMasahiro Yamada }; 61584a9c4d5SMasahiro Yamada 6166c35921dSKatsuhiro Suzuki soc_glue: soc-glue@5f800000 { 617fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-soc-glue", 6189d4f5505SMasahiro Yamada "simple-mfd", "syscon"; 619cea59bd0SMasahiro Yamada reg = <0x5f800000 0x2000>; 620cea59bd0SMasahiro Yamada 621cea59bd0SMasahiro Yamada pinctrl: pinctrl { 622cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20-pinctrl"; 623cea59bd0SMasahiro Yamada }; 624cea59bd0SMasahiro Yamada }; 625cea59bd0SMasahiro Yamada 626f05851e1SKeiji Hayashibara soc-glue@5f900000 { 627f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-ld20-soc-glue-debug", 628f05851e1SKeiji Hayashibara "simple-mfd"; 629f05851e1SKeiji Hayashibara #address-cells = <1>; 630f05851e1SKeiji Hayashibara #size-cells = <1>; 631f05851e1SKeiji Hayashibara ranges = <0 0x5f900000 0x2000>; 632f05851e1SKeiji Hayashibara 633f05851e1SKeiji Hayashibara efuse@100 { 634f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 635f05851e1SKeiji Hayashibara reg = <0x100 0x28>; 636f05851e1SKeiji Hayashibara }; 637f05851e1SKeiji Hayashibara 638f05851e1SKeiji Hayashibara efuse@200 { 639f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 640f05851e1SKeiji Hayashibara reg = <0x200 0x68>; 641d7b9beb8SKunihiko Hayashi #address-cells = <1>; 642d7b9beb8SKunihiko Hayashi #size-cells = <1>; 643d7b9beb8SKunihiko Hayashi 644d7b9beb8SKunihiko Hayashi /* USB cells */ 645d7b9beb8SKunihiko Hayashi usb_rterm0: trim@54,4 { 646d7b9beb8SKunihiko Hayashi reg = <0x54 1>; 647d7b9beb8SKunihiko Hayashi bits = <4 2>; 648d7b9beb8SKunihiko Hayashi }; 649d7b9beb8SKunihiko Hayashi usb_rterm1: trim@55,4 { 650d7b9beb8SKunihiko Hayashi reg = <0x55 1>; 651d7b9beb8SKunihiko Hayashi bits = <4 2>; 652d7b9beb8SKunihiko Hayashi }; 653d7b9beb8SKunihiko Hayashi usb_rterm2: trim@58,4 { 654d7b9beb8SKunihiko Hayashi reg = <0x58 1>; 655d7b9beb8SKunihiko Hayashi bits = <4 2>; 656d7b9beb8SKunihiko Hayashi }; 657d7b9beb8SKunihiko Hayashi usb_rterm3: trim@59,4 { 658d7b9beb8SKunihiko Hayashi reg = <0x59 1>; 659d7b9beb8SKunihiko Hayashi bits = <4 2>; 660d7b9beb8SKunihiko Hayashi }; 661d7b9beb8SKunihiko Hayashi usb_sel_t0: trim@54,0 { 662d7b9beb8SKunihiko Hayashi reg = <0x54 1>; 663d7b9beb8SKunihiko Hayashi bits = <0 4>; 664d7b9beb8SKunihiko Hayashi }; 665d7b9beb8SKunihiko Hayashi usb_sel_t1: trim@55,0 { 666d7b9beb8SKunihiko Hayashi reg = <0x55 1>; 667d7b9beb8SKunihiko Hayashi bits = <0 4>; 668d7b9beb8SKunihiko Hayashi }; 669d7b9beb8SKunihiko Hayashi usb_sel_t2: trim@58,0 { 670d7b9beb8SKunihiko Hayashi reg = <0x58 1>; 671d7b9beb8SKunihiko Hayashi bits = <0 4>; 672d7b9beb8SKunihiko Hayashi }; 673d7b9beb8SKunihiko Hayashi usb_sel_t3: trim@59,0 { 674d7b9beb8SKunihiko Hayashi reg = <0x59 1>; 675d7b9beb8SKunihiko Hayashi bits = <0 4>; 676d7b9beb8SKunihiko Hayashi }; 677d7b9beb8SKunihiko Hayashi usb_hs_i0: trim@56,0 { 678d7b9beb8SKunihiko Hayashi reg = <0x56 1>; 679d7b9beb8SKunihiko Hayashi bits = <0 4>; 680d7b9beb8SKunihiko Hayashi }; 681d7b9beb8SKunihiko Hayashi usb_hs_i2: trim@5a,0 { 682d7b9beb8SKunihiko Hayashi reg = <0x5a 1>; 683d7b9beb8SKunihiko Hayashi bits = <0 4>; 684d7b9beb8SKunihiko Hayashi }; 685f05851e1SKeiji Hayashibara }; 686f05851e1SKeiji Hayashibara }; 687f05851e1SKeiji Hayashibara 688f03b998dSKunihiko Hayashi xdmac: dma-controller@5fc10000 { 689f03b998dSKunihiko Hayashi compatible = "socionext,uniphier-xdmac"; 690f03b998dSKunihiko Hayashi reg = <0x5fc10000 0x5300>; 6915ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 692f03b998dSKunihiko Hayashi dma-channels = <16>; 693f03b998dSKunihiko Hayashi #dma-cells = <2>; 694f03b998dSKunihiko Hayashi }; 695f03b998dSKunihiko Hayashi 6969ddc285bSMasahiro Yamada aidet: interrupt-controller@5fc20000 { 6973dfc6e98SMasahiro Yamada compatible = "socionext,uniphier-ld20-aidet"; 6983dfc6e98SMasahiro Yamada reg = <0x5fc20000 0x200>; 6993dfc6e98SMasahiro Yamada interrupt-controller; 7003dfc6e98SMasahiro Yamada #interrupt-cells = <2>; 7013dfc6e98SMasahiro Yamada }; 7023dfc6e98SMasahiro Yamada 703cea59bd0SMasahiro Yamada gic: interrupt-controller@5fe00000 { 704cea59bd0SMasahiro Yamada compatible = "arm,gic-v3"; 705cea59bd0SMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 706cea59bd0SMasahiro Yamada <0x5fe80000 0x80000>; /* GICR */ 707cea59bd0SMasahiro Yamada interrupt-controller; 708cea59bd0SMasahiro Yamada #interrupt-cells = <3>; 7095ba95e8eSKunihiko Hayashi interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 710cea59bd0SMasahiro Yamada }; 71142aee275SMasahiro Yamada 71242aee275SMasahiro Yamada sysctrl@61840000 { 713fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-sysctrl", 71442aee275SMasahiro Yamada "simple-mfd", "syscon"; 7151ef64af8SMasahiro Yamada reg = <0x61840000 0x10000>; 71642aee275SMasahiro Yamada 71742aee275SMasahiro Yamada sys_clk: clock { 71842aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-clock"; 71942aee275SMasahiro Yamada #clock-cells = <1>; 72042aee275SMasahiro Yamada }; 72142aee275SMasahiro Yamada 72242aee275SMasahiro Yamada sys_rst: reset { 72342aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-reset"; 72442aee275SMasahiro Yamada #reset-cells = <1>; 72542aee275SMasahiro Yamada }; 7264c4c960aSKeiji Hayashibara 7274c4c960aSKeiji Hayashibara watchdog { 7284c4c960aSKeiji Hayashibara compatible = "socionext,uniphier-wdt"; 7294c4c960aSKeiji Hayashibara }; 730dba74980SKunihiko Hayashi 7312dfb62d6SKunihiko Hayashi pvtctl: thermal-sensor { 732dba74980SKunihiko Hayashi compatible = "socionext,uniphier-ld20-thermal"; 7335ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 734dba74980SKunihiko Hayashi #thermal-sensor-cells = <0>; 735dba74980SKunihiko Hayashi socionext,tmod-calibration = <0x0f22 0x68ee>; 736dba74980SKunihiko Hayashi }; 73742aee275SMasahiro Yamada }; 738e5aefb38SMasahiro Yamada 739c73730eeSKunihiko Hayashi eth: ethernet@65000000 { 740c73730eeSKunihiko Hayashi compatible = "socionext,uniphier-ld20-ave4"; 741c73730eeSKunihiko Hayashi status = "disabled"; 742c73730eeSKunihiko Hayashi reg = <0x65000000 0x8500>; 7435ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; 744c73730eeSKunihiko Hayashi pinctrl-names = "default"; 745c73730eeSKunihiko Hayashi pinctrl-0 = <&pinctrl_ether_rgmii>; 746a34a464dSKunihiko Hayashi clock-names = "ether"; 747c73730eeSKunihiko Hayashi clocks = <&sys_clk 6>; 748a34a464dSKunihiko Hayashi reset-names = "ether"; 749c73730eeSKunihiko Hayashi resets = <&sys_rst 6>; 750dcabb06bSKunihiko Hayashi phy-mode = "rgmii-id"; 751c73730eeSKunihiko Hayashi local-mac-address = [00 00 00 00 00 00]; 752b076ff8bSKunihiko Hayashi socionext,syscon-phy-mode = <&soc_glue 0>; 753c73730eeSKunihiko Hayashi 754c73730eeSKunihiko Hayashi mdio: mdio { 755c73730eeSKunihiko Hayashi #address-cells = <1>; 756c73730eeSKunihiko Hayashi #size-cells = <0>; 757c73730eeSKunihiko Hayashi }; 758c73730eeSKunihiko Hayashi }; 759c73730eeSKunihiko Hayashi 760d7b9beb8SKunihiko Hayashi usb: usb@65a00000 { 761d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-dwc3", "snps,dwc3"; 762d7b9beb8SKunihiko Hayashi status = "disabled"; 763d7b9beb8SKunihiko Hayashi reg = <0x65a00000 0xcd00>; 764d7b9beb8SKunihiko Hayashi interrupt-names = "host"; 7655ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; 766d7b9beb8SKunihiko Hayashi pinctrl-names = "default"; 767d7b9beb8SKunihiko Hayashi pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb1>, 768d7b9beb8SKunihiko Hayashi <&pinctrl_usb2>, <&pinctrl_usb3>; 769d7b9beb8SKunihiko Hayashi clock-names = "ref", "bus_early", "suspend"; 770d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 14>, <&sys_clk 14>; 771d7b9beb8SKunihiko Hayashi resets = <&usb_rst 15>; 772d7b9beb8SKunihiko Hayashi phys = <&usb_hsphy0>, <&usb_hsphy1>, 773d7b9beb8SKunihiko Hayashi <&usb_hsphy2>, <&usb_hsphy3>, 774d7b9beb8SKunihiko Hayashi <&usb_ssphy0>, <&usb_ssphy1>; 775d7b9beb8SKunihiko Hayashi dr_mode = "host"; 776d7b9beb8SKunihiko Hayashi }; 777d7b9beb8SKunihiko Hayashi 7784cc752a8SKunihiko Hayashi usb-controller@65b00000 { 779d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-dwc3-glue", 780d7b9beb8SKunihiko Hayashi "simple-mfd"; 781d7b9beb8SKunihiko Hayashi #address-cells = <1>; 782d7b9beb8SKunihiko Hayashi #size-cells = <1>; 783d7b9beb8SKunihiko Hayashi ranges = <0 0x65b00000 0x400>; 784d7b9beb8SKunihiko Hayashi 785d7b9beb8SKunihiko Hayashi usb_rst: reset@0 { 786d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-reset"; 787d7b9beb8SKunihiko Hayashi reg = <0x0 0x4>; 788d7b9beb8SKunihiko Hayashi #reset-cells = <1>; 789d7b9beb8SKunihiko Hayashi clock-names = "link"; 790d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>; 791d7b9beb8SKunihiko Hayashi reset-names = "link"; 792d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>; 793d7b9beb8SKunihiko Hayashi }; 794d7b9beb8SKunihiko Hayashi 795d7b9beb8SKunihiko Hayashi usb_vbus0: regulator@100 { 796d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-regulator"; 797d7b9beb8SKunihiko Hayashi reg = <0x100 0x10>; 798d7b9beb8SKunihiko Hayashi clock-names = "link"; 799d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>; 800d7b9beb8SKunihiko Hayashi reset-names = "link"; 801d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>; 802d7b9beb8SKunihiko Hayashi }; 803d7b9beb8SKunihiko Hayashi 804d7b9beb8SKunihiko Hayashi usb_vbus1: regulator@110 { 805d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-regulator"; 806d7b9beb8SKunihiko Hayashi reg = <0x110 0x10>; 807d7b9beb8SKunihiko Hayashi clock-names = "link"; 808d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>; 809d7b9beb8SKunihiko Hayashi reset-names = "link"; 810d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>; 811d7b9beb8SKunihiko Hayashi }; 812d7b9beb8SKunihiko Hayashi 813d7b9beb8SKunihiko Hayashi usb_vbus2: regulator@120 { 814d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-regulator"; 815d7b9beb8SKunihiko Hayashi reg = <0x120 0x10>; 816d7b9beb8SKunihiko Hayashi clock-names = "link"; 817d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>; 818d7b9beb8SKunihiko Hayashi reset-names = "link"; 819d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>; 820d7b9beb8SKunihiko Hayashi }; 821d7b9beb8SKunihiko Hayashi 822d7b9beb8SKunihiko Hayashi usb_vbus3: regulator@130 { 823d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-regulator"; 824d7b9beb8SKunihiko Hayashi reg = <0x130 0x10>; 825d7b9beb8SKunihiko Hayashi clock-names = "link"; 826d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>; 827d7b9beb8SKunihiko Hayashi reset-names = "link"; 828d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>; 829d7b9beb8SKunihiko Hayashi }; 830d7b9beb8SKunihiko Hayashi 831d7b9beb8SKunihiko Hayashi usb_hsphy0: hs-phy@200 { 832d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-hsphy"; 833d7b9beb8SKunihiko Hayashi reg = <0x200 0x10>; 834d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 835d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 836d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 16>; 837d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 838d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 16>; 839d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus0>; 840d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 841d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm0>, <&usb_sel_t0>, 842d7b9beb8SKunihiko Hayashi <&usb_hs_i0>; 843d7b9beb8SKunihiko Hayashi }; 844d7b9beb8SKunihiko Hayashi 845d7b9beb8SKunihiko Hayashi usb_hsphy1: hs-phy@210 { 846d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-hsphy"; 847d7b9beb8SKunihiko Hayashi reg = <0x210 0x10>; 848d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 849d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 850d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 16>; 851d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 852d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 16>; 853d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus1>; 854d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 855d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm1>, <&usb_sel_t1>, 856d7b9beb8SKunihiko Hayashi <&usb_hs_i0>; 857d7b9beb8SKunihiko Hayashi }; 858d7b9beb8SKunihiko Hayashi 859d7b9beb8SKunihiko Hayashi usb_hsphy2: hs-phy@220 { 860d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-hsphy"; 861d7b9beb8SKunihiko Hayashi reg = <0x220 0x10>; 862d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 863d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 864d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 17>; 865d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 866d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 17>; 867d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus2>; 868d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 869d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm2>, <&usb_sel_t2>, 870d7b9beb8SKunihiko Hayashi <&usb_hs_i2>; 871d7b9beb8SKunihiko Hayashi }; 872d7b9beb8SKunihiko Hayashi 873d7b9beb8SKunihiko Hayashi usb_hsphy3: hs-phy@230 { 874d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-hsphy"; 875d7b9beb8SKunihiko Hayashi reg = <0x230 0x10>; 876d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 877d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 878d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 17>; 879d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 880d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 17>; 881d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus3>; 882d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 883d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm3>, <&usb_sel_t3>, 884d7b9beb8SKunihiko Hayashi <&usb_hs_i2>; 885d7b9beb8SKunihiko Hayashi }; 886d7b9beb8SKunihiko Hayashi 887d7b9beb8SKunihiko Hayashi usb_ssphy0: ss-phy@300 { 888d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-ssphy"; 889d7b9beb8SKunihiko Hayashi reg = <0x300 0x10>; 890d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 891d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 892d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 18>; 893d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 894d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 18>; 895d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus0>; 896d7b9beb8SKunihiko Hayashi }; 897d7b9beb8SKunihiko Hayashi 898d7b9beb8SKunihiko Hayashi usb_ssphy1: ss-phy@310 { 899d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-ssphy"; 900d7b9beb8SKunihiko Hayashi reg = <0x310 0x10>; 901d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 902d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 903d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 19>; 904d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 905d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 19>; 906d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus1>; 907d7b9beb8SKunihiko Hayashi }; 908d7b9beb8SKunihiko Hayashi }; 909d7b9beb8SKunihiko Hayashi 91032dfc773SKunihiko Hayashi pcie: pcie@66000000 { 911d93ecbf5SKunihiko Hayashi compatible = "socionext,uniphier-pcie"; 91232dfc773SKunihiko Hayashi status = "disabled"; 91332dfc773SKunihiko Hayashi reg-names = "dbi", "link", "config"; 91432dfc773SKunihiko Hayashi reg = <0x66000000 0x1000>, <0x66010000 0x10000>, 91532dfc773SKunihiko Hayashi <0x2fff0000 0x10000>; 91632dfc773SKunihiko Hayashi #address-cells = <3>; 91732dfc773SKunihiko Hayashi #size-cells = <2>; 91832dfc773SKunihiko Hayashi clocks = <&sys_clk 24>; 91932dfc773SKunihiko Hayashi resets = <&sys_rst 24>; 92032dfc773SKunihiko Hayashi num-lanes = <1>; 92132dfc773SKunihiko Hayashi num-viewport = <1>; 92232dfc773SKunihiko Hayashi bus-range = <0x0 0xff>; 92332dfc773SKunihiko Hayashi device_type = "pci"; 92432dfc773SKunihiko Hayashi ranges = 92532dfc773SKunihiko Hayashi /* downstream I/O */ 92632dfc773SKunihiko Hayashi <0x81000000 0 0x00000000 0x2ffe0000 0 0x00010000>, 92732dfc773SKunihiko Hayashi /* non-prefetchable memory */ 92832dfc773SKunihiko Hayashi <0x82000000 0 0x20000000 0x20000000 0 0x0ffe0000>; 92932dfc773SKunihiko Hayashi #interrupt-cells = <1>; 93032dfc773SKunihiko Hayashi interrupt-names = "dma", "msi"; 9315ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>, 9325ba95e8eSKunihiko Hayashi <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 93332dfc773SKunihiko Hayashi interrupt-map-mask = <0 0 0 7>; 93432dfc773SKunihiko Hayashi interrupt-map = <0 0 0 1 &pcie_intc 0>, /* INTA */ 93532dfc773SKunihiko Hayashi <0 0 0 2 &pcie_intc 1>, /* INTB */ 93632dfc773SKunihiko Hayashi <0 0 0 3 &pcie_intc 2>, /* INTC */ 93732dfc773SKunihiko Hayashi <0 0 0 4 &pcie_intc 3>; /* INTD */ 93832dfc773SKunihiko Hayashi phy-names = "pcie-phy"; 93932dfc773SKunihiko Hayashi phys = <&pcie_phy>; 94032dfc773SKunihiko Hayashi 94132dfc773SKunihiko Hayashi pcie_intc: legacy-interrupt-controller { 94232dfc773SKunihiko Hayashi interrupt-controller; 94332dfc773SKunihiko Hayashi #interrupt-cells = <1>; 94432dfc773SKunihiko Hayashi interrupt-parent = <&gic>; 9455ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 94632dfc773SKunihiko Hayashi }; 94732dfc773SKunihiko Hayashi }; 94832dfc773SKunihiko Hayashi 94932dfc773SKunihiko Hayashi pcie_phy: phy@66038000 { 95032dfc773SKunihiko Hayashi compatible = "socionext,uniphier-ld20-pcie-phy"; 95132dfc773SKunihiko Hayashi reg = <0x66038000 0x4000>; 95232dfc773SKunihiko Hayashi #phy-cells = <0>; 953e6bd81a2SKunihiko Hayashi clock-names = "link"; 95432dfc773SKunihiko Hayashi clocks = <&sys_clk 24>; 955e6bd81a2SKunihiko Hayashi reset-names = "link"; 95632dfc773SKunihiko Hayashi resets = <&sys_rst 24>; 95732dfc773SKunihiko Hayashi socionext,syscon = <&soc_glue>; 95832dfc773SKunihiko Hayashi }; 95932dfc773SKunihiko Hayashi 960fcb0e53cSMasahiro Yamada nand: nand-controller@68000000 { 961e5aefb38SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 962e5aefb38SMasahiro Yamada status = "disabled"; 963e5aefb38SMasahiro Yamada reg-names = "nand_data", "denali_reg"; 964e5aefb38SMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 96553c580c1SMasahiro Yamada #address-cells = <1>; 96653c580c1SMasahiro Yamada #size-cells = <0>; 9675ba95e8eSKunihiko Hayashi interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 968e5aefb38SMasahiro Yamada pinctrl-names = "default"; 969e5aefb38SMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 970bae120f8SMasahiro Yamada clock-names = "nand", "nand_x", "ecc"; 971bae120f8SMasahiro Yamada clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; 972e98d5023SMasahiro Yamada reset-names = "nand", "reg"; 973e98d5023SMasahiro Yamada resets = <&sys_rst 2>, <&sys_rst 2>; 974e5aefb38SMasahiro Yamada }; 975cea59bd0SMasahiro Yamada }; 976cea59bd0SMasahiro Yamada}; 977cea59bd0SMasahiro Yamada 9785740ea4eSMasahiro Yamada#include "uniphier-pinctrl.dtsi" 979fb21a0acSKatsuhiro Suzuki 980fb21a0acSKatsuhiro Suzuki&pinctrl_aout1 { 981fb21a0acSKatsuhiro Suzuki drive-strength = <4>; /* default: 3.5mA */ 982fb21a0acSKatsuhiro Suzuki 983fb21a0acSKatsuhiro Suzuki ao1dacck { 984fb21a0acSKatsuhiro Suzuki pins = "AO1DACCK"; 985fb21a0acSKatsuhiro Suzuki drive-strength = <5>; /* 5mA */ 986fb21a0acSKatsuhiro Suzuki }; 987fb21a0acSKatsuhiro Suzuki}; 988fb21a0acSKatsuhiro Suzuki 989fb21a0acSKatsuhiro Suzuki&pinctrl_aoutiec1 { 990fb21a0acSKatsuhiro Suzuki drive-strength = <4>; /* default: 3.5mA */ 991fb21a0acSKatsuhiro Suzuki 992fb21a0acSKatsuhiro Suzuki ao1arc { 993fb21a0acSKatsuhiro Suzuki pins = "AO1ARC"; 994fb21a0acSKatsuhiro Suzuki drive-strength = <11>; /* 11mA */ 995fb21a0acSKatsuhiro Suzuki }; 996fb21a0acSKatsuhiro Suzuki}; 997