1cea59bd0SMasahiro Yamada/* 2cea59bd0SMasahiro Yamada * Device Tree Source for UniPhier LD20 SoC 3cea59bd0SMasahiro Yamada * 4cea59bd0SMasahiro Yamada * Copyright (C) 2015-2016 Socionext Inc. 5cea59bd0SMasahiro Yamada * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 6cea59bd0SMasahiro Yamada * 712301cffSMasahiro Yamada * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8cea59bd0SMasahiro Yamada */ 9cea59bd0SMasahiro Yamada 10dba74980SKunihiko Hayashi#include <dt-bindings/thermal/thermal.h> 11dba74980SKunihiko Hayashi 1279d4be39SMasahiro Yamada/memreserve/ 0x80000000 0x02000000; 13cea59bd0SMasahiro Yamada 14cea59bd0SMasahiro Yamada/ { 15cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20"; 16cea59bd0SMasahiro Yamada #address-cells = <2>; 17cea59bd0SMasahiro Yamada #size-cells = <2>; 18cea59bd0SMasahiro Yamada interrupt-parent = <&gic>; 19cea59bd0SMasahiro Yamada 20cea59bd0SMasahiro Yamada cpus { 21cea59bd0SMasahiro Yamada #address-cells = <2>; 22cea59bd0SMasahiro Yamada #size-cells = <0>; 23cea59bd0SMasahiro Yamada 24cea59bd0SMasahiro Yamada cpu-map { 25cea59bd0SMasahiro Yamada cluster0 { 26cea59bd0SMasahiro Yamada core0 { 27cea59bd0SMasahiro Yamada cpu = <&cpu0>; 28cea59bd0SMasahiro Yamada }; 29cea59bd0SMasahiro Yamada core1 { 30cea59bd0SMasahiro Yamada cpu = <&cpu1>; 31cea59bd0SMasahiro Yamada }; 32cea59bd0SMasahiro Yamada }; 33cea59bd0SMasahiro Yamada 34cea59bd0SMasahiro Yamada cluster1 { 35cea59bd0SMasahiro Yamada core0 { 36cea59bd0SMasahiro Yamada cpu = <&cpu2>; 37cea59bd0SMasahiro Yamada }; 38cea59bd0SMasahiro Yamada core1 { 39cea59bd0SMasahiro Yamada cpu = <&cpu3>; 40cea59bd0SMasahiro Yamada }; 41cea59bd0SMasahiro Yamada }; 42cea59bd0SMasahiro Yamada }; 43cea59bd0SMasahiro Yamada 44cea59bd0SMasahiro Yamada cpu0: cpu@0 { 45cea59bd0SMasahiro Yamada device_type = "cpu"; 46cea59bd0SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 47cea59bd0SMasahiro Yamada reg = <0 0x000>; 48183ad366SMasahiro Yamada clocks = <&sys_clk 32>; 492f81137fSMasahiro Yamada enable-method = "psci"; 50183ad366SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 51dba74980SKunihiko Hayashi #cooling-cells = <2>; 52cea59bd0SMasahiro Yamada }; 53cea59bd0SMasahiro Yamada 54cea59bd0SMasahiro Yamada cpu1: cpu@1 { 55cea59bd0SMasahiro Yamada device_type = "cpu"; 56cea59bd0SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 57cea59bd0SMasahiro Yamada reg = <0 0x001>; 58183ad366SMasahiro Yamada clocks = <&sys_clk 32>; 592f81137fSMasahiro Yamada enable-method = "psci"; 60183ad366SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 61cea59bd0SMasahiro Yamada }; 62cea59bd0SMasahiro Yamada 63cea59bd0SMasahiro Yamada cpu2: cpu@100 { 64cea59bd0SMasahiro Yamada device_type = "cpu"; 65cea59bd0SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 66cea59bd0SMasahiro Yamada reg = <0 0x100>; 67183ad366SMasahiro Yamada clocks = <&sys_clk 33>; 682f81137fSMasahiro Yamada enable-method = "psci"; 69183ad366SMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 70dba74980SKunihiko Hayashi #cooling-cells = <2>; 71cea59bd0SMasahiro Yamada }; 72cea59bd0SMasahiro Yamada 73cea59bd0SMasahiro Yamada cpu3: cpu@101 { 74cea59bd0SMasahiro Yamada device_type = "cpu"; 75cea59bd0SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 76cea59bd0SMasahiro Yamada reg = <0 0x101>; 77183ad366SMasahiro Yamada clocks = <&sys_clk 33>; 782f81137fSMasahiro Yamada enable-method = "psci"; 79183ad366SMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 80183ad366SMasahiro Yamada }; 81183ad366SMasahiro Yamada }; 82183ad366SMasahiro Yamada 839cd7d03fSMasahiro Yamada cluster0_opp: opp-table0 { 84183ad366SMasahiro Yamada compatible = "operating-points-v2"; 85183ad366SMasahiro Yamada opp-shared; 86183ad366SMasahiro Yamada 873fc9a121SViresh Kumar opp-250000000 { 88183ad366SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 89183ad366SMasahiro Yamada clock-latency-ns = <300>; 90183ad366SMasahiro Yamada }; 913fc9a121SViresh Kumar opp-275000000 { 92183ad366SMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 93183ad366SMasahiro Yamada clock-latency-ns = <300>; 94183ad366SMasahiro Yamada }; 953fc9a121SViresh Kumar opp-500000000 { 96183ad366SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 97183ad366SMasahiro Yamada clock-latency-ns = <300>; 98183ad366SMasahiro Yamada }; 993fc9a121SViresh Kumar opp-550000000 { 100183ad366SMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 101183ad366SMasahiro Yamada clock-latency-ns = <300>; 102183ad366SMasahiro Yamada }; 1033fc9a121SViresh Kumar opp-666667000 { 104183ad366SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 105183ad366SMasahiro Yamada clock-latency-ns = <300>; 106183ad366SMasahiro Yamada }; 1073fc9a121SViresh Kumar opp-733334000 { 108183ad366SMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 109183ad366SMasahiro Yamada clock-latency-ns = <300>; 110183ad366SMasahiro Yamada }; 1113fc9a121SViresh Kumar opp-1000000000 { 112183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 113183ad366SMasahiro Yamada clock-latency-ns = <300>; 114183ad366SMasahiro Yamada }; 1153fc9a121SViresh Kumar opp-1100000000 { 116183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 117183ad366SMasahiro Yamada clock-latency-ns = <300>; 118183ad366SMasahiro Yamada }; 119183ad366SMasahiro Yamada }; 120183ad366SMasahiro Yamada 1219cd7d03fSMasahiro Yamada cluster1_opp: opp-table1 { 122183ad366SMasahiro Yamada compatible = "operating-points-v2"; 123183ad366SMasahiro Yamada opp-shared; 124183ad366SMasahiro Yamada 1253fc9a121SViresh Kumar opp-250000000 { 126183ad366SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 127183ad366SMasahiro Yamada clock-latency-ns = <300>; 128183ad366SMasahiro Yamada }; 1293fc9a121SViresh Kumar opp-275000000 { 130183ad366SMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 131183ad366SMasahiro Yamada clock-latency-ns = <300>; 132183ad366SMasahiro Yamada }; 1333fc9a121SViresh Kumar opp-500000000 { 134183ad366SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 135183ad366SMasahiro Yamada clock-latency-ns = <300>; 136183ad366SMasahiro Yamada }; 1373fc9a121SViresh Kumar opp-550000000 { 138183ad366SMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 139183ad366SMasahiro Yamada clock-latency-ns = <300>; 140183ad366SMasahiro Yamada }; 1413fc9a121SViresh Kumar opp-666667000 { 142183ad366SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 143183ad366SMasahiro Yamada clock-latency-ns = <300>; 144183ad366SMasahiro Yamada }; 1453fc9a121SViresh Kumar opp-733334000 { 146183ad366SMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 147183ad366SMasahiro Yamada clock-latency-ns = <300>; 148183ad366SMasahiro Yamada }; 1493fc9a121SViresh Kumar opp-1000000000 { 150183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 151183ad366SMasahiro Yamada clock-latency-ns = <300>; 152183ad366SMasahiro Yamada }; 1533fc9a121SViresh Kumar opp-1100000000 { 154183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 155183ad366SMasahiro Yamada clock-latency-ns = <300>; 156cea59bd0SMasahiro Yamada }; 157cea59bd0SMasahiro Yamada }; 158cea59bd0SMasahiro Yamada 1592f81137fSMasahiro Yamada psci { 1602f81137fSMasahiro Yamada compatible = "arm,psci-1.0"; 1612f81137fSMasahiro Yamada method = "smc"; 1622f81137fSMasahiro Yamada }; 1632f81137fSMasahiro Yamada 164cea59bd0SMasahiro Yamada clocks { 165cea59bd0SMasahiro Yamada refclk: ref { 166cea59bd0SMasahiro Yamada compatible = "fixed-clock"; 167cea59bd0SMasahiro Yamada #clock-cells = <0>; 168cea59bd0SMasahiro Yamada clock-frequency = <25000000>; 169cea59bd0SMasahiro Yamada }; 170cea59bd0SMasahiro Yamada }; 171cea59bd0SMasahiro Yamada 172cea59bd0SMasahiro Yamada timer { 173cea59bd0SMasahiro Yamada compatible = "arm,armv8-timer"; 17437179033SArnd Bergmann interrupts = <1 13 4>, 17537179033SArnd Bergmann <1 14 4>, 17637179033SArnd Bergmann <1 11 4>, 17737179033SArnd Bergmann <1 10 4>; 178cea59bd0SMasahiro Yamada }; 179cea59bd0SMasahiro Yamada 180dba74980SKunihiko Hayashi thermal-zones { 181dba74980SKunihiko Hayashi cpu-thermal { 182dba74980SKunihiko Hayashi polling-delay-passive = <250>; /* 250ms */ 183dba74980SKunihiko Hayashi polling-delay = <1000>; /* 1000ms */ 184dba74980SKunihiko Hayashi thermal-sensors = <&pvtctl>; 185dba74980SKunihiko Hayashi 186dba74980SKunihiko Hayashi trips { 187dba74980SKunihiko Hayashi cpu_crit: cpu-crit { 188dba74980SKunihiko Hayashi temperature = <110000>; /* 110C */ 189dba74980SKunihiko Hayashi hysteresis = <2000>; 190dba74980SKunihiko Hayashi type = "critical"; 191dba74980SKunihiko Hayashi }; 192dba74980SKunihiko Hayashi cpu_alert: cpu-alert { 193dba74980SKunihiko Hayashi temperature = <100000>; /* 100C */ 194dba74980SKunihiko Hayashi hysteresis = <2000>; 195dba74980SKunihiko Hayashi type = "passive"; 196dba74980SKunihiko Hayashi }; 197dba74980SKunihiko Hayashi }; 198dba74980SKunihiko Hayashi 199dba74980SKunihiko Hayashi cooling-maps { 200dba74980SKunihiko Hayashi map0 { 201dba74980SKunihiko Hayashi trip = <&cpu_alert>; 202dba74980SKunihiko Hayashi cooling-device = <&cpu0 203dba74980SKunihiko Hayashi THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 204dba74980SKunihiko Hayashi }; 205dba74980SKunihiko Hayashi map1 { 206dba74980SKunihiko Hayashi trip = <&cpu_alert>; 207dba74980SKunihiko Hayashi cooling-device = <&cpu2 208dba74980SKunihiko Hayashi THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 209dba74980SKunihiko Hayashi }; 210dba74980SKunihiko Hayashi }; 211dba74980SKunihiko Hayashi }; 212dba74980SKunihiko Hayashi }; 213dba74980SKunihiko Hayashi 214b5027603SMasahiro Yamada soc@0 { 215cea59bd0SMasahiro Yamada compatible = "simple-bus"; 216cea59bd0SMasahiro Yamada #address-cells = <1>; 217cea59bd0SMasahiro Yamada #size-cells = <1>; 218cea59bd0SMasahiro Yamada ranges = <0 0 0 0xffffffff>; 219cea59bd0SMasahiro Yamada 220cea59bd0SMasahiro Yamada serial0: serial@54006800 { 221cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 222cea59bd0SMasahiro Yamada status = "disabled"; 223cea59bd0SMasahiro Yamada reg = <0x54006800 0x40>; 224cea59bd0SMasahiro Yamada interrupts = <0 33 4>; 225cea59bd0SMasahiro Yamada pinctrl-names = "default"; 226cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 22742aee275SMasahiro Yamada clocks = <&peri_clk 0>; 228cea59bd0SMasahiro Yamada }; 229cea59bd0SMasahiro Yamada 230cea59bd0SMasahiro Yamada serial1: serial@54006900 { 231cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 232cea59bd0SMasahiro Yamada status = "disabled"; 233cea59bd0SMasahiro Yamada reg = <0x54006900 0x40>; 234cea59bd0SMasahiro Yamada interrupts = <0 35 4>; 235cea59bd0SMasahiro Yamada pinctrl-names = "default"; 236cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 23742aee275SMasahiro Yamada clocks = <&peri_clk 1>; 238cea59bd0SMasahiro Yamada }; 239cea59bd0SMasahiro Yamada 240cea59bd0SMasahiro Yamada serial2: serial@54006a00 { 241cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 242cea59bd0SMasahiro Yamada status = "disabled"; 243cea59bd0SMasahiro Yamada reg = <0x54006a00 0x40>; 244cea59bd0SMasahiro Yamada interrupts = <0 37 4>; 245cea59bd0SMasahiro Yamada pinctrl-names = "default"; 246cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 24742aee275SMasahiro Yamada clocks = <&peri_clk 2>; 248cea59bd0SMasahiro Yamada }; 249cea59bd0SMasahiro Yamada 250cea59bd0SMasahiro Yamada serial3: serial@54006b00 { 251cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 252cea59bd0SMasahiro Yamada status = "disabled"; 253cea59bd0SMasahiro Yamada reg = <0x54006b00 0x40>; 254cea59bd0SMasahiro Yamada interrupts = <0 177 4>; 255cea59bd0SMasahiro Yamada pinctrl-names = "default"; 256cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 25742aee275SMasahiro Yamada clocks = <&peri_clk 3>; 258cea59bd0SMasahiro Yamada }; 259cea59bd0SMasahiro Yamada 260277b51e7SMasahiro Yamada gpio: gpio@55000000 { 261277b51e7SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 262277b51e7SMasahiro Yamada reg = <0x55000000 0x200>; 263277b51e7SMasahiro Yamada interrupt-parent = <&aidet>; 264277b51e7SMasahiro Yamada interrupt-controller; 265277b51e7SMasahiro Yamada #interrupt-cells = <2>; 266277b51e7SMasahiro Yamada gpio-controller; 267277b51e7SMasahiro Yamada #gpio-cells = <2>; 268277b51e7SMasahiro Yamada gpio-ranges = <&pinctrl 0 0 0>, 269277b51e7SMasahiro Yamada <&pinctrl 96 0 0>, 270277b51e7SMasahiro Yamada <&pinctrl 160 0 0>; 271277b51e7SMasahiro Yamada gpio-ranges-group-names = "gpio_range0", 272277b51e7SMasahiro Yamada "gpio_range1", 273277b51e7SMasahiro Yamada "gpio_range2"; 274277b51e7SMasahiro Yamada ngpios = <205>; 275277b51e7SMasahiro Yamada socionext,interrupt-ranges = <0 48 16>, <16 154 5>, 276277b51e7SMasahiro Yamada <21 217 3>; 277277b51e7SMasahiro Yamada }; 278277b51e7SMasahiro Yamada 279178b3568SKatsuhiro Suzuki adamv@57920000 { 280178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-adamv", 281178b3568SKatsuhiro Suzuki "simple-mfd", "syscon"; 282178b3568SKatsuhiro Suzuki reg = <0x57920000 0x1000>; 283178b3568SKatsuhiro Suzuki 284178b3568SKatsuhiro Suzuki adamv_rst: reset { 285178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-adamv-reset"; 286178b3568SKatsuhiro Suzuki #reset-cells = <1>; 287178b3568SKatsuhiro Suzuki }; 288178b3568SKatsuhiro Suzuki }; 289178b3568SKatsuhiro Suzuki 290cea59bd0SMasahiro Yamada i2c0: i2c@58780000 { 291cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 292cea59bd0SMasahiro Yamada status = "disabled"; 293cea59bd0SMasahiro Yamada reg = <0x58780000 0x80>; 294cea59bd0SMasahiro Yamada #address-cells = <1>; 295cea59bd0SMasahiro Yamada #size-cells = <0>; 296cea59bd0SMasahiro Yamada interrupts = <0 41 4>; 297cea59bd0SMasahiro Yamada pinctrl-names = "default"; 298cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 29942aee275SMasahiro Yamada clocks = <&peri_clk 4>; 300cea59bd0SMasahiro Yamada clock-frequency = <100000>; 301cea59bd0SMasahiro Yamada }; 302cea59bd0SMasahiro Yamada 303cea59bd0SMasahiro Yamada i2c1: i2c@58781000 { 304cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 305cea59bd0SMasahiro Yamada status = "disabled"; 306cea59bd0SMasahiro Yamada reg = <0x58781000 0x80>; 307cea59bd0SMasahiro Yamada #address-cells = <1>; 308cea59bd0SMasahiro Yamada #size-cells = <0>; 309cea59bd0SMasahiro Yamada interrupts = <0 42 4>; 310cea59bd0SMasahiro Yamada pinctrl-names = "default"; 311cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 31242aee275SMasahiro Yamada clocks = <&peri_clk 5>; 313cea59bd0SMasahiro Yamada clock-frequency = <100000>; 314cea59bd0SMasahiro Yamada }; 315cea59bd0SMasahiro Yamada 316cea59bd0SMasahiro Yamada i2c2: i2c@58782000 { 317cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 318cea59bd0SMasahiro Yamada reg = <0x58782000 0x80>; 319cea59bd0SMasahiro Yamada #address-cells = <1>; 320cea59bd0SMasahiro Yamada #size-cells = <0>; 321cea59bd0SMasahiro Yamada interrupts = <0 43 4>; 32242aee275SMasahiro Yamada clocks = <&peri_clk 6>; 323cea59bd0SMasahiro Yamada clock-frequency = <400000>; 324cea59bd0SMasahiro Yamada }; 325cea59bd0SMasahiro Yamada 326cea59bd0SMasahiro Yamada i2c3: i2c@58783000 { 327cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 328cea59bd0SMasahiro Yamada status = "disabled"; 329cea59bd0SMasahiro Yamada reg = <0x58783000 0x80>; 330cea59bd0SMasahiro Yamada #address-cells = <1>; 331cea59bd0SMasahiro Yamada #size-cells = <0>; 332cea59bd0SMasahiro Yamada interrupts = <0 44 4>; 333cea59bd0SMasahiro Yamada pinctrl-names = "default"; 334cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 33542aee275SMasahiro Yamada clocks = <&peri_clk 7>; 336cea59bd0SMasahiro Yamada clock-frequency = <100000>; 337cea59bd0SMasahiro Yamada }; 338cea59bd0SMasahiro Yamada 339cea59bd0SMasahiro Yamada i2c4: i2c@58784000 { 340cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 341cea59bd0SMasahiro Yamada status = "disabled"; 342cea59bd0SMasahiro Yamada reg = <0x58784000 0x80>; 343cea59bd0SMasahiro Yamada #address-cells = <1>; 344cea59bd0SMasahiro Yamada #size-cells = <0>; 345cea59bd0SMasahiro Yamada interrupts = <0 45 4>; 346cea59bd0SMasahiro Yamada pinctrl-names = "default"; 347cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c4>; 34842aee275SMasahiro Yamada clocks = <&peri_clk 8>; 349cea59bd0SMasahiro Yamada clock-frequency = <100000>; 350cea59bd0SMasahiro Yamada }; 351cea59bd0SMasahiro Yamada 352cea59bd0SMasahiro Yamada i2c5: i2c@58785000 { 353cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 354cea59bd0SMasahiro Yamada reg = <0x58785000 0x80>; 355cea59bd0SMasahiro Yamada #address-cells = <1>; 356cea59bd0SMasahiro Yamada #size-cells = <0>; 357cea59bd0SMasahiro Yamada interrupts = <0 25 4>; 35842aee275SMasahiro Yamada clocks = <&peri_clk 9>; 359cea59bd0SMasahiro Yamada clock-frequency = <400000>; 360cea59bd0SMasahiro Yamada }; 361cea59bd0SMasahiro Yamada 362cea59bd0SMasahiro Yamada system_bus: system-bus@58c00000 { 363cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 364cea59bd0SMasahiro Yamada status = "disabled"; 365cea59bd0SMasahiro Yamada reg = <0x58c00000 0x400>; 366cea59bd0SMasahiro Yamada #address-cells = <2>; 367cea59bd0SMasahiro Yamada #size-cells = <1>; 3685d9a83c9SMasahiro Yamada pinctrl-names = "default"; 3695d9a83c9SMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 370cea59bd0SMasahiro Yamada }; 371cea59bd0SMasahiro Yamada 372b10ee7e3SMasahiro Yamada smpctrl@59801000 { 373cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 374cea59bd0SMasahiro Yamada reg = <0x59801000 0x400>; 375cea59bd0SMasahiro Yamada }; 376cea59bd0SMasahiro Yamada 3778e68c65dSMasahiro Yamada sdctrl@59810000 { 3788e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sdctrl", 37942aee275SMasahiro Yamada "simple-mfd", "syscon"; 380555861fbSMasahiro Yamada reg = <0x59810000 0x400>; 38142aee275SMasahiro Yamada 3828e68c65dSMasahiro Yamada sd_clk: clock { 3838e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-clock"; 38442aee275SMasahiro Yamada #clock-cells = <1>; 38542aee275SMasahiro Yamada }; 38642aee275SMasahiro Yamada 3878e68c65dSMasahiro Yamada sd_rst: reset { 3888e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-reset"; 38942aee275SMasahiro Yamada #reset-cells = <1>; 39042aee275SMasahiro Yamada }; 39142aee275SMasahiro Yamada }; 39242aee275SMasahiro Yamada 39342aee275SMasahiro Yamada perictrl@59820000 { 394fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-perictrl", 39542aee275SMasahiro Yamada "simple-mfd", "syscon"; 39642aee275SMasahiro Yamada reg = <0x59820000 0x200>; 39742aee275SMasahiro Yamada 39842aee275SMasahiro Yamada peri_clk: clock { 39942aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-clock"; 40042aee275SMasahiro Yamada #clock-cells = <1>; 40142aee275SMasahiro Yamada }; 40242aee275SMasahiro Yamada 40342aee275SMasahiro Yamada peri_rst: reset { 40442aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-reset"; 40542aee275SMasahiro Yamada #reset-cells = <1>; 40642aee275SMasahiro Yamada }; 40742aee275SMasahiro Yamada }; 40842aee275SMasahiro Yamada 4093a93cc26SMasahiro Yamada emmc: sdhc@5a000000 { 4103a93cc26SMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 4113a93cc26SMasahiro Yamada reg = <0x5a000000 0x400>; 4123a93cc26SMasahiro Yamada interrupts = <0 78 4>; 4139c0a9700SMasahiro Yamada pinctrl-names = "default"; 4149c0a9700SMasahiro Yamada pinctrl-0 = <&pinctrl_emmc>; 4153a93cc26SMasahiro Yamada clocks = <&sys_clk 4>; 4163a93cc26SMasahiro Yamada bus-width = <8>; 4173a93cc26SMasahiro Yamada mmc-ddr-1_8v; 4183a93cc26SMasahiro Yamada mmc-hs200-1_8v; 419ba6f7011SMasahiro Yamada cdns,phy-input-delay-legacy = <4>; 420ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 421ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 422e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 423e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 4243a93cc26SMasahiro Yamada }; 4253a93cc26SMasahiro Yamada 426cea59bd0SMasahiro Yamada soc-glue@5f800000 { 427fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-soc-glue", 4289d4f5505SMasahiro Yamada "simple-mfd", "syscon"; 429cea59bd0SMasahiro Yamada reg = <0x5f800000 0x2000>; 430cea59bd0SMasahiro Yamada 431cea59bd0SMasahiro Yamada pinctrl: pinctrl { 432cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20-pinctrl"; 433cea59bd0SMasahiro Yamada }; 434cea59bd0SMasahiro Yamada }; 435cea59bd0SMasahiro Yamada 436f05851e1SKeiji Hayashibara soc-glue@5f900000 { 437f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-ld20-soc-glue-debug", 438f05851e1SKeiji Hayashibara "simple-mfd"; 439f05851e1SKeiji Hayashibara #address-cells = <1>; 440f05851e1SKeiji Hayashibara #size-cells = <1>; 441f05851e1SKeiji Hayashibara ranges = <0 0x5f900000 0x2000>; 442f05851e1SKeiji Hayashibara 443f05851e1SKeiji Hayashibara efuse@100 { 444f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 445f05851e1SKeiji Hayashibara reg = <0x100 0x28>; 446f05851e1SKeiji Hayashibara }; 447f05851e1SKeiji Hayashibara 448f05851e1SKeiji Hayashibara efuse@200 { 449f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 450f05851e1SKeiji Hayashibara reg = <0x200 0x68>; 451f05851e1SKeiji Hayashibara }; 452f05851e1SKeiji Hayashibara }; 453f05851e1SKeiji Hayashibara 4543dfc6e98SMasahiro Yamada aidet: aidet@5fc20000 { 4553dfc6e98SMasahiro Yamada compatible = "socionext,uniphier-ld20-aidet"; 4563dfc6e98SMasahiro Yamada reg = <0x5fc20000 0x200>; 4573dfc6e98SMasahiro Yamada interrupt-controller; 4583dfc6e98SMasahiro Yamada #interrupt-cells = <2>; 4593dfc6e98SMasahiro Yamada }; 4603dfc6e98SMasahiro Yamada 461cea59bd0SMasahiro Yamada gic: interrupt-controller@5fe00000 { 462cea59bd0SMasahiro Yamada compatible = "arm,gic-v3"; 463cea59bd0SMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 464cea59bd0SMasahiro Yamada <0x5fe80000 0x80000>; /* GICR */ 465cea59bd0SMasahiro Yamada interrupt-controller; 466cea59bd0SMasahiro Yamada #interrupt-cells = <3>; 467cea59bd0SMasahiro Yamada interrupts = <1 9 4>; 468cea59bd0SMasahiro Yamada }; 46942aee275SMasahiro Yamada 47042aee275SMasahiro Yamada sysctrl@61840000 { 471fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-sysctrl", 47242aee275SMasahiro Yamada "simple-mfd", "syscon"; 4731ef64af8SMasahiro Yamada reg = <0x61840000 0x10000>; 47442aee275SMasahiro Yamada 47542aee275SMasahiro Yamada sys_clk: clock { 47642aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-clock"; 47742aee275SMasahiro Yamada #clock-cells = <1>; 47842aee275SMasahiro Yamada }; 47942aee275SMasahiro Yamada 48042aee275SMasahiro Yamada sys_rst: reset { 48142aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-reset"; 48242aee275SMasahiro Yamada #reset-cells = <1>; 48342aee275SMasahiro Yamada }; 4844c4c960aSKeiji Hayashibara 4854c4c960aSKeiji Hayashibara watchdog { 4864c4c960aSKeiji Hayashibara compatible = "socionext,uniphier-wdt"; 4874c4c960aSKeiji Hayashibara }; 488dba74980SKunihiko Hayashi 489dba74980SKunihiko Hayashi pvtctl: pvtctl { 490dba74980SKunihiko Hayashi compatible = "socionext,uniphier-ld20-thermal"; 491dba74980SKunihiko Hayashi interrupts = <0 3 4>; 492dba74980SKunihiko Hayashi #thermal-sensor-cells = <0>; 493dba74980SKunihiko Hayashi socionext,tmod-calibration = <0x0f22 0x68ee>; 494dba74980SKunihiko Hayashi }; 49542aee275SMasahiro Yamada }; 496e5aefb38SMasahiro Yamada 497e5aefb38SMasahiro Yamada nand: nand@68000000 { 498e5aefb38SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 499e5aefb38SMasahiro Yamada status = "disabled"; 500e5aefb38SMasahiro Yamada reg-names = "nand_data", "denali_reg"; 501e5aefb38SMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 502e5aefb38SMasahiro Yamada interrupts = <0 65 4>; 503e5aefb38SMasahiro Yamada pinctrl-names = "default"; 504e5aefb38SMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 505e5aefb38SMasahiro Yamada clocks = <&sys_clk 2>; 506e5aefb38SMasahiro Yamada }; 507cea59bd0SMasahiro Yamada }; 508cea59bd0SMasahiro Yamada}; 509cea59bd0SMasahiro Yamada 5105740ea4eSMasahiro Yamada#include "uniphier-pinctrl.dtsi" 511