1cea59bd0SMasahiro Yamada/*
2cea59bd0SMasahiro Yamada * Device Tree Source for UniPhier LD20 SoC
3cea59bd0SMasahiro Yamada *
4cea59bd0SMasahiro Yamada * Copyright (C) 2015-2016 Socionext Inc.
5cea59bd0SMasahiro Yamada *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
6cea59bd0SMasahiro Yamada *
7cea59bd0SMasahiro Yamada * This file is dual-licensed: you can use it either under the terms
8cea59bd0SMasahiro Yamada * of the GPL or the X11 license, at your option. Note that this dual
9cea59bd0SMasahiro Yamada * licensing only applies to this file, and not this project as a
10cea59bd0SMasahiro Yamada * whole.
11cea59bd0SMasahiro Yamada *
12cea59bd0SMasahiro Yamada *  a) This file is free software; you can redistribute it and/or
13cea59bd0SMasahiro Yamada *     modify it under the terms of the GNU General Public License as
14cea59bd0SMasahiro Yamada *     published by the Free Software Foundation; either version 2 of the
15cea59bd0SMasahiro Yamada *     License, or (at your option) any later version.
16cea59bd0SMasahiro Yamada *
17cea59bd0SMasahiro Yamada *     This file is distributed in the hope that it will be useful,
18cea59bd0SMasahiro Yamada *     but WITHOUT ANY WARRANTY; without even the implied warranty of
19cea59bd0SMasahiro Yamada *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20cea59bd0SMasahiro Yamada *     GNU General Public License for more details.
21cea59bd0SMasahiro Yamada *
22cea59bd0SMasahiro Yamada * Or, alternatively,
23cea59bd0SMasahiro Yamada *
24cea59bd0SMasahiro Yamada *  b) Permission is hereby granted, free of charge, to any person
25cea59bd0SMasahiro Yamada *     obtaining a copy of this software and associated documentation
26cea59bd0SMasahiro Yamada *     files (the "Software"), to deal in the Software without
27cea59bd0SMasahiro Yamada *     restriction, including without limitation the rights to use,
28cea59bd0SMasahiro Yamada *     copy, modify, merge, publish, distribute, sublicense, and/or
29cea59bd0SMasahiro Yamada *     sell copies of the Software, and to permit persons to whom the
30cea59bd0SMasahiro Yamada *     Software is furnished to do so, subject to the following
31cea59bd0SMasahiro Yamada *     conditions:
32cea59bd0SMasahiro Yamada *
33cea59bd0SMasahiro Yamada *     The above copyright notice and this permission notice shall be
34cea59bd0SMasahiro Yamada *     included in all copies or substantial portions of the Software.
35cea59bd0SMasahiro Yamada *
36cea59bd0SMasahiro Yamada *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37cea59bd0SMasahiro Yamada *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38cea59bd0SMasahiro Yamada *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39cea59bd0SMasahiro Yamada *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40cea59bd0SMasahiro Yamada *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41cea59bd0SMasahiro Yamada *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42cea59bd0SMasahiro Yamada *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43cea59bd0SMasahiro Yamada *     OTHER DEALINGS IN THE SOFTWARE.
44cea59bd0SMasahiro Yamada */
45cea59bd0SMasahiro Yamada
462f81137fSMasahiro Yamada/memreserve/ 0x80000000 0x00080000;
47cea59bd0SMasahiro Yamada
48cea59bd0SMasahiro Yamada/ {
49cea59bd0SMasahiro Yamada	compatible = "socionext,uniphier-ld20";
50cea59bd0SMasahiro Yamada	#address-cells = <2>;
51cea59bd0SMasahiro Yamada	#size-cells = <2>;
52cea59bd0SMasahiro Yamada	interrupt-parent = <&gic>;
53cea59bd0SMasahiro Yamada
54cea59bd0SMasahiro Yamada	cpus {
55cea59bd0SMasahiro Yamada		#address-cells = <2>;
56cea59bd0SMasahiro Yamada		#size-cells = <0>;
57cea59bd0SMasahiro Yamada
58cea59bd0SMasahiro Yamada		cpu-map {
59cea59bd0SMasahiro Yamada			cluster0 {
60cea59bd0SMasahiro Yamada				core0 {
61cea59bd0SMasahiro Yamada					cpu = <&cpu0>;
62cea59bd0SMasahiro Yamada				};
63cea59bd0SMasahiro Yamada				core1 {
64cea59bd0SMasahiro Yamada					cpu = <&cpu1>;
65cea59bd0SMasahiro Yamada				};
66cea59bd0SMasahiro Yamada			};
67cea59bd0SMasahiro Yamada
68cea59bd0SMasahiro Yamada			cluster1 {
69cea59bd0SMasahiro Yamada				core0 {
70cea59bd0SMasahiro Yamada					cpu = <&cpu2>;
71cea59bd0SMasahiro Yamada				};
72cea59bd0SMasahiro Yamada				core1 {
73cea59bd0SMasahiro Yamada					cpu = <&cpu3>;
74cea59bd0SMasahiro Yamada				};
75cea59bd0SMasahiro Yamada			};
76cea59bd0SMasahiro Yamada		};
77cea59bd0SMasahiro Yamada
78cea59bd0SMasahiro Yamada		cpu0: cpu@0 {
79cea59bd0SMasahiro Yamada			device_type = "cpu";
80cea59bd0SMasahiro Yamada			compatible = "arm,cortex-a72", "arm,armv8";
81cea59bd0SMasahiro Yamada			reg = <0 0x000>;
822f81137fSMasahiro Yamada			enable-method = "psci";
83cea59bd0SMasahiro Yamada		};
84cea59bd0SMasahiro Yamada
85cea59bd0SMasahiro Yamada		cpu1: cpu@1 {
86cea59bd0SMasahiro Yamada			device_type = "cpu";
87cea59bd0SMasahiro Yamada			compatible = "arm,cortex-a72", "arm,armv8";
88cea59bd0SMasahiro Yamada			reg = <0 0x001>;
892f81137fSMasahiro Yamada			enable-method = "psci";
90cea59bd0SMasahiro Yamada		};
91cea59bd0SMasahiro Yamada
92cea59bd0SMasahiro Yamada		cpu2: cpu@100 {
93cea59bd0SMasahiro Yamada			device_type = "cpu";
94cea59bd0SMasahiro Yamada			compatible = "arm,cortex-a53", "arm,armv8";
95cea59bd0SMasahiro Yamada			reg = <0 0x100>;
962f81137fSMasahiro Yamada			enable-method = "psci";
97cea59bd0SMasahiro Yamada		};
98cea59bd0SMasahiro Yamada
99cea59bd0SMasahiro Yamada		cpu3: cpu@101 {
100cea59bd0SMasahiro Yamada			device_type = "cpu";
101cea59bd0SMasahiro Yamada			compatible = "arm,cortex-a53", "arm,armv8";
102cea59bd0SMasahiro Yamada			reg = <0 0x101>;
1032f81137fSMasahiro Yamada			enable-method = "psci";
104cea59bd0SMasahiro Yamada		};
105cea59bd0SMasahiro Yamada	};
106cea59bd0SMasahiro Yamada
1072f81137fSMasahiro Yamada	psci {
1082f81137fSMasahiro Yamada		compatible = "arm,psci-1.0";
1092f81137fSMasahiro Yamada		method = "smc";
1102f81137fSMasahiro Yamada	};
1112f81137fSMasahiro Yamada
112cea59bd0SMasahiro Yamada	clocks {
113cea59bd0SMasahiro Yamada		refclk: ref {
114cea59bd0SMasahiro Yamada			compatible = "fixed-clock";
115cea59bd0SMasahiro Yamada			#clock-cells = <0>;
116cea59bd0SMasahiro Yamada			clock-frequency = <25000000>;
117cea59bd0SMasahiro Yamada		};
118cea59bd0SMasahiro Yamada	};
119cea59bd0SMasahiro Yamada
120cea59bd0SMasahiro Yamada	timer {
121cea59bd0SMasahiro Yamada		compatible = "arm,armv8-timer";
12237179033SArnd Bergmann		interrupts = <1 13 4>,
12337179033SArnd Bergmann			     <1 14 4>,
12437179033SArnd Bergmann			     <1 11 4>,
12537179033SArnd Bergmann			     <1 10 4>;
126cea59bd0SMasahiro Yamada	};
127cea59bd0SMasahiro Yamada
128cea59bd0SMasahiro Yamada	soc {
129cea59bd0SMasahiro Yamada		compatible = "simple-bus";
130cea59bd0SMasahiro Yamada		#address-cells = <1>;
131cea59bd0SMasahiro Yamada		#size-cells = <1>;
132cea59bd0SMasahiro Yamada		ranges = <0 0 0 0xffffffff>;
133cea59bd0SMasahiro Yamada
134cea59bd0SMasahiro Yamada		serial0: serial@54006800 {
135cea59bd0SMasahiro Yamada			compatible = "socionext,uniphier-uart";
136cea59bd0SMasahiro Yamada			status = "disabled";
137cea59bd0SMasahiro Yamada			reg = <0x54006800 0x40>;
138cea59bd0SMasahiro Yamada			interrupts = <0 33 4>;
139cea59bd0SMasahiro Yamada			pinctrl-names = "default";
140cea59bd0SMasahiro Yamada			pinctrl-0 = <&pinctrl_uart0>;
14142aee275SMasahiro Yamada			clocks = <&peri_clk 0>;
142cea59bd0SMasahiro Yamada		};
143cea59bd0SMasahiro Yamada
144cea59bd0SMasahiro Yamada		serial1: serial@54006900 {
145cea59bd0SMasahiro Yamada			compatible = "socionext,uniphier-uart";
146cea59bd0SMasahiro Yamada			status = "disabled";
147cea59bd0SMasahiro Yamada			reg = <0x54006900 0x40>;
148cea59bd0SMasahiro Yamada			interrupts = <0 35 4>;
149cea59bd0SMasahiro Yamada			pinctrl-names = "default";
150cea59bd0SMasahiro Yamada			pinctrl-0 = <&pinctrl_uart1>;
15142aee275SMasahiro Yamada			clocks = <&peri_clk 1>;
152cea59bd0SMasahiro Yamada		};
153cea59bd0SMasahiro Yamada
154cea59bd0SMasahiro Yamada		serial2: serial@54006a00 {
155cea59bd0SMasahiro Yamada			compatible = "socionext,uniphier-uart";
156cea59bd0SMasahiro Yamada			status = "disabled";
157cea59bd0SMasahiro Yamada			reg = <0x54006a00 0x40>;
158cea59bd0SMasahiro Yamada			interrupts = <0 37 4>;
159cea59bd0SMasahiro Yamada			pinctrl-names = "default";
160cea59bd0SMasahiro Yamada			pinctrl-0 = <&pinctrl_uart2>;
16142aee275SMasahiro Yamada			clocks = <&peri_clk 2>;
162cea59bd0SMasahiro Yamada		};
163cea59bd0SMasahiro Yamada
164cea59bd0SMasahiro Yamada		serial3: serial@54006b00 {
165cea59bd0SMasahiro Yamada			compatible = "socionext,uniphier-uart";
166cea59bd0SMasahiro Yamada			status = "disabled";
167cea59bd0SMasahiro Yamada			reg = <0x54006b00 0x40>;
168cea59bd0SMasahiro Yamada			interrupts = <0 177 4>;
169cea59bd0SMasahiro Yamada			pinctrl-names = "default";
170cea59bd0SMasahiro Yamada			pinctrl-0 = <&pinctrl_uart3>;
17142aee275SMasahiro Yamada			clocks = <&peri_clk 3>;
172cea59bd0SMasahiro Yamada		};
173cea59bd0SMasahiro Yamada
174cea59bd0SMasahiro Yamada		i2c0: i2c@58780000 {
175cea59bd0SMasahiro Yamada			compatible = "socionext,uniphier-fi2c";
176cea59bd0SMasahiro Yamada			status = "disabled";
177cea59bd0SMasahiro Yamada			reg = <0x58780000 0x80>;
178cea59bd0SMasahiro Yamada			#address-cells = <1>;
179cea59bd0SMasahiro Yamada			#size-cells = <0>;
180cea59bd0SMasahiro Yamada			interrupts = <0 41 4>;
181cea59bd0SMasahiro Yamada			pinctrl-names = "default";
182cea59bd0SMasahiro Yamada			pinctrl-0 = <&pinctrl_i2c0>;
18342aee275SMasahiro Yamada			clocks = <&peri_clk 4>;
184cea59bd0SMasahiro Yamada			clock-frequency = <100000>;
185cea59bd0SMasahiro Yamada		};
186cea59bd0SMasahiro Yamada
187cea59bd0SMasahiro Yamada		i2c1: i2c@58781000 {
188cea59bd0SMasahiro Yamada			compatible = "socionext,uniphier-fi2c";
189cea59bd0SMasahiro Yamada			status = "disabled";
190cea59bd0SMasahiro Yamada			reg = <0x58781000 0x80>;
191cea59bd0SMasahiro Yamada			#address-cells = <1>;
192cea59bd0SMasahiro Yamada			#size-cells = <0>;
193cea59bd0SMasahiro Yamada			interrupts = <0 42 4>;
194cea59bd0SMasahiro Yamada			pinctrl-names = "default";
195cea59bd0SMasahiro Yamada			pinctrl-0 = <&pinctrl_i2c1>;
19642aee275SMasahiro Yamada			clocks = <&peri_clk 5>;
197cea59bd0SMasahiro Yamada			clock-frequency = <100000>;
198cea59bd0SMasahiro Yamada		};
199cea59bd0SMasahiro Yamada
200cea59bd0SMasahiro Yamada		i2c2: i2c@58782000 {
201cea59bd0SMasahiro Yamada			compatible = "socionext,uniphier-fi2c";
202cea59bd0SMasahiro Yamada			reg = <0x58782000 0x80>;
203cea59bd0SMasahiro Yamada			#address-cells = <1>;
204cea59bd0SMasahiro Yamada			#size-cells = <0>;
205cea59bd0SMasahiro Yamada			interrupts = <0 43 4>;
20642aee275SMasahiro Yamada			clocks = <&peri_clk 6>;
207cea59bd0SMasahiro Yamada			clock-frequency = <400000>;
208cea59bd0SMasahiro Yamada		};
209cea59bd0SMasahiro Yamada
210cea59bd0SMasahiro Yamada		i2c3: i2c@58783000 {
211cea59bd0SMasahiro Yamada			compatible = "socionext,uniphier-fi2c";
212cea59bd0SMasahiro Yamada			status = "disabled";
213cea59bd0SMasahiro Yamada			reg = <0x58783000 0x80>;
214cea59bd0SMasahiro Yamada			#address-cells = <1>;
215cea59bd0SMasahiro Yamada			#size-cells = <0>;
216cea59bd0SMasahiro Yamada			interrupts = <0 44 4>;
217cea59bd0SMasahiro Yamada			pinctrl-names = "default";
218cea59bd0SMasahiro Yamada			pinctrl-0 = <&pinctrl_i2c3>;
21942aee275SMasahiro Yamada			clocks = <&peri_clk 7>;
220cea59bd0SMasahiro Yamada			clock-frequency = <100000>;
221cea59bd0SMasahiro Yamada		};
222cea59bd0SMasahiro Yamada
223cea59bd0SMasahiro Yamada		i2c4: i2c@58784000 {
224cea59bd0SMasahiro Yamada			compatible = "socionext,uniphier-fi2c";
225cea59bd0SMasahiro Yamada			status = "disabled";
226cea59bd0SMasahiro Yamada			reg = <0x58784000 0x80>;
227cea59bd0SMasahiro Yamada			#address-cells = <1>;
228cea59bd0SMasahiro Yamada			#size-cells = <0>;
229cea59bd0SMasahiro Yamada			interrupts = <0 45 4>;
230cea59bd0SMasahiro Yamada			pinctrl-names = "default";
231cea59bd0SMasahiro Yamada			pinctrl-0 = <&pinctrl_i2c4>;
23242aee275SMasahiro Yamada			clocks = <&peri_clk 8>;
233cea59bd0SMasahiro Yamada			clock-frequency = <100000>;
234cea59bd0SMasahiro Yamada		};
235cea59bd0SMasahiro Yamada
236cea59bd0SMasahiro Yamada		i2c5: i2c@58785000 {
237cea59bd0SMasahiro Yamada			compatible = "socionext,uniphier-fi2c";
238cea59bd0SMasahiro Yamada			reg = <0x58785000 0x80>;
239cea59bd0SMasahiro Yamada			#address-cells = <1>;
240cea59bd0SMasahiro Yamada			#size-cells = <0>;
241cea59bd0SMasahiro Yamada			interrupts = <0 25 4>;
24242aee275SMasahiro Yamada			clocks = <&peri_clk 9>;
243cea59bd0SMasahiro Yamada			clock-frequency = <400000>;
244cea59bd0SMasahiro Yamada		};
245cea59bd0SMasahiro Yamada
246cea59bd0SMasahiro Yamada		system_bus: system-bus@58c00000 {
247cea59bd0SMasahiro Yamada			compatible = "socionext,uniphier-system-bus";
248cea59bd0SMasahiro Yamada			status = "disabled";
249cea59bd0SMasahiro Yamada			reg = <0x58c00000 0x400>;
250cea59bd0SMasahiro Yamada			#address-cells = <2>;
251cea59bd0SMasahiro Yamada			#size-cells = <1>;
2525d9a83c9SMasahiro Yamada			pinctrl-names = "default";
2535d9a83c9SMasahiro Yamada			pinctrl-0 = <&pinctrl_system_bus>;
254cea59bd0SMasahiro Yamada		};
255cea59bd0SMasahiro Yamada
256cea59bd0SMasahiro Yamada		smpctrl@59800000 {
257cea59bd0SMasahiro Yamada			compatible = "socionext,uniphier-smpctrl";
258cea59bd0SMasahiro Yamada			reg = <0x59801000 0x400>;
259cea59bd0SMasahiro Yamada		};
260cea59bd0SMasahiro Yamada
2618e68c65dSMasahiro Yamada		sdctrl@59810000 {
2628e68c65dSMasahiro Yamada			compatible = "socionext,uniphier-ld20-sdctrl",
26342aee275SMasahiro Yamada				     "simple-mfd", "syscon";
26442aee275SMasahiro Yamada			reg = <0x59810000 0x800>;
26542aee275SMasahiro Yamada
2668e68c65dSMasahiro Yamada			sd_clk: clock {
2678e68c65dSMasahiro Yamada				compatible = "socionext,uniphier-ld20-sd-clock";
26842aee275SMasahiro Yamada				#clock-cells = <1>;
26942aee275SMasahiro Yamada			};
27042aee275SMasahiro Yamada
2718e68c65dSMasahiro Yamada			sd_rst: reset {
2728e68c65dSMasahiro Yamada				compatible = "socionext,uniphier-ld20-sd-reset";
27342aee275SMasahiro Yamada				#reset-cells = <1>;
27442aee275SMasahiro Yamada			};
27542aee275SMasahiro Yamada		};
27642aee275SMasahiro Yamada
27742aee275SMasahiro Yamada		perictrl@59820000 {
27842aee275SMasahiro Yamada			compatible = "socionext,uniphier-perictrl",
27942aee275SMasahiro Yamada				     "simple-mfd", "syscon";
28042aee275SMasahiro Yamada			reg = <0x59820000 0x200>;
28142aee275SMasahiro Yamada
28242aee275SMasahiro Yamada			peri_clk: clock {
28342aee275SMasahiro Yamada				compatible = "socionext,uniphier-ld20-peri-clock";
28442aee275SMasahiro Yamada				#clock-cells = <1>;
28542aee275SMasahiro Yamada			};
28642aee275SMasahiro Yamada
28742aee275SMasahiro Yamada			peri_rst: reset {
28842aee275SMasahiro Yamada				compatible = "socionext,uniphier-ld20-peri-reset";
28942aee275SMasahiro Yamada				#reset-cells = <1>;
29042aee275SMasahiro Yamada			};
29142aee275SMasahiro Yamada		};
29242aee275SMasahiro Yamada
293cea59bd0SMasahiro Yamada		soc-glue@5f800000 {
2949d4f5505SMasahiro Yamada			compatible = "socionext,uniphier-soc-glue",
2959d4f5505SMasahiro Yamada				     "simple-mfd", "syscon";
296cea59bd0SMasahiro Yamada			reg = <0x5f800000 0x2000>;
297cea59bd0SMasahiro Yamada
298cea59bd0SMasahiro Yamada			pinctrl: pinctrl {
299cea59bd0SMasahiro Yamada				compatible = "socionext,uniphier-ld20-pinctrl";
300cea59bd0SMasahiro Yamada			};
301cea59bd0SMasahiro Yamada		};
302cea59bd0SMasahiro Yamada
303cea59bd0SMasahiro Yamada		gic: interrupt-controller@5fe00000 {
304cea59bd0SMasahiro Yamada			compatible = "arm,gic-v3";
305cea59bd0SMasahiro Yamada			reg = <0x5fe00000 0x10000>,	/* GICD */
306cea59bd0SMasahiro Yamada			      <0x5fe80000 0x80000>;	/* GICR */
307cea59bd0SMasahiro Yamada			interrupt-controller;
308cea59bd0SMasahiro Yamada			#interrupt-cells = <3>;
309cea59bd0SMasahiro Yamada			interrupts = <1 9 4>;
310cea59bd0SMasahiro Yamada		};
31142aee275SMasahiro Yamada
31242aee275SMasahiro Yamada		sysctrl@61840000 {
31342aee275SMasahiro Yamada			compatible = "socionext,uniphier-sysctrl",
31442aee275SMasahiro Yamada				     "simple-mfd", "syscon";
3151ef64af8SMasahiro Yamada			reg = <0x61840000 0x10000>;
31642aee275SMasahiro Yamada
31742aee275SMasahiro Yamada			sys_clk: clock {
31842aee275SMasahiro Yamada				compatible = "socionext,uniphier-ld20-clock";
31942aee275SMasahiro Yamada				#clock-cells = <1>;
32042aee275SMasahiro Yamada			};
32142aee275SMasahiro Yamada
32242aee275SMasahiro Yamada			sys_rst: reset {
32342aee275SMasahiro Yamada				compatible = "socionext,uniphier-ld20-reset";
32442aee275SMasahiro Yamada				#reset-cells = <1>;
32542aee275SMasahiro Yamada			};
32642aee275SMasahiro Yamada		};
327cea59bd0SMasahiro Yamada	};
328cea59bd0SMasahiro Yamada};
329cea59bd0SMasahiro Yamada
330cea59bd0SMasahiro Yamada/include/ "uniphier-pinctrl.dtsi"
331