105f7e3d1SMasahiro Yamada// SPDX-License-Identifier: GPL-2.0+ OR MIT 205f7e3d1SMasahiro Yamada// 305f7e3d1SMasahiro Yamada// Device Tree Source for UniPhier LD20 SoC 405f7e3d1SMasahiro Yamada// 505f7e3d1SMasahiro Yamada// Copyright (C) 2015-2016 Socionext Inc. 605f7e3d1SMasahiro Yamada// Author: Masahiro Yamada <yamada.masahiro@socionext.com> 7cea59bd0SMasahiro Yamada 8b6e5ec20SMasahiro Yamada#include <dt-bindings/gpio/gpio.h> 98311ca57SMasahiro Yamada#include <dt-bindings/gpio/uniphier-gpio.h> 10dba74980SKunihiko Hayashi#include <dt-bindings/thermal/thermal.h> 11dba74980SKunihiko Hayashi 12cea59bd0SMasahiro Yamada/ { 13cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20"; 14cea59bd0SMasahiro Yamada #address-cells = <2>; 15cea59bd0SMasahiro Yamada #size-cells = <2>; 16cea59bd0SMasahiro Yamada interrupt-parent = <&gic>; 17cea59bd0SMasahiro Yamada 18cea59bd0SMasahiro Yamada cpus { 19cea59bd0SMasahiro Yamada #address-cells = <2>; 20cea59bd0SMasahiro Yamada #size-cells = <0>; 21cea59bd0SMasahiro Yamada 22cea59bd0SMasahiro Yamada cpu-map { 23cea59bd0SMasahiro Yamada cluster0 { 24cea59bd0SMasahiro Yamada core0 { 25cea59bd0SMasahiro Yamada cpu = <&cpu0>; 26cea59bd0SMasahiro Yamada }; 27cea59bd0SMasahiro Yamada core1 { 28cea59bd0SMasahiro Yamada cpu = <&cpu1>; 29cea59bd0SMasahiro Yamada }; 30cea59bd0SMasahiro Yamada }; 31cea59bd0SMasahiro Yamada 32cea59bd0SMasahiro Yamada cluster1 { 33cea59bd0SMasahiro Yamada core0 { 34cea59bd0SMasahiro Yamada cpu = <&cpu2>; 35cea59bd0SMasahiro Yamada }; 36cea59bd0SMasahiro Yamada core1 { 37cea59bd0SMasahiro Yamada cpu = <&cpu3>; 38cea59bd0SMasahiro Yamada }; 39cea59bd0SMasahiro Yamada }; 40cea59bd0SMasahiro Yamada }; 41cea59bd0SMasahiro Yamada 42cea59bd0SMasahiro Yamada cpu0: cpu@0 { 43cea59bd0SMasahiro Yamada device_type = "cpu"; 4431af04cdSRob Herring compatible = "arm,cortex-a72"; 45cea59bd0SMasahiro Yamada reg = <0 0x000>; 46183ad366SMasahiro Yamada clocks = <&sys_clk 32>; 472f81137fSMasahiro Yamada enable-method = "psci"; 48183ad366SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 49dba74980SKunihiko Hayashi #cooling-cells = <2>; 50cea59bd0SMasahiro Yamada }; 51cea59bd0SMasahiro Yamada 52cea59bd0SMasahiro Yamada cpu1: cpu@1 { 53cea59bd0SMasahiro Yamada device_type = "cpu"; 5431af04cdSRob Herring compatible = "arm,cortex-a72"; 55cea59bd0SMasahiro Yamada reg = <0 0x001>; 56183ad366SMasahiro Yamada clocks = <&sys_clk 32>; 572f81137fSMasahiro Yamada enable-method = "psci"; 58183ad366SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 59af0e09d0SViresh Kumar #cooling-cells = <2>; 60cea59bd0SMasahiro Yamada }; 61cea59bd0SMasahiro Yamada 62cea59bd0SMasahiro Yamada cpu2: cpu@100 { 63cea59bd0SMasahiro Yamada device_type = "cpu"; 6431af04cdSRob Herring compatible = "arm,cortex-a53"; 65cea59bd0SMasahiro Yamada reg = <0 0x100>; 66183ad366SMasahiro Yamada clocks = <&sys_clk 33>; 672f81137fSMasahiro Yamada enable-method = "psci"; 68183ad366SMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 69dba74980SKunihiko Hayashi #cooling-cells = <2>; 70cea59bd0SMasahiro Yamada }; 71cea59bd0SMasahiro Yamada 72cea59bd0SMasahiro Yamada cpu3: cpu@101 { 73cea59bd0SMasahiro Yamada device_type = "cpu"; 7431af04cdSRob Herring compatible = "arm,cortex-a53"; 75cea59bd0SMasahiro Yamada reg = <0 0x101>; 76183ad366SMasahiro Yamada clocks = <&sys_clk 33>; 772f81137fSMasahiro Yamada enable-method = "psci"; 78183ad366SMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 79af0e09d0SViresh Kumar #cooling-cells = <2>; 80183ad366SMasahiro Yamada }; 81183ad366SMasahiro Yamada }; 82183ad366SMasahiro Yamada 839cd7d03fSMasahiro Yamada cluster0_opp: opp-table0 { 84183ad366SMasahiro Yamada compatible = "operating-points-v2"; 85183ad366SMasahiro Yamada opp-shared; 86183ad366SMasahiro Yamada 873fc9a121SViresh Kumar opp-250000000 { 88183ad366SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 89183ad366SMasahiro Yamada clock-latency-ns = <300>; 90183ad366SMasahiro Yamada }; 913fc9a121SViresh Kumar opp-275000000 { 92183ad366SMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 93183ad366SMasahiro Yamada clock-latency-ns = <300>; 94183ad366SMasahiro Yamada }; 953fc9a121SViresh Kumar opp-500000000 { 96183ad366SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 97183ad366SMasahiro Yamada clock-latency-ns = <300>; 98183ad366SMasahiro Yamada }; 993fc9a121SViresh Kumar opp-550000000 { 100183ad366SMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 101183ad366SMasahiro Yamada clock-latency-ns = <300>; 102183ad366SMasahiro Yamada }; 1033fc9a121SViresh Kumar opp-666667000 { 104183ad366SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 105183ad366SMasahiro Yamada clock-latency-ns = <300>; 106183ad366SMasahiro Yamada }; 1073fc9a121SViresh Kumar opp-733334000 { 108183ad366SMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 109183ad366SMasahiro Yamada clock-latency-ns = <300>; 110183ad366SMasahiro Yamada }; 1113fc9a121SViresh Kumar opp-1000000000 { 112183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 113183ad366SMasahiro Yamada clock-latency-ns = <300>; 114183ad366SMasahiro Yamada }; 1153fc9a121SViresh Kumar opp-1100000000 { 116183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 117183ad366SMasahiro Yamada clock-latency-ns = <300>; 118183ad366SMasahiro Yamada }; 119183ad366SMasahiro Yamada }; 120183ad366SMasahiro Yamada 1219cd7d03fSMasahiro Yamada cluster1_opp: opp-table1 { 122183ad366SMasahiro Yamada compatible = "operating-points-v2"; 123183ad366SMasahiro Yamada opp-shared; 124183ad366SMasahiro Yamada 1253fc9a121SViresh Kumar opp-250000000 { 126183ad366SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 127183ad366SMasahiro Yamada clock-latency-ns = <300>; 128183ad366SMasahiro Yamada }; 1293fc9a121SViresh Kumar opp-275000000 { 130183ad366SMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 131183ad366SMasahiro Yamada clock-latency-ns = <300>; 132183ad366SMasahiro Yamada }; 1333fc9a121SViresh Kumar opp-500000000 { 134183ad366SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 135183ad366SMasahiro Yamada clock-latency-ns = <300>; 136183ad366SMasahiro Yamada }; 1373fc9a121SViresh Kumar opp-550000000 { 138183ad366SMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 139183ad366SMasahiro Yamada clock-latency-ns = <300>; 140183ad366SMasahiro Yamada }; 1413fc9a121SViresh Kumar opp-666667000 { 142183ad366SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 143183ad366SMasahiro Yamada clock-latency-ns = <300>; 144183ad366SMasahiro Yamada }; 1453fc9a121SViresh Kumar opp-733334000 { 146183ad366SMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 147183ad366SMasahiro Yamada clock-latency-ns = <300>; 148183ad366SMasahiro Yamada }; 1493fc9a121SViresh Kumar opp-1000000000 { 150183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 151183ad366SMasahiro Yamada clock-latency-ns = <300>; 152183ad366SMasahiro Yamada }; 1533fc9a121SViresh Kumar opp-1100000000 { 154183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 155183ad366SMasahiro Yamada clock-latency-ns = <300>; 156cea59bd0SMasahiro Yamada }; 157cea59bd0SMasahiro Yamada }; 158cea59bd0SMasahiro Yamada 1592f81137fSMasahiro Yamada psci { 1602f81137fSMasahiro Yamada compatible = "arm,psci-1.0"; 1612f81137fSMasahiro Yamada method = "smc"; 1622f81137fSMasahiro Yamada }; 1632f81137fSMasahiro Yamada 164cea59bd0SMasahiro Yamada clocks { 165cea59bd0SMasahiro Yamada refclk: ref { 166cea59bd0SMasahiro Yamada compatible = "fixed-clock"; 167cea59bd0SMasahiro Yamada #clock-cells = <0>; 168cea59bd0SMasahiro Yamada clock-frequency = <25000000>; 169cea59bd0SMasahiro Yamada }; 170cea59bd0SMasahiro Yamada }; 171cea59bd0SMasahiro Yamada 172b6e5ec20SMasahiro Yamada emmc_pwrseq: emmc-pwrseq { 173b6e5ec20SMasahiro Yamada compatible = "mmc-pwrseq-emmc"; 1748311ca57SMasahiro Yamada reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>; 175b6e5ec20SMasahiro Yamada }; 176b6e5ec20SMasahiro Yamada 177cea59bd0SMasahiro Yamada timer { 178cea59bd0SMasahiro Yamada compatible = "arm,armv8-timer"; 17937179033SArnd Bergmann interrupts = <1 13 4>, 18037179033SArnd Bergmann <1 14 4>, 18137179033SArnd Bergmann <1 11 4>, 18237179033SArnd Bergmann <1 10 4>; 183cea59bd0SMasahiro Yamada }; 184cea59bd0SMasahiro Yamada 185dba74980SKunihiko Hayashi thermal-zones { 186dba74980SKunihiko Hayashi cpu-thermal { 187dba74980SKunihiko Hayashi polling-delay-passive = <250>; /* 250ms */ 188dba74980SKunihiko Hayashi polling-delay = <1000>; /* 1000ms */ 189dba74980SKunihiko Hayashi thermal-sensors = <&pvtctl>; 190dba74980SKunihiko Hayashi 191dba74980SKunihiko Hayashi trips { 192dba74980SKunihiko Hayashi cpu_crit: cpu-crit { 193dba74980SKunihiko Hayashi temperature = <110000>; /* 110C */ 194dba74980SKunihiko Hayashi hysteresis = <2000>; 195dba74980SKunihiko Hayashi type = "critical"; 196dba74980SKunihiko Hayashi }; 197dba74980SKunihiko Hayashi cpu_alert: cpu-alert { 198dba74980SKunihiko Hayashi temperature = <100000>; /* 100C */ 199dba74980SKunihiko Hayashi hysteresis = <2000>; 200dba74980SKunihiko Hayashi type = "passive"; 201dba74980SKunihiko Hayashi }; 202dba74980SKunihiko Hayashi }; 203dba74980SKunihiko Hayashi 204dba74980SKunihiko Hayashi cooling-maps { 205dba74980SKunihiko Hayashi map0 { 206dba74980SKunihiko Hayashi trip = <&cpu_alert>; 207072ae88aSViresh Kumar cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 208072ae88aSViresh Kumar <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 209072ae88aSViresh Kumar <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 210072ae88aSViresh Kumar <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 211dba74980SKunihiko Hayashi }; 212dba74980SKunihiko Hayashi }; 213dba74980SKunihiko Hayashi }; 214dba74980SKunihiko Hayashi }; 215dba74980SKunihiko Hayashi 216aa385712SMasahiro Yamada reserved-memory { 217aa385712SMasahiro Yamada #address-cells = <2>; 218aa385712SMasahiro Yamada #size-cells = <2>; 219aa385712SMasahiro Yamada ranges; 220aa385712SMasahiro Yamada 221aa385712SMasahiro Yamada secure-memory@81000000 { 222aa385712SMasahiro Yamada reg = <0x0 0x81000000 0x0 0x01000000>; 223aa385712SMasahiro Yamada no-map; 224aa385712SMasahiro Yamada }; 225aa385712SMasahiro Yamada }; 226aa385712SMasahiro Yamada 227b5027603SMasahiro Yamada soc@0 { 228cea59bd0SMasahiro Yamada compatible = "simple-bus"; 229cea59bd0SMasahiro Yamada #address-cells = <1>; 230cea59bd0SMasahiro Yamada #size-cells = <1>; 231cea59bd0SMasahiro Yamada ranges = <0 0 0 0xffffffff>; 232cea59bd0SMasahiro Yamada 233925c5c32SKunihiko Hayashi spi0: spi@54006000 { 234925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 235925c5c32SKunihiko Hayashi status = "disabled"; 236925c5c32SKunihiko Hayashi reg = <0x54006000 0x100>; 2371a13827bSMasahiro Yamada #address-cells = <1>; 2381a13827bSMasahiro Yamada #size-cells = <0>; 239925c5c32SKunihiko Hayashi interrupts = <0 39 4>; 240925c5c32SKunihiko Hayashi pinctrl-names = "default"; 241925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi0>; 242925c5c32SKunihiko Hayashi clocks = <&peri_clk 11>; 243925c5c32SKunihiko Hayashi resets = <&peri_rst 11>; 244925c5c32SKunihiko Hayashi }; 245925c5c32SKunihiko Hayashi 246925c5c32SKunihiko Hayashi spi1: spi@54006100 { 247925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 248925c5c32SKunihiko Hayashi status = "disabled"; 249925c5c32SKunihiko Hayashi reg = <0x54006100 0x100>; 2501a13827bSMasahiro Yamada #address-cells = <1>; 2511a13827bSMasahiro Yamada #size-cells = <0>; 252925c5c32SKunihiko Hayashi interrupts = <0 216 4>; 253925c5c32SKunihiko Hayashi pinctrl-names = "default"; 254925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi1>; 255fdf9c17bSKunihiko Hayashi clocks = <&peri_clk 12>; 256fdf9c17bSKunihiko Hayashi resets = <&peri_rst 12>; 257925c5c32SKunihiko Hayashi }; 258925c5c32SKunihiko Hayashi 259925c5c32SKunihiko Hayashi spi2: spi@54006200 { 260925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 261925c5c32SKunihiko Hayashi status = "disabled"; 262925c5c32SKunihiko Hayashi reg = <0x54006200 0x100>; 2631a13827bSMasahiro Yamada #address-cells = <1>; 2641a13827bSMasahiro Yamada #size-cells = <0>; 265925c5c32SKunihiko Hayashi interrupts = <0 229 4>; 266925c5c32SKunihiko Hayashi pinctrl-names = "default"; 267925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi2>; 268fdf9c17bSKunihiko Hayashi clocks = <&peri_clk 13>; 269fdf9c17bSKunihiko Hayashi resets = <&peri_rst 13>; 270925c5c32SKunihiko Hayashi }; 271925c5c32SKunihiko Hayashi 272925c5c32SKunihiko Hayashi spi3: spi@54006300 { 273925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 274925c5c32SKunihiko Hayashi status = "disabled"; 275925c5c32SKunihiko Hayashi reg = <0x54006300 0x100>; 2761a13827bSMasahiro Yamada #address-cells = <1>; 2771a13827bSMasahiro Yamada #size-cells = <0>; 278925c5c32SKunihiko Hayashi interrupts = <0 230 4>; 279925c5c32SKunihiko Hayashi pinctrl-names = "default"; 280925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi3>; 281fdf9c17bSKunihiko Hayashi clocks = <&peri_clk 14>; 282fdf9c17bSKunihiko Hayashi resets = <&peri_rst 14>; 283925c5c32SKunihiko Hayashi }; 284925c5c32SKunihiko Hayashi 285cea59bd0SMasahiro Yamada serial0: serial@54006800 { 286cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 287cea59bd0SMasahiro Yamada status = "disabled"; 288cea59bd0SMasahiro Yamada reg = <0x54006800 0x40>; 289cea59bd0SMasahiro Yamada interrupts = <0 33 4>; 290cea59bd0SMasahiro Yamada pinctrl-names = "default"; 291cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 29242aee275SMasahiro Yamada clocks = <&peri_clk 0>; 29376c48e1eSMasahiro Yamada resets = <&peri_rst 0>; 294cea59bd0SMasahiro Yamada }; 295cea59bd0SMasahiro Yamada 296cea59bd0SMasahiro Yamada serial1: serial@54006900 { 297cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 298cea59bd0SMasahiro Yamada status = "disabled"; 299cea59bd0SMasahiro Yamada reg = <0x54006900 0x40>; 300cea59bd0SMasahiro Yamada interrupts = <0 35 4>; 301cea59bd0SMasahiro Yamada pinctrl-names = "default"; 302cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 30342aee275SMasahiro Yamada clocks = <&peri_clk 1>; 30476c48e1eSMasahiro Yamada resets = <&peri_rst 1>; 305cea59bd0SMasahiro Yamada }; 306cea59bd0SMasahiro Yamada 307cea59bd0SMasahiro Yamada serial2: serial@54006a00 { 308cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 309cea59bd0SMasahiro Yamada status = "disabled"; 310cea59bd0SMasahiro Yamada reg = <0x54006a00 0x40>; 311cea59bd0SMasahiro Yamada interrupts = <0 37 4>; 312cea59bd0SMasahiro Yamada pinctrl-names = "default"; 313cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 31442aee275SMasahiro Yamada clocks = <&peri_clk 2>; 31576c48e1eSMasahiro Yamada resets = <&peri_rst 2>; 316cea59bd0SMasahiro Yamada }; 317cea59bd0SMasahiro Yamada 318cea59bd0SMasahiro Yamada serial3: serial@54006b00 { 319cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 320cea59bd0SMasahiro Yamada status = "disabled"; 321cea59bd0SMasahiro Yamada reg = <0x54006b00 0x40>; 322cea59bd0SMasahiro Yamada interrupts = <0 177 4>; 323cea59bd0SMasahiro Yamada pinctrl-names = "default"; 324cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 32542aee275SMasahiro Yamada clocks = <&peri_clk 3>; 32676c48e1eSMasahiro Yamada resets = <&peri_rst 3>; 327cea59bd0SMasahiro Yamada }; 328cea59bd0SMasahiro Yamada 329277b51e7SMasahiro Yamada gpio: gpio@55000000 { 330277b51e7SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 331277b51e7SMasahiro Yamada reg = <0x55000000 0x200>; 332277b51e7SMasahiro Yamada interrupt-parent = <&aidet>; 333277b51e7SMasahiro Yamada interrupt-controller; 334277b51e7SMasahiro Yamada #interrupt-cells = <2>; 335277b51e7SMasahiro Yamada gpio-controller; 336277b51e7SMasahiro Yamada #gpio-cells = <2>; 337277b51e7SMasahiro Yamada gpio-ranges = <&pinctrl 0 0 0>, 338277b51e7SMasahiro Yamada <&pinctrl 96 0 0>, 339277b51e7SMasahiro Yamada <&pinctrl 160 0 0>; 340277b51e7SMasahiro Yamada gpio-ranges-group-names = "gpio_range0", 341277b51e7SMasahiro Yamada "gpio_range1", 342277b51e7SMasahiro Yamada "gpio_range2"; 343277b51e7SMasahiro Yamada ngpios = <205>; 344277b51e7SMasahiro Yamada socionext,interrupt-ranges = <0 48 16>, <16 154 5>, 345277b51e7SMasahiro Yamada <21 217 3>; 346277b51e7SMasahiro Yamada }; 347277b51e7SMasahiro Yamada 348fb21a0acSKatsuhiro Suzuki audio@56000000 { 349fb21a0acSKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-aio"; 350fb21a0acSKatsuhiro Suzuki reg = <0x56000000 0x80000>; 351fb21a0acSKatsuhiro Suzuki interrupts = <0 144 4>; 352fb21a0acSKatsuhiro Suzuki pinctrl-names = "default"; 353fb21a0acSKatsuhiro Suzuki pinctrl-0 = <&pinctrl_aout1>, 354fb21a0acSKatsuhiro Suzuki <&pinctrl_aoutiec1>; 355fb21a0acSKatsuhiro Suzuki clock-names = "aio"; 356fb21a0acSKatsuhiro Suzuki clocks = <&sys_clk 40>; 357fb21a0acSKatsuhiro Suzuki reset-names = "aio"; 358fb21a0acSKatsuhiro Suzuki resets = <&sys_rst 40>; 359fb21a0acSKatsuhiro Suzuki #sound-dai-cells = <1>; 3606c35921dSKatsuhiro Suzuki socionext,syscon = <&soc_glue>; 361fb21a0acSKatsuhiro Suzuki 362fb21a0acSKatsuhiro Suzuki i2s_port0: port@0 { 363fb21a0acSKatsuhiro Suzuki i2s_hdmi: endpoint { 364fb21a0acSKatsuhiro Suzuki }; 365fb21a0acSKatsuhiro Suzuki }; 366fb21a0acSKatsuhiro Suzuki 367fb21a0acSKatsuhiro Suzuki i2s_port1: port@1 { 368fb21a0acSKatsuhiro Suzuki i2s_pcmin2: endpoint { 369fb21a0acSKatsuhiro Suzuki }; 370fb21a0acSKatsuhiro Suzuki }; 371fb21a0acSKatsuhiro Suzuki 372fb21a0acSKatsuhiro Suzuki i2s_port2: port@2 { 373fb21a0acSKatsuhiro Suzuki i2s_line: endpoint { 374fb21a0acSKatsuhiro Suzuki dai-format = "i2s"; 375fb21a0acSKatsuhiro Suzuki remote-endpoint = <&evea_line>; 376fb21a0acSKatsuhiro Suzuki }; 377fb21a0acSKatsuhiro Suzuki }; 378fb21a0acSKatsuhiro Suzuki 379fb21a0acSKatsuhiro Suzuki i2s_port3: port@3 { 380fb21a0acSKatsuhiro Suzuki i2s_hpcmout1: endpoint { 381fb21a0acSKatsuhiro Suzuki }; 382fb21a0acSKatsuhiro Suzuki }; 383fb21a0acSKatsuhiro Suzuki 384fb21a0acSKatsuhiro Suzuki i2s_port4: port@4 { 385fb21a0acSKatsuhiro Suzuki i2s_hp: endpoint { 386fb21a0acSKatsuhiro Suzuki dai-format = "i2s"; 387fb21a0acSKatsuhiro Suzuki remote-endpoint = <&evea_hp>; 388fb21a0acSKatsuhiro Suzuki }; 389fb21a0acSKatsuhiro Suzuki }; 390fb21a0acSKatsuhiro Suzuki 391fb21a0acSKatsuhiro Suzuki spdif_port0: port@5 { 392fb21a0acSKatsuhiro Suzuki spdif_hiecout1: endpoint { 393fb21a0acSKatsuhiro Suzuki }; 394fb21a0acSKatsuhiro Suzuki }; 395fb21a0acSKatsuhiro Suzuki 396fb21a0acSKatsuhiro Suzuki src_port0: port@6 { 397fb21a0acSKatsuhiro Suzuki i2s_epcmout2: endpoint { 398fb21a0acSKatsuhiro Suzuki }; 399fb21a0acSKatsuhiro Suzuki }; 400fb21a0acSKatsuhiro Suzuki 401fb21a0acSKatsuhiro Suzuki src_port1: port@7 { 402fb21a0acSKatsuhiro Suzuki i2s_epcmout3: endpoint { 403fb21a0acSKatsuhiro Suzuki }; 404fb21a0acSKatsuhiro Suzuki }; 405fb21a0acSKatsuhiro Suzuki 406fb21a0acSKatsuhiro Suzuki comp_spdif_port0: port@8 { 407fb21a0acSKatsuhiro Suzuki comp_spdif_hiecout1: endpoint { 408fb21a0acSKatsuhiro Suzuki }; 409fb21a0acSKatsuhiro Suzuki }; 410fb21a0acSKatsuhiro Suzuki }; 411fb21a0acSKatsuhiro Suzuki 412fb21a0acSKatsuhiro Suzuki codec@57900000 { 413fb21a0acSKatsuhiro Suzuki compatible = "socionext,uniphier-evea"; 414fb21a0acSKatsuhiro Suzuki reg = <0x57900000 0x1000>; 415fb21a0acSKatsuhiro Suzuki clock-names = "evea", "exiv"; 416fb21a0acSKatsuhiro Suzuki clocks = <&sys_clk 41>, <&sys_clk 42>; 417fb21a0acSKatsuhiro Suzuki reset-names = "evea", "exiv", "adamv"; 418fb21a0acSKatsuhiro Suzuki resets = <&sys_rst 41>, <&sys_rst 42>, <&adamv_rst 0>; 419fb21a0acSKatsuhiro Suzuki #sound-dai-cells = <1>; 420fb21a0acSKatsuhiro Suzuki 421fb21a0acSKatsuhiro Suzuki port@0 { 422fb21a0acSKatsuhiro Suzuki evea_line: endpoint { 423fb21a0acSKatsuhiro Suzuki remote-endpoint = <&i2s_line>; 424fb21a0acSKatsuhiro Suzuki }; 425fb21a0acSKatsuhiro Suzuki }; 426fb21a0acSKatsuhiro Suzuki 427fb21a0acSKatsuhiro Suzuki port@1 { 428fb21a0acSKatsuhiro Suzuki evea_hp: endpoint { 429fb21a0acSKatsuhiro Suzuki remote-endpoint = <&i2s_hp>; 430fb21a0acSKatsuhiro Suzuki }; 431fb21a0acSKatsuhiro Suzuki }; 432fb21a0acSKatsuhiro Suzuki }; 433fb21a0acSKatsuhiro Suzuki 434178b3568SKatsuhiro Suzuki adamv@57920000 { 435178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-adamv", 436178b3568SKatsuhiro Suzuki "simple-mfd", "syscon"; 437178b3568SKatsuhiro Suzuki reg = <0x57920000 0x1000>; 438178b3568SKatsuhiro Suzuki 439178b3568SKatsuhiro Suzuki adamv_rst: reset { 440178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-adamv-reset"; 441178b3568SKatsuhiro Suzuki #reset-cells = <1>; 442178b3568SKatsuhiro Suzuki }; 443178b3568SKatsuhiro Suzuki }; 444178b3568SKatsuhiro Suzuki 445cea59bd0SMasahiro Yamada i2c0: i2c@58780000 { 446cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 447cea59bd0SMasahiro Yamada status = "disabled"; 448cea59bd0SMasahiro Yamada reg = <0x58780000 0x80>; 449cea59bd0SMasahiro Yamada #address-cells = <1>; 450cea59bd0SMasahiro Yamada #size-cells = <0>; 451cea59bd0SMasahiro Yamada interrupts = <0 41 4>; 452cea59bd0SMasahiro Yamada pinctrl-names = "default"; 453cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 45442aee275SMasahiro Yamada clocks = <&peri_clk 4>; 45576c48e1eSMasahiro Yamada resets = <&peri_rst 4>; 456cea59bd0SMasahiro Yamada clock-frequency = <100000>; 457cea59bd0SMasahiro Yamada }; 458cea59bd0SMasahiro Yamada 459cea59bd0SMasahiro Yamada i2c1: i2c@58781000 { 460cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 461cea59bd0SMasahiro Yamada status = "disabled"; 462cea59bd0SMasahiro Yamada reg = <0x58781000 0x80>; 463cea59bd0SMasahiro Yamada #address-cells = <1>; 464cea59bd0SMasahiro Yamada #size-cells = <0>; 465cea59bd0SMasahiro Yamada interrupts = <0 42 4>; 466cea59bd0SMasahiro Yamada pinctrl-names = "default"; 467cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 46842aee275SMasahiro Yamada clocks = <&peri_clk 5>; 46976c48e1eSMasahiro Yamada resets = <&peri_rst 5>; 470cea59bd0SMasahiro Yamada clock-frequency = <100000>; 471cea59bd0SMasahiro Yamada }; 472cea59bd0SMasahiro Yamada 473cea59bd0SMasahiro Yamada i2c2: i2c@58782000 { 474cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 475cea59bd0SMasahiro Yamada reg = <0x58782000 0x80>; 476cea59bd0SMasahiro Yamada #address-cells = <1>; 477cea59bd0SMasahiro Yamada #size-cells = <0>; 478cea59bd0SMasahiro Yamada interrupts = <0 43 4>; 47942aee275SMasahiro Yamada clocks = <&peri_clk 6>; 48076c48e1eSMasahiro Yamada resets = <&peri_rst 6>; 481cea59bd0SMasahiro Yamada clock-frequency = <400000>; 482cea59bd0SMasahiro Yamada }; 483cea59bd0SMasahiro Yamada 484cea59bd0SMasahiro Yamada i2c3: i2c@58783000 { 485cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 486cea59bd0SMasahiro Yamada status = "disabled"; 487cea59bd0SMasahiro Yamada reg = <0x58783000 0x80>; 488cea59bd0SMasahiro Yamada #address-cells = <1>; 489cea59bd0SMasahiro Yamada #size-cells = <0>; 490cea59bd0SMasahiro Yamada interrupts = <0 44 4>; 491cea59bd0SMasahiro Yamada pinctrl-names = "default"; 492cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 49342aee275SMasahiro Yamada clocks = <&peri_clk 7>; 49476c48e1eSMasahiro Yamada resets = <&peri_rst 7>; 495cea59bd0SMasahiro Yamada clock-frequency = <100000>; 496cea59bd0SMasahiro Yamada }; 497cea59bd0SMasahiro Yamada 498cea59bd0SMasahiro Yamada i2c4: i2c@58784000 { 499cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 500cea59bd0SMasahiro Yamada status = "disabled"; 501cea59bd0SMasahiro Yamada reg = <0x58784000 0x80>; 502cea59bd0SMasahiro Yamada #address-cells = <1>; 503cea59bd0SMasahiro Yamada #size-cells = <0>; 504cea59bd0SMasahiro Yamada interrupts = <0 45 4>; 505cea59bd0SMasahiro Yamada pinctrl-names = "default"; 506cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c4>; 50742aee275SMasahiro Yamada clocks = <&peri_clk 8>; 50876c48e1eSMasahiro Yamada resets = <&peri_rst 8>; 509cea59bd0SMasahiro Yamada clock-frequency = <100000>; 510cea59bd0SMasahiro Yamada }; 511cea59bd0SMasahiro Yamada 512cea59bd0SMasahiro Yamada i2c5: i2c@58785000 { 513cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 514cea59bd0SMasahiro Yamada reg = <0x58785000 0x80>; 515cea59bd0SMasahiro Yamada #address-cells = <1>; 516cea59bd0SMasahiro Yamada #size-cells = <0>; 517cea59bd0SMasahiro Yamada interrupts = <0 25 4>; 51842aee275SMasahiro Yamada clocks = <&peri_clk 9>; 51976c48e1eSMasahiro Yamada resets = <&peri_rst 9>; 520cea59bd0SMasahiro Yamada clock-frequency = <400000>; 521cea59bd0SMasahiro Yamada }; 522cea59bd0SMasahiro Yamada 523cea59bd0SMasahiro Yamada system_bus: system-bus@58c00000 { 524cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 525cea59bd0SMasahiro Yamada status = "disabled"; 526cea59bd0SMasahiro Yamada reg = <0x58c00000 0x400>; 527cea59bd0SMasahiro Yamada #address-cells = <2>; 528cea59bd0SMasahiro Yamada #size-cells = <1>; 5295d9a83c9SMasahiro Yamada pinctrl-names = "default"; 5305d9a83c9SMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 531cea59bd0SMasahiro Yamada }; 532cea59bd0SMasahiro Yamada 533b10ee7e3SMasahiro Yamada smpctrl@59801000 { 534cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 535cea59bd0SMasahiro Yamada reg = <0x59801000 0x400>; 536cea59bd0SMasahiro Yamada }; 537cea59bd0SMasahiro Yamada 5388e68c65dSMasahiro Yamada sdctrl@59810000 { 5398e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sdctrl", 54042aee275SMasahiro Yamada "simple-mfd", "syscon"; 541555861fbSMasahiro Yamada reg = <0x59810000 0x400>; 54242aee275SMasahiro Yamada 5438e68c65dSMasahiro Yamada sd_clk: clock { 5448e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-clock"; 54542aee275SMasahiro Yamada #clock-cells = <1>; 54642aee275SMasahiro Yamada }; 54742aee275SMasahiro Yamada 5488e68c65dSMasahiro Yamada sd_rst: reset { 5498e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-reset"; 55042aee275SMasahiro Yamada #reset-cells = <1>; 55142aee275SMasahiro Yamada }; 55242aee275SMasahiro Yamada }; 55342aee275SMasahiro Yamada 55442aee275SMasahiro Yamada perictrl@59820000 { 555fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-perictrl", 55642aee275SMasahiro Yamada "simple-mfd", "syscon"; 55742aee275SMasahiro Yamada reg = <0x59820000 0x200>; 55842aee275SMasahiro Yamada 55942aee275SMasahiro Yamada peri_clk: clock { 56042aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-clock"; 56142aee275SMasahiro Yamada #clock-cells = <1>; 56242aee275SMasahiro Yamada }; 56342aee275SMasahiro Yamada 56442aee275SMasahiro Yamada peri_rst: reset { 56542aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-reset"; 56642aee275SMasahiro Yamada #reset-cells = <1>; 56742aee275SMasahiro Yamada }; 56842aee275SMasahiro Yamada }; 56942aee275SMasahiro Yamada 570bb3f4672SMasahiro Yamada emmc: mmc@5a000000 { 5713a93cc26SMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 5723a93cc26SMasahiro Yamada reg = <0x5a000000 0x400>; 5733a93cc26SMasahiro Yamada interrupts = <0 78 4>; 5749c0a9700SMasahiro Yamada pinctrl-names = "default"; 5759c0a9700SMasahiro Yamada pinctrl-0 = <&pinctrl_emmc>; 5763a93cc26SMasahiro Yamada clocks = <&sys_clk 4>; 57776c48e1eSMasahiro Yamada resets = <&sys_rst 4>; 5783a93cc26SMasahiro Yamada bus-width = <8>; 5793a93cc26SMasahiro Yamada mmc-ddr-1_8v; 5803a93cc26SMasahiro Yamada mmc-hs200-1_8v; 581b6e5ec20SMasahiro Yamada mmc-pwrseq = <&emmc_pwrseq>; 582f4e5200fSMasahiro Yamada cdns,phy-input-delay-legacy = <9>; 583ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 584ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 585e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 586e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 5873a93cc26SMasahiro Yamada }; 5883a93cc26SMasahiro Yamada 589bb3f4672SMasahiro Yamada sd: mmc@5a400000 { 59084a9c4d5SMasahiro Yamada compatible = "socionext,uniphier-sd-v3.1.1"; 59184a9c4d5SMasahiro Yamada status = "disabled"; 59284a9c4d5SMasahiro Yamada reg = <0x5a400000 0x800>; 59384a9c4d5SMasahiro Yamada interrupts = <0 76 4>; 59484a9c4d5SMasahiro Yamada pinctrl-names = "default"; 59584a9c4d5SMasahiro Yamada pinctrl-0 = <&pinctrl_sd>; 59684a9c4d5SMasahiro Yamada clocks = <&sd_clk 0>; 59784a9c4d5SMasahiro Yamada reset-names = "host"; 59884a9c4d5SMasahiro Yamada resets = <&sd_rst 0>; 59984a9c4d5SMasahiro Yamada bus-width = <4>; 60084a9c4d5SMasahiro Yamada cap-sd-highspeed; 60184a9c4d5SMasahiro Yamada }; 60284a9c4d5SMasahiro Yamada 6036c35921dSKatsuhiro Suzuki soc_glue: soc-glue@5f800000 { 604fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-soc-glue", 6059d4f5505SMasahiro Yamada "simple-mfd", "syscon"; 606cea59bd0SMasahiro Yamada reg = <0x5f800000 0x2000>; 607cea59bd0SMasahiro Yamada 608cea59bd0SMasahiro Yamada pinctrl: pinctrl { 609cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20-pinctrl"; 610cea59bd0SMasahiro Yamada }; 611cea59bd0SMasahiro Yamada }; 612cea59bd0SMasahiro Yamada 613f05851e1SKeiji Hayashibara soc-glue@5f900000 { 614f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-ld20-soc-glue-debug", 615f05851e1SKeiji Hayashibara "simple-mfd"; 616f05851e1SKeiji Hayashibara #address-cells = <1>; 617f05851e1SKeiji Hayashibara #size-cells = <1>; 618f05851e1SKeiji Hayashibara ranges = <0 0x5f900000 0x2000>; 619f05851e1SKeiji Hayashibara 620f05851e1SKeiji Hayashibara efuse@100 { 621f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 622f05851e1SKeiji Hayashibara reg = <0x100 0x28>; 623f05851e1SKeiji Hayashibara }; 624f05851e1SKeiji Hayashibara 625f05851e1SKeiji Hayashibara efuse@200 { 626f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 627f05851e1SKeiji Hayashibara reg = <0x200 0x68>; 628d7b9beb8SKunihiko Hayashi #address-cells = <1>; 629d7b9beb8SKunihiko Hayashi #size-cells = <1>; 630d7b9beb8SKunihiko Hayashi 631d7b9beb8SKunihiko Hayashi /* USB cells */ 632d7b9beb8SKunihiko Hayashi usb_rterm0: trim@54,4 { 633d7b9beb8SKunihiko Hayashi reg = <0x54 1>; 634d7b9beb8SKunihiko Hayashi bits = <4 2>; 635d7b9beb8SKunihiko Hayashi }; 636d7b9beb8SKunihiko Hayashi usb_rterm1: trim@55,4 { 637d7b9beb8SKunihiko Hayashi reg = <0x55 1>; 638d7b9beb8SKunihiko Hayashi bits = <4 2>; 639d7b9beb8SKunihiko Hayashi }; 640d7b9beb8SKunihiko Hayashi usb_rterm2: trim@58,4 { 641d7b9beb8SKunihiko Hayashi reg = <0x58 1>; 642d7b9beb8SKunihiko Hayashi bits = <4 2>; 643d7b9beb8SKunihiko Hayashi }; 644d7b9beb8SKunihiko Hayashi usb_rterm3: trim@59,4 { 645d7b9beb8SKunihiko Hayashi reg = <0x59 1>; 646d7b9beb8SKunihiko Hayashi bits = <4 2>; 647d7b9beb8SKunihiko Hayashi }; 648d7b9beb8SKunihiko Hayashi usb_sel_t0: trim@54,0 { 649d7b9beb8SKunihiko Hayashi reg = <0x54 1>; 650d7b9beb8SKunihiko Hayashi bits = <0 4>; 651d7b9beb8SKunihiko Hayashi }; 652d7b9beb8SKunihiko Hayashi usb_sel_t1: trim@55,0 { 653d7b9beb8SKunihiko Hayashi reg = <0x55 1>; 654d7b9beb8SKunihiko Hayashi bits = <0 4>; 655d7b9beb8SKunihiko Hayashi }; 656d7b9beb8SKunihiko Hayashi usb_sel_t2: trim@58,0 { 657d7b9beb8SKunihiko Hayashi reg = <0x58 1>; 658d7b9beb8SKunihiko Hayashi bits = <0 4>; 659d7b9beb8SKunihiko Hayashi }; 660d7b9beb8SKunihiko Hayashi usb_sel_t3: trim@59,0 { 661d7b9beb8SKunihiko Hayashi reg = <0x59 1>; 662d7b9beb8SKunihiko Hayashi bits = <0 4>; 663d7b9beb8SKunihiko Hayashi }; 664d7b9beb8SKunihiko Hayashi usb_hs_i0: trim@56,0 { 665d7b9beb8SKunihiko Hayashi reg = <0x56 1>; 666d7b9beb8SKunihiko Hayashi bits = <0 4>; 667d7b9beb8SKunihiko Hayashi }; 668d7b9beb8SKunihiko Hayashi usb_hs_i2: trim@5a,0 { 669d7b9beb8SKunihiko Hayashi reg = <0x5a 1>; 670d7b9beb8SKunihiko Hayashi bits = <0 4>; 671d7b9beb8SKunihiko Hayashi }; 672f05851e1SKeiji Hayashibara }; 673f05851e1SKeiji Hayashibara }; 674f05851e1SKeiji Hayashibara 675f03b998dSKunihiko Hayashi xdmac: dma-controller@5fc10000 { 676f03b998dSKunihiko Hayashi compatible = "socionext,uniphier-xdmac"; 677f03b998dSKunihiko Hayashi reg = <0x5fc10000 0x5300>; 678f03b998dSKunihiko Hayashi interrupts = <0 188 4>; 679f03b998dSKunihiko Hayashi dma-channels = <16>; 680f03b998dSKunihiko Hayashi #dma-cells = <2>; 681f03b998dSKunihiko Hayashi }; 682f03b998dSKunihiko Hayashi 6839ddc285bSMasahiro Yamada aidet: interrupt-controller@5fc20000 { 6843dfc6e98SMasahiro Yamada compatible = "socionext,uniphier-ld20-aidet"; 6853dfc6e98SMasahiro Yamada reg = <0x5fc20000 0x200>; 6863dfc6e98SMasahiro Yamada interrupt-controller; 6873dfc6e98SMasahiro Yamada #interrupt-cells = <2>; 6883dfc6e98SMasahiro Yamada }; 6893dfc6e98SMasahiro Yamada 690cea59bd0SMasahiro Yamada gic: interrupt-controller@5fe00000 { 691cea59bd0SMasahiro Yamada compatible = "arm,gic-v3"; 692cea59bd0SMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 693cea59bd0SMasahiro Yamada <0x5fe80000 0x80000>; /* GICR */ 694cea59bd0SMasahiro Yamada interrupt-controller; 695cea59bd0SMasahiro Yamada #interrupt-cells = <3>; 696cea59bd0SMasahiro Yamada interrupts = <1 9 4>; 697cea59bd0SMasahiro Yamada }; 69842aee275SMasahiro Yamada 69942aee275SMasahiro Yamada sysctrl@61840000 { 700fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-sysctrl", 70142aee275SMasahiro Yamada "simple-mfd", "syscon"; 7021ef64af8SMasahiro Yamada reg = <0x61840000 0x10000>; 70342aee275SMasahiro Yamada 70442aee275SMasahiro Yamada sys_clk: clock { 70542aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-clock"; 70642aee275SMasahiro Yamada #clock-cells = <1>; 70742aee275SMasahiro Yamada }; 70842aee275SMasahiro Yamada 70942aee275SMasahiro Yamada sys_rst: reset { 71042aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-reset"; 71142aee275SMasahiro Yamada #reset-cells = <1>; 71242aee275SMasahiro Yamada }; 7134c4c960aSKeiji Hayashibara 7144c4c960aSKeiji Hayashibara watchdog { 7154c4c960aSKeiji Hayashibara compatible = "socionext,uniphier-wdt"; 7164c4c960aSKeiji Hayashibara }; 717dba74980SKunihiko Hayashi 718dba74980SKunihiko Hayashi pvtctl: pvtctl { 719dba74980SKunihiko Hayashi compatible = "socionext,uniphier-ld20-thermal"; 720dba74980SKunihiko Hayashi interrupts = <0 3 4>; 721dba74980SKunihiko Hayashi #thermal-sensor-cells = <0>; 722dba74980SKunihiko Hayashi socionext,tmod-calibration = <0x0f22 0x68ee>; 723dba74980SKunihiko Hayashi }; 72442aee275SMasahiro Yamada }; 725e5aefb38SMasahiro Yamada 726c73730eeSKunihiko Hayashi eth: ethernet@65000000 { 727c73730eeSKunihiko Hayashi compatible = "socionext,uniphier-ld20-ave4"; 728c73730eeSKunihiko Hayashi status = "disabled"; 729c73730eeSKunihiko Hayashi reg = <0x65000000 0x8500>; 730c73730eeSKunihiko Hayashi interrupts = <0 66 4>; 731c73730eeSKunihiko Hayashi pinctrl-names = "default"; 732c73730eeSKunihiko Hayashi pinctrl-0 = <&pinctrl_ether_rgmii>; 733a34a464dSKunihiko Hayashi clock-names = "ether"; 734c73730eeSKunihiko Hayashi clocks = <&sys_clk 6>; 735a34a464dSKunihiko Hayashi reset-names = "ether"; 736c73730eeSKunihiko Hayashi resets = <&sys_rst 6>; 737c73730eeSKunihiko Hayashi phy-mode = "rgmii"; 738c73730eeSKunihiko Hayashi local-mac-address = [00 00 00 00 00 00]; 739b076ff8bSKunihiko Hayashi socionext,syscon-phy-mode = <&soc_glue 0>; 740c73730eeSKunihiko Hayashi 741c73730eeSKunihiko Hayashi mdio: mdio { 742c73730eeSKunihiko Hayashi #address-cells = <1>; 743c73730eeSKunihiko Hayashi #size-cells = <0>; 744c73730eeSKunihiko Hayashi }; 745c73730eeSKunihiko Hayashi }; 746c73730eeSKunihiko Hayashi 747d7b9beb8SKunihiko Hayashi usb: usb@65a00000 { 748d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-dwc3", "snps,dwc3"; 749d7b9beb8SKunihiko Hayashi status = "disabled"; 750d7b9beb8SKunihiko Hayashi reg = <0x65a00000 0xcd00>; 751d7b9beb8SKunihiko Hayashi interrupt-names = "host"; 752d7b9beb8SKunihiko Hayashi interrupts = <0 134 4>; 753d7b9beb8SKunihiko Hayashi pinctrl-names = "default"; 754d7b9beb8SKunihiko Hayashi pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb1>, 755d7b9beb8SKunihiko Hayashi <&pinctrl_usb2>, <&pinctrl_usb3>; 756d7b9beb8SKunihiko Hayashi clock-names = "ref", "bus_early", "suspend"; 757d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 14>, <&sys_clk 14>; 758d7b9beb8SKunihiko Hayashi resets = <&usb_rst 15>; 759d7b9beb8SKunihiko Hayashi phys = <&usb_hsphy0>, <&usb_hsphy1>, 760d7b9beb8SKunihiko Hayashi <&usb_hsphy2>, <&usb_hsphy3>, 761d7b9beb8SKunihiko Hayashi <&usb_ssphy0>, <&usb_ssphy1>; 762d7b9beb8SKunihiko Hayashi dr_mode = "host"; 763d7b9beb8SKunihiko Hayashi }; 764d7b9beb8SKunihiko Hayashi 765d7b9beb8SKunihiko Hayashi usb-glue@65b00000 { 766d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-dwc3-glue", 767d7b9beb8SKunihiko Hayashi "simple-mfd"; 768d7b9beb8SKunihiko Hayashi #address-cells = <1>; 769d7b9beb8SKunihiko Hayashi #size-cells = <1>; 770d7b9beb8SKunihiko Hayashi ranges = <0 0x65b00000 0x400>; 771d7b9beb8SKunihiko Hayashi 772d7b9beb8SKunihiko Hayashi usb_rst: reset@0 { 773d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-reset"; 774d7b9beb8SKunihiko Hayashi reg = <0x0 0x4>; 775d7b9beb8SKunihiko Hayashi #reset-cells = <1>; 776d7b9beb8SKunihiko Hayashi clock-names = "link"; 777d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>; 778d7b9beb8SKunihiko Hayashi reset-names = "link"; 779d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>; 780d7b9beb8SKunihiko Hayashi }; 781d7b9beb8SKunihiko Hayashi 782d7b9beb8SKunihiko Hayashi usb_vbus0: regulator@100 { 783d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-regulator"; 784d7b9beb8SKunihiko Hayashi reg = <0x100 0x10>; 785d7b9beb8SKunihiko Hayashi clock-names = "link"; 786d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>; 787d7b9beb8SKunihiko Hayashi reset-names = "link"; 788d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>; 789d7b9beb8SKunihiko Hayashi }; 790d7b9beb8SKunihiko Hayashi 791d7b9beb8SKunihiko Hayashi usb_vbus1: regulator@110 { 792d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-regulator"; 793d7b9beb8SKunihiko Hayashi reg = <0x110 0x10>; 794d7b9beb8SKunihiko Hayashi clock-names = "link"; 795d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>; 796d7b9beb8SKunihiko Hayashi reset-names = "link"; 797d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>; 798d7b9beb8SKunihiko Hayashi }; 799d7b9beb8SKunihiko Hayashi 800d7b9beb8SKunihiko Hayashi usb_vbus2: regulator@120 { 801d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-regulator"; 802d7b9beb8SKunihiko Hayashi reg = <0x120 0x10>; 803d7b9beb8SKunihiko Hayashi clock-names = "link"; 804d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>; 805d7b9beb8SKunihiko Hayashi reset-names = "link"; 806d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>; 807d7b9beb8SKunihiko Hayashi }; 808d7b9beb8SKunihiko Hayashi 809d7b9beb8SKunihiko Hayashi usb_vbus3: regulator@130 { 810d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-regulator"; 811d7b9beb8SKunihiko Hayashi reg = <0x130 0x10>; 812d7b9beb8SKunihiko Hayashi clock-names = "link"; 813d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>; 814d7b9beb8SKunihiko Hayashi reset-names = "link"; 815d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>; 816d7b9beb8SKunihiko Hayashi }; 817d7b9beb8SKunihiko Hayashi 818d7b9beb8SKunihiko Hayashi usb_hsphy0: hs-phy@200 { 819d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-hsphy"; 820d7b9beb8SKunihiko Hayashi reg = <0x200 0x10>; 821d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 822d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 823d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 16>; 824d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 825d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 16>; 826d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus0>; 827d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 828d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm0>, <&usb_sel_t0>, 829d7b9beb8SKunihiko Hayashi <&usb_hs_i0>; 830d7b9beb8SKunihiko Hayashi }; 831d7b9beb8SKunihiko Hayashi 832d7b9beb8SKunihiko Hayashi usb_hsphy1: hs-phy@210 { 833d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-hsphy"; 834d7b9beb8SKunihiko Hayashi reg = <0x210 0x10>; 835d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 836d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 837d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 16>; 838d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 839d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 16>; 840d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus1>; 841d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 842d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm1>, <&usb_sel_t1>, 843d7b9beb8SKunihiko Hayashi <&usb_hs_i0>; 844d7b9beb8SKunihiko Hayashi }; 845d7b9beb8SKunihiko Hayashi 846d7b9beb8SKunihiko Hayashi usb_hsphy2: hs-phy@220 { 847d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-hsphy"; 848d7b9beb8SKunihiko Hayashi reg = <0x220 0x10>; 849d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 850d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 851d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 17>; 852d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 853d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 17>; 854d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus2>; 855d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 856d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm2>, <&usb_sel_t2>, 857d7b9beb8SKunihiko Hayashi <&usb_hs_i2>; 858d7b9beb8SKunihiko Hayashi }; 859d7b9beb8SKunihiko Hayashi 860d7b9beb8SKunihiko Hayashi usb_hsphy3: hs-phy@230 { 861d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-hsphy"; 862d7b9beb8SKunihiko Hayashi reg = <0x230 0x10>; 863d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 864d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 865d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 17>; 866d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 867d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 17>; 868d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus3>; 869d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 870d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm3>, <&usb_sel_t3>, 871d7b9beb8SKunihiko Hayashi <&usb_hs_i2>; 872d7b9beb8SKunihiko Hayashi }; 873d7b9beb8SKunihiko Hayashi 874d7b9beb8SKunihiko Hayashi usb_ssphy0: ss-phy@300 { 875d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-ssphy"; 876d7b9beb8SKunihiko Hayashi reg = <0x300 0x10>; 877d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 878d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 879d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 18>; 880d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 881d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 18>; 882d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus0>; 883d7b9beb8SKunihiko Hayashi }; 884d7b9beb8SKunihiko Hayashi 885d7b9beb8SKunihiko Hayashi usb_ssphy1: ss-phy@310 { 886d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-ssphy"; 887d7b9beb8SKunihiko Hayashi reg = <0x310 0x10>; 888d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 889d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 890d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 19>; 891d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 892d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 19>; 893d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus1>; 894d7b9beb8SKunihiko Hayashi }; 895d7b9beb8SKunihiko Hayashi }; 896d7b9beb8SKunihiko Hayashi 89732dfc773SKunihiko Hayashi pcie: pcie@66000000 { 89832dfc773SKunihiko Hayashi compatible = "socionext,uniphier-pcie", "snps,dw-pcie"; 89932dfc773SKunihiko Hayashi status = "disabled"; 90032dfc773SKunihiko Hayashi reg-names = "dbi", "link", "config"; 90132dfc773SKunihiko Hayashi reg = <0x66000000 0x1000>, <0x66010000 0x10000>, 90232dfc773SKunihiko Hayashi <0x2fff0000 0x10000>; 90332dfc773SKunihiko Hayashi #address-cells = <3>; 90432dfc773SKunihiko Hayashi #size-cells = <2>; 90532dfc773SKunihiko Hayashi clocks = <&sys_clk 24>; 90632dfc773SKunihiko Hayashi resets = <&sys_rst 24>; 90732dfc773SKunihiko Hayashi num-lanes = <1>; 90832dfc773SKunihiko Hayashi num-viewport = <1>; 90932dfc773SKunihiko Hayashi bus-range = <0x0 0xff>; 91032dfc773SKunihiko Hayashi device_type = "pci"; 91132dfc773SKunihiko Hayashi ranges = 91232dfc773SKunihiko Hayashi /* downstream I/O */ 91332dfc773SKunihiko Hayashi <0x81000000 0 0x00000000 0x2ffe0000 0 0x00010000>, 91432dfc773SKunihiko Hayashi /* non-prefetchable memory */ 91532dfc773SKunihiko Hayashi <0x82000000 0 0x20000000 0x20000000 0 0x0ffe0000>; 91632dfc773SKunihiko Hayashi #interrupt-cells = <1>; 91732dfc773SKunihiko Hayashi interrupt-names = "dma", "msi"; 91832dfc773SKunihiko Hayashi interrupts = <0 224 4>, <0 225 4>; 91932dfc773SKunihiko Hayashi interrupt-map-mask = <0 0 0 7>; 92032dfc773SKunihiko Hayashi interrupt-map = <0 0 0 1 &pcie_intc 0>, /* INTA */ 92132dfc773SKunihiko Hayashi <0 0 0 2 &pcie_intc 1>, /* INTB */ 92232dfc773SKunihiko Hayashi <0 0 0 3 &pcie_intc 2>, /* INTC */ 92332dfc773SKunihiko Hayashi <0 0 0 4 &pcie_intc 3>; /* INTD */ 92432dfc773SKunihiko Hayashi phy-names = "pcie-phy"; 92532dfc773SKunihiko Hayashi phys = <&pcie_phy>; 92632dfc773SKunihiko Hayashi 92732dfc773SKunihiko Hayashi pcie_intc: legacy-interrupt-controller { 92832dfc773SKunihiko Hayashi interrupt-controller; 92932dfc773SKunihiko Hayashi #interrupt-cells = <1>; 93032dfc773SKunihiko Hayashi interrupt-parent = <&gic>; 93132dfc773SKunihiko Hayashi interrupts = <0 226 4>; 93232dfc773SKunihiko Hayashi }; 93332dfc773SKunihiko Hayashi }; 93432dfc773SKunihiko Hayashi 93532dfc773SKunihiko Hayashi pcie_phy: phy@66038000 { 93632dfc773SKunihiko Hayashi compatible = "socionext,uniphier-ld20-pcie-phy"; 93732dfc773SKunihiko Hayashi reg = <0x66038000 0x4000>; 93832dfc773SKunihiko Hayashi #phy-cells = <0>; 93932dfc773SKunihiko Hayashi clocks = <&sys_clk 24>; 94032dfc773SKunihiko Hayashi resets = <&sys_rst 24>; 94132dfc773SKunihiko Hayashi socionext,syscon = <&soc_glue>; 94232dfc773SKunihiko Hayashi }; 94332dfc773SKunihiko Hayashi 944fcb0e53cSMasahiro Yamada nand: nand-controller@68000000 { 945e5aefb38SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 946e5aefb38SMasahiro Yamada status = "disabled"; 947e5aefb38SMasahiro Yamada reg-names = "nand_data", "denali_reg"; 948e5aefb38SMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 94953c580c1SMasahiro Yamada #address-cells = <1>; 95053c580c1SMasahiro Yamada #size-cells = <0>; 951e5aefb38SMasahiro Yamada interrupts = <0 65 4>; 952e5aefb38SMasahiro Yamada pinctrl-names = "default"; 953e5aefb38SMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 954bae120f8SMasahiro Yamada clock-names = "nand", "nand_x", "ecc"; 955bae120f8SMasahiro Yamada clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; 956e98d5023SMasahiro Yamada reset-names = "nand", "reg"; 957e98d5023SMasahiro Yamada resets = <&sys_rst 2>, <&sys_rst 2>; 958e5aefb38SMasahiro Yamada }; 959cea59bd0SMasahiro Yamada }; 960cea59bd0SMasahiro Yamada}; 961cea59bd0SMasahiro Yamada 9625740ea4eSMasahiro Yamada#include "uniphier-pinctrl.dtsi" 963fb21a0acSKatsuhiro Suzuki 964fb21a0acSKatsuhiro Suzuki&pinctrl_aout1 { 965fb21a0acSKatsuhiro Suzuki drive-strength = <4>; /* default: 3.5mA */ 966fb21a0acSKatsuhiro Suzuki 967fb21a0acSKatsuhiro Suzuki ao1dacck { 968fb21a0acSKatsuhiro Suzuki pins = "AO1DACCK"; 969fb21a0acSKatsuhiro Suzuki drive-strength = <5>; /* 5mA */ 970fb21a0acSKatsuhiro Suzuki }; 971fb21a0acSKatsuhiro Suzuki}; 972fb21a0acSKatsuhiro Suzuki 973fb21a0acSKatsuhiro Suzuki&pinctrl_aoutiec1 { 974fb21a0acSKatsuhiro Suzuki drive-strength = <4>; /* default: 3.5mA */ 975fb21a0acSKatsuhiro Suzuki 976fb21a0acSKatsuhiro Suzuki ao1arc { 977fb21a0acSKatsuhiro Suzuki pins = "AO1ARC"; 978fb21a0acSKatsuhiro Suzuki drive-strength = <11>; /* 11mA */ 979fb21a0acSKatsuhiro Suzuki }; 980fb21a0acSKatsuhiro Suzuki}; 981