1cea59bd0SMasahiro Yamada/* 2cea59bd0SMasahiro Yamada * Device Tree Source for UniPhier LD20 SoC 3cea59bd0SMasahiro Yamada * 4cea59bd0SMasahiro Yamada * Copyright (C) 2015-2016 Socionext Inc. 5cea59bd0SMasahiro Yamada * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 6cea59bd0SMasahiro Yamada * 712301cffSMasahiro Yamada * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8cea59bd0SMasahiro Yamada */ 9cea59bd0SMasahiro Yamada 1079d4be39SMasahiro Yamada/memreserve/ 0x80000000 0x02000000; 11cea59bd0SMasahiro Yamada 12cea59bd0SMasahiro Yamada/ { 13cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20"; 14cea59bd0SMasahiro Yamada #address-cells = <2>; 15cea59bd0SMasahiro Yamada #size-cells = <2>; 16cea59bd0SMasahiro Yamada interrupt-parent = <&gic>; 17cea59bd0SMasahiro Yamada 18cea59bd0SMasahiro Yamada cpus { 19cea59bd0SMasahiro Yamada #address-cells = <2>; 20cea59bd0SMasahiro Yamada #size-cells = <0>; 21cea59bd0SMasahiro Yamada 22cea59bd0SMasahiro Yamada cpu-map { 23cea59bd0SMasahiro Yamada cluster0 { 24cea59bd0SMasahiro Yamada core0 { 25cea59bd0SMasahiro Yamada cpu = <&cpu0>; 26cea59bd0SMasahiro Yamada }; 27cea59bd0SMasahiro Yamada core1 { 28cea59bd0SMasahiro Yamada cpu = <&cpu1>; 29cea59bd0SMasahiro Yamada }; 30cea59bd0SMasahiro Yamada }; 31cea59bd0SMasahiro Yamada 32cea59bd0SMasahiro Yamada cluster1 { 33cea59bd0SMasahiro Yamada core0 { 34cea59bd0SMasahiro Yamada cpu = <&cpu2>; 35cea59bd0SMasahiro Yamada }; 36cea59bd0SMasahiro Yamada core1 { 37cea59bd0SMasahiro Yamada cpu = <&cpu3>; 38cea59bd0SMasahiro Yamada }; 39cea59bd0SMasahiro Yamada }; 40cea59bd0SMasahiro Yamada }; 41cea59bd0SMasahiro Yamada 42cea59bd0SMasahiro Yamada cpu0: cpu@0 { 43cea59bd0SMasahiro Yamada device_type = "cpu"; 44cea59bd0SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 45cea59bd0SMasahiro Yamada reg = <0 0x000>; 46183ad366SMasahiro Yamada clocks = <&sys_clk 32>; 472f81137fSMasahiro Yamada enable-method = "psci"; 48183ad366SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 49cea59bd0SMasahiro Yamada }; 50cea59bd0SMasahiro Yamada 51cea59bd0SMasahiro Yamada cpu1: cpu@1 { 52cea59bd0SMasahiro Yamada device_type = "cpu"; 53cea59bd0SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 54cea59bd0SMasahiro Yamada reg = <0 0x001>; 55183ad366SMasahiro Yamada clocks = <&sys_clk 32>; 562f81137fSMasahiro Yamada enable-method = "psci"; 57183ad366SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 58cea59bd0SMasahiro Yamada }; 59cea59bd0SMasahiro Yamada 60cea59bd0SMasahiro Yamada cpu2: cpu@100 { 61cea59bd0SMasahiro Yamada device_type = "cpu"; 62cea59bd0SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 63cea59bd0SMasahiro Yamada reg = <0 0x100>; 64183ad366SMasahiro Yamada clocks = <&sys_clk 33>; 652f81137fSMasahiro Yamada enable-method = "psci"; 66183ad366SMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 67cea59bd0SMasahiro Yamada }; 68cea59bd0SMasahiro Yamada 69cea59bd0SMasahiro Yamada cpu3: cpu@101 { 70cea59bd0SMasahiro Yamada device_type = "cpu"; 71cea59bd0SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 72cea59bd0SMasahiro Yamada reg = <0 0x101>; 73183ad366SMasahiro Yamada clocks = <&sys_clk 33>; 742f81137fSMasahiro Yamada enable-method = "psci"; 75183ad366SMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 76183ad366SMasahiro Yamada }; 77183ad366SMasahiro Yamada }; 78183ad366SMasahiro Yamada 79183ad366SMasahiro Yamada cluster0_opp: opp_table0 { 80183ad366SMasahiro Yamada compatible = "operating-points-v2"; 81183ad366SMasahiro Yamada opp-shared; 82183ad366SMasahiro Yamada 833fc9a121SViresh Kumar opp-250000000 { 84183ad366SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 85183ad366SMasahiro Yamada clock-latency-ns = <300>; 86183ad366SMasahiro Yamada }; 873fc9a121SViresh Kumar opp-275000000 { 88183ad366SMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 89183ad366SMasahiro Yamada clock-latency-ns = <300>; 90183ad366SMasahiro Yamada }; 913fc9a121SViresh Kumar opp-500000000 { 92183ad366SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 93183ad366SMasahiro Yamada clock-latency-ns = <300>; 94183ad366SMasahiro Yamada }; 953fc9a121SViresh Kumar opp-550000000 { 96183ad366SMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 97183ad366SMasahiro Yamada clock-latency-ns = <300>; 98183ad366SMasahiro Yamada }; 993fc9a121SViresh Kumar opp-666667000 { 100183ad366SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 101183ad366SMasahiro Yamada clock-latency-ns = <300>; 102183ad366SMasahiro Yamada }; 1033fc9a121SViresh Kumar opp-733334000 { 104183ad366SMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 105183ad366SMasahiro Yamada clock-latency-ns = <300>; 106183ad366SMasahiro Yamada }; 1073fc9a121SViresh Kumar opp-1000000000 { 108183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 109183ad366SMasahiro Yamada clock-latency-ns = <300>; 110183ad366SMasahiro Yamada }; 1113fc9a121SViresh Kumar opp-1100000000 { 112183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 113183ad366SMasahiro Yamada clock-latency-ns = <300>; 114183ad366SMasahiro Yamada }; 115183ad366SMasahiro Yamada }; 116183ad366SMasahiro Yamada 117183ad366SMasahiro Yamada cluster1_opp: opp_table1 { 118183ad366SMasahiro Yamada compatible = "operating-points-v2"; 119183ad366SMasahiro Yamada opp-shared; 120183ad366SMasahiro Yamada 1213fc9a121SViresh Kumar opp-250000000 { 122183ad366SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 123183ad366SMasahiro Yamada clock-latency-ns = <300>; 124183ad366SMasahiro Yamada }; 1253fc9a121SViresh Kumar opp-275000000 { 126183ad366SMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 127183ad366SMasahiro Yamada clock-latency-ns = <300>; 128183ad366SMasahiro Yamada }; 1293fc9a121SViresh Kumar opp-500000000 { 130183ad366SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 131183ad366SMasahiro Yamada clock-latency-ns = <300>; 132183ad366SMasahiro Yamada }; 1333fc9a121SViresh Kumar opp-550000000 { 134183ad366SMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 135183ad366SMasahiro Yamada clock-latency-ns = <300>; 136183ad366SMasahiro Yamada }; 1373fc9a121SViresh Kumar opp-666667000 { 138183ad366SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 139183ad366SMasahiro Yamada clock-latency-ns = <300>; 140183ad366SMasahiro Yamada }; 1413fc9a121SViresh Kumar opp-733334000 { 142183ad366SMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 143183ad366SMasahiro Yamada clock-latency-ns = <300>; 144183ad366SMasahiro Yamada }; 1453fc9a121SViresh Kumar opp-1000000000 { 146183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 147183ad366SMasahiro Yamada clock-latency-ns = <300>; 148183ad366SMasahiro Yamada }; 1493fc9a121SViresh Kumar opp-1100000000 { 150183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 151183ad366SMasahiro Yamada clock-latency-ns = <300>; 152cea59bd0SMasahiro Yamada }; 153cea59bd0SMasahiro Yamada }; 154cea59bd0SMasahiro Yamada 1552f81137fSMasahiro Yamada psci { 1562f81137fSMasahiro Yamada compatible = "arm,psci-1.0"; 1572f81137fSMasahiro Yamada method = "smc"; 1582f81137fSMasahiro Yamada }; 1592f81137fSMasahiro Yamada 160cea59bd0SMasahiro Yamada clocks { 161cea59bd0SMasahiro Yamada refclk: ref { 162cea59bd0SMasahiro Yamada compatible = "fixed-clock"; 163cea59bd0SMasahiro Yamada #clock-cells = <0>; 164cea59bd0SMasahiro Yamada clock-frequency = <25000000>; 165cea59bd0SMasahiro Yamada }; 166cea59bd0SMasahiro Yamada }; 167cea59bd0SMasahiro Yamada 168cea59bd0SMasahiro Yamada timer { 169cea59bd0SMasahiro Yamada compatible = "arm,armv8-timer"; 17037179033SArnd Bergmann interrupts = <1 13 4>, 17137179033SArnd Bergmann <1 14 4>, 17237179033SArnd Bergmann <1 11 4>, 17337179033SArnd Bergmann <1 10 4>; 174cea59bd0SMasahiro Yamada }; 175cea59bd0SMasahiro Yamada 176b5027603SMasahiro Yamada soc@0 { 177cea59bd0SMasahiro Yamada compatible = "simple-bus"; 178cea59bd0SMasahiro Yamada #address-cells = <1>; 179cea59bd0SMasahiro Yamada #size-cells = <1>; 180cea59bd0SMasahiro Yamada ranges = <0 0 0 0xffffffff>; 181cea59bd0SMasahiro Yamada 182cea59bd0SMasahiro Yamada serial0: serial@54006800 { 183cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 184cea59bd0SMasahiro Yamada status = "disabled"; 185cea59bd0SMasahiro Yamada reg = <0x54006800 0x40>; 186cea59bd0SMasahiro Yamada interrupts = <0 33 4>; 187cea59bd0SMasahiro Yamada pinctrl-names = "default"; 188cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 18942aee275SMasahiro Yamada clocks = <&peri_clk 0>; 190cea59bd0SMasahiro Yamada }; 191cea59bd0SMasahiro Yamada 192cea59bd0SMasahiro Yamada serial1: serial@54006900 { 193cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 194cea59bd0SMasahiro Yamada status = "disabled"; 195cea59bd0SMasahiro Yamada reg = <0x54006900 0x40>; 196cea59bd0SMasahiro Yamada interrupts = <0 35 4>; 197cea59bd0SMasahiro Yamada pinctrl-names = "default"; 198cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 19942aee275SMasahiro Yamada clocks = <&peri_clk 1>; 200cea59bd0SMasahiro Yamada }; 201cea59bd0SMasahiro Yamada 202cea59bd0SMasahiro Yamada serial2: serial@54006a00 { 203cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 204cea59bd0SMasahiro Yamada status = "disabled"; 205cea59bd0SMasahiro Yamada reg = <0x54006a00 0x40>; 206cea59bd0SMasahiro Yamada interrupts = <0 37 4>; 207cea59bd0SMasahiro Yamada pinctrl-names = "default"; 208cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 20942aee275SMasahiro Yamada clocks = <&peri_clk 2>; 210cea59bd0SMasahiro Yamada }; 211cea59bd0SMasahiro Yamada 212cea59bd0SMasahiro Yamada serial3: serial@54006b00 { 213cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 214cea59bd0SMasahiro Yamada status = "disabled"; 215cea59bd0SMasahiro Yamada reg = <0x54006b00 0x40>; 216cea59bd0SMasahiro Yamada interrupts = <0 177 4>; 217cea59bd0SMasahiro Yamada pinctrl-names = "default"; 218cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 21942aee275SMasahiro Yamada clocks = <&peri_clk 3>; 220cea59bd0SMasahiro Yamada }; 221cea59bd0SMasahiro Yamada 222cea59bd0SMasahiro Yamada i2c0: i2c@58780000 { 223cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 224cea59bd0SMasahiro Yamada status = "disabled"; 225cea59bd0SMasahiro Yamada reg = <0x58780000 0x80>; 226cea59bd0SMasahiro Yamada #address-cells = <1>; 227cea59bd0SMasahiro Yamada #size-cells = <0>; 228cea59bd0SMasahiro Yamada interrupts = <0 41 4>; 229cea59bd0SMasahiro Yamada pinctrl-names = "default"; 230cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 23142aee275SMasahiro Yamada clocks = <&peri_clk 4>; 232cea59bd0SMasahiro Yamada clock-frequency = <100000>; 233cea59bd0SMasahiro Yamada }; 234cea59bd0SMasahiro Yamada 235cea59bd0SMasahiro Yamada i2c1: i2c@58781000 { 236cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 237cea59bd0SMasahiro Yamada status = "disabled"; 238cea59bd0SMasahiro Yamada reg = <0x58781000 0x80>; 239cea59bd0SMasahiro Yamada #address-cells = <1>; 240cea59bd0SMasahiro Yamada #size-cells = <0>; 241cea59bd0SMasahiro Yamada interrupts = <0 42 4>; 242cea59bd0SMasahiro Yamada pinctrl-names = "default"; 243cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 24442aee275SMasahiro Yamada clocks = <&peri_clk 5>; 245cea59bd0SMasahiro Yamada clock-frequency = <100000>; 246cea59bd0SMasahiro Yamada }; 247cea59bd0SMasahiro Yamada 248cea59bd0SMasahiro Yamada i2c2: i2c@58782000 { 249cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 250cea59bd0SMasahiro Yamada reg = <0x58782000 0x80>; 251cea59bd0SMasahiro Yamada #address-cells = <1>; 252cea59bd0SMasahiro Yamada #size-cells = <0>; 253cea59bd0SMasahiro Yamada interrupts = <0 43 4>; 25442aee275SMasahiro Yamada clocks = <&peri_clk 6>; 255cea59bd0SMasahiro Yamada clock-frequency = <400000>; 256cea59bd0SMasahiro Yamada }; 257cea59bd0SMasahiro Yamada 258cea59bd0SMasahiro Yamada i2c3: i2c@58783000 { 259cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 260cea59bd0SMasahiro Yamada status = "disabled"; 261cea59bd0SMasahiro Yamada reg = <0x58783000 0x80>; 262cea59bd0SMasahiro Yamada #address-cells = <1>; 263cea59bd0SMasahiro Yamada #size-cells = <0>; 264cea59bd0SMasahiro Yamada interrupts = <0 44 4>; 265cea59bd0SMasahiro Yamada pinctrl-names = "default"; 266cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 26742aee275SMasahiro Yamada clocks = <&peri_clk 7>; 268cea59bd0SMasahiro Yamada clock-frequency = <100000>; 269cea59bd0SMasahiro Yamada }; 270cea59bd0SMasahiro Yamada 271cea59bd0SMasahiro Yamada i2c4: i2c@58784000 { 272cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 273cea59bd0SMasahiro Yamada status = "disabled"; 274cea59bd0SMasahiro Yamada reg = <0x58784000 0x80>; 275cea59bd0SMasahiro Yamada #address-cells = <1>; 276cea59bd0SMasahiro Yamada #size-cells = <0>; 277cea59bd0SMasahiro Yamada interrupts = <0 45 4>; 278cea59bd0SMasahiro Yamada pinctrl-names = "default"; 279cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c4>; 28042aee275SMasahiro Yamada clocks = <&peri_clk 8>; 281cea59bd0SMasahiro Yamada clock-frequency = <100000>; 282cea59bd0SMasahiro Yamada }; 283cea59bd0SMasahiro Yamada 284cea59bd0SMasahiro Yamada i2c5: i2c@58785000 { 285cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 286cea59bd0SMasahiro Yamada reg = <0x58785000 0x80>; 287cea59bd0SMasahiro Yamada #address-cells = <1>; 288cea59bd0SMasahiro Yamada #size-cells = <0>; 289cea59bd0SMasahiro Yamada interrupts = <0 25 4>; 29042aee275SMasahiro Yamada clocks = <&peri_clk 9>; 291cea59bd0SMasahiro Yamada clock-frequency = <400000>; 292cea59bd0SMasahiro Yamada }; 293cea59bd0SMasahiro Yamada 294cea59bd0SMasahiro Yamada system_bus: system-bus@58c00000 { 295cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 296cea59bd0SMasahiro Yamada status = "disabled"; 297cea59bd0SMasahiro Yamada reg = <0x58c00000 0x400>; 298cea59bd0SMasahiro Yamada #address-cells = <2>; 299cea59bd0SMasahiro Yamada #size-cells = <1>; 3005d9a83c9SMasahiro Yamada pinctrl-names = "default"; 3015d9a83c9SMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 302cea59bd0SMasahiro Yamada }; 303cea59bd0SMasahiro Yamada 304b10ee7e3SMasahiro Yamada smpctrl@59801000 { 305cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 306cea59bd0SMasahiro Yamada reg = <0x59801000 0x400>; 307cea59bd0SMasahiro Yamada }; 308cea59bd0SMasahiro Yamada 3098e68c65dSMasahiro Yamada sdctrl@59810000 { 3108e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sdctrl", 31142aee275SMasahiro Yamada "simple-mfd", "syscon"; 31242aee275SMasahiro Yamada reg = <0x59810000 0x800>; 31342aee275SMasahiro Yamada 3148e68c65dSMasahiro Yamada sd_clk: clock { 3158e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-clock"; 31642aee275SMasahiro Yamada #clock-cells = <1>; 31742aee275SMasahiro Yamada }; 31842aee275SMasahiro Yamada 3198e68c65dSMasahiro Yamada sd_rst: reset { 3208e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-reset"; 32142aee275SMasahiro Yamada #reset-cells = <1>; 32242aee275SMasahiro Yamada }; 32342aee275SMasahiro Yamada }; 32442aee275SMasahiro Yamada 32542aee275SMasahiro Yamada perictrl@59820000 { 326fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-perictrl", 32742aee275SMasahiro Yamada "simple-mfd", "syscon"; 32842aee275SMasahiro Yamada reg = <0x59820000 0x200>; 32942aee275SMasahiro Yamada 33042aee275SMasahiro Yamada peri_clk: clock { 33142aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-clock"; 33242aee275SMasahiro Yamada #clock-cells = <1>; 33342aee275SMasahiro Yamada }; 33442aee275SMasahiro Yamada 33542aee275SMasahiro Yamada peri_rst: reset { 33642aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-reset"; 33742aee275SMasahiro Yamada #reset-cells = <1>; 33842aee275SMasahiro Yamada }; 33942aee275SMasahiro Yamada }; 34042aee275SMasahiro Yamada 3413a93cc26SMasahiro Yamada emmc: sdhc@5a000000 { 3423a93cc26SMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 3433a93cc26SMasahiro Yamada reg = <0x5a000000 0x400>; 3443a93cc26SMasahiro Yamada interrupts = <0 78 4>; 3459c0a9700SMasahiro Yamada pinctrl-names = "default"; 3469c0a9700SMasahiro Yamada pinctrl-0 = <&pinctrl_emmc>; 3473a93cc26SMasahiro Yamada clocks = <&sys_clk 4>; 3483a93cc26SMasahiro Yamada bus-width = <8>; 3493a93cc26SMasahiro Yamada mmc-ddr-1_8v; 3503a93cc26SMasahiro Yamada mmc-hs200-1_8v; 351ba6f7011SMasahiro Yamada cdns,phy-input-delay-legacy = <4>; 352ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 353ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 354e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 355e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 3563a93cc26SMasahiro Yamada }; 3573a93cc26SMasahiro Yamada 358cea59bd0SMasahiro Yamada soc-glue@5f800000 { 359fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-soc-glue", 3609d4f5505SMasahiro Yamada "simple-mfd", "syscon"; 361cea59bd0SMasahiro Yamada reg = <0x5f800000 0x2000>; 362cea59bd0SMasahiro Yamada 363cea59bd0SMasahiro Yamada pinctrl: pinctrl { 364cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20-pinctrl"; 365cea59bd0SMasahiro Yamada }; 366cea59bd0SMasahiro Yamada }; 367cea59bd0SMasahiro Yamada 368cea59bd0SMasahiro Yamada gic: interrupt-controller@5fe00000 { 369cea59bd0SMasahiro Yamada compatible = "arm,gic-v3"; 370cea59bd0SMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 371cea59bd0SMasahiro Yamada <0x5fe80000 0x80000>; /* GICR */ 372cea59bd0SMasahiro Yamada interrupt-controller; 373cea59bd0SMasahiro Yamada #interrupt-cells = <3>; 374cea59bd0SMasahiro Yamada interrupts = <1 9 4>; 375cea59bd0SMasahiro Yamada }; 37642aee275SMasahiro Yamada 37742aee275SMasahiro Yamada sysctrl@61840000 { 378fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-sysctrl", 37942aee275SMasahiro Yamada "simple-mfd", "syscon"; 3801ef64af8SMasahiro Yamada reg = <0x61840000 0x10000>; 38142aee275SMasahiro Yamada 38242aee275SMasahiro Yamada sys_clk: clock { 38342aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-clock"; 38442aee275SMasahiro Yamada #clock-cells = <1>; 38542aee275SMasahiro Yamada }; 38642aee275SMasahiro Yamada 38742aee275SMasahiro Yamada sys_rst: reset { 38842aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-reset"; 38942aee275SMasahiro Yamada #reset-cells = <1>; 39042aee275SMasahiro Yamada }; 39142aee275SMasahiro Yamada }; 392cea59bd0SMasahiro Yamada }; 393cea59bd0SMasahiro Yamada}; 394cea59bd0SMasahiro Yamada 395cea59bd0SMasahiro Yamada/include/ "uniphier-pinctrl.dtsi" 396