105f7e3d1SMasahiro Yamada// SPDX-License-Identifier: GPL-2.0+ OR MIT 205f7e3d1SMasahiro Yamada// 305f7e3d1SMasahiro Yamada// Device Tree Source for UniPhier LD20 SoC 405f7e3d1SMasahiro Yamada// 505f7e3d1SMasahiro Yamada// Copyright (C) 2015-2016 Socionext Inc. 605f7e3d1SMasahiro Yamada// Author: Masahiro Yamada <yamada.masahiro@socionext.com> 7cea59bd0SMasahiro Yamada 8b6e5ec20SMasahiro Yamada#include <dt-bindings/gpio/gpio.h> 98311ca57SMasahiro Yamada#include <dt-bindings/gpio/uniphier-gpio.h> 10dba74980SKunihiko Hayashi#include <dt-bindings/thermal/thermal.h> 11dba74980SKunihiko Hayashi 1279d4be39SMasahiro Yamada/memreserve/ 0x80000000 0x02000000; 13cea59bd0SMasahiro Yamada 14cea59bd0SMasahiro Yamada/ { 15cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20"; 16cea59bd0SMasahiro Yamada #address-cells = <2>; 17cea59bd0SMasahiro Yamada #size-cells = <2>; 18cea59bd0SMasahiro Yamada interrupt-parent = <&gic>; 19cea59bd0SMasahiro Yamada 20cea59bd0SMasahiro Yamada cpus { 21cea59bd0SMasahiro Yamada #address-cells = <2>; 22cea59bd0SMasahiro Yamada #size-cells = <0>; 23cea59bd0SMasahiro Yamada 24cea59bd0SMasahiro Yamada cpu-map { 25cea59bd0SMasahiro Yamada cluster0 { 26cea59bd0SMasahiro Yamada core0 { 27cea59bd0SMasahiro Yamada cpu = <&cpu0>; 28cea59bd0SMasahiro Yamada }; 29cea59bd0SMasahiro Yamada core1 { 30cea59bd0SMasahiro Yamada cpu = <&cpu1>; 31cea59bd0SMasahiro Yamada }; 32cea59bd0SMasahiro Yamada }; 33cea59bd0SMasahiro Yamada 34cea59bd0SMasahiro Yamada cluster1 { 35cea59bd0SMasahiro Yamada core0 { 36cea59bd0SMasahiro Yamada cpu = <&cpu2>; 37cea59bd0SMasahiro Yamada }; 38cea59bd0SMasahiro Yamada core1 { 39cea59bd0SMasahiro Yamada cpu = <&cpu3>; 40cea59bd0SMasahiro Yamada }; 41cea59bd0SMasahiro Yamada }; 42cea59bd0SMasahiro Yamada }; 43cea59bd0SMasahiro Yamada 44cea59bd0SMasahiro Yamada cpu0: cpu@0 { 45cea59bd0SMasahiro Yamada device_type = "cpu"; 46cea59bd0SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 47cea59bd0SMasahiro Yamada reg = <0 0x000>; 48183ad366SMasahiro Yamada clocks = <&sys_clk 32>; 492f81137fSMasahiro Yamada enable-method = "psci"; 50183ad366SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 51dba74980SKunihiko Hayashi #cooling-cells = <2>; 52cea59bd0SMasahiro Yamada }; 53cea59bd0SMasahiro Yamada 54cea59bd0SMasahiro Yamada cpu1: cpu@1 { 55cea59bd0SMasahiro Yamada device_type = "cpu"; 56cea59bd0SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 57cea59bd0SMasahiro Yamada reg = <0 0x001>; 58183ad366SMasahiro Yamada clocks = <&sys_clk 32>; 592f81137fSMasahiro Yamada enable-method = "psci"; 60183ad366SMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 61af0e09d0SViresh Kumar #cooling-cells = <2>; 62cea59bd0SMasahiro Yamada }; 63cea59bd0SMasahiro Yamada 64cea59bd0SMasahiro Yamada cpu2: cpu@100 { 65cea59bd0SMasahiro Yamada device_type = "cpu"; 66cea59bd0SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 67cea59bd0SMasahiro Yamada reg = <0 0x100>; 68183ad366SMasahiro Yamada clocks = <&sys_clk 33>; 692f81137fSMasahiro Yamada enable-method = "psci"; 70183ad366SMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 71dba74980SKunihiko Hayashi #cooling-cells = <2>; 72cea59bd0SMasahiro Yamada }; 73cea59bd0SMasahiro Yamada 74cea59bd0SMasahiro Yamada cpu3: cpu@101 { 75cea59bd0SMasahiro Yamada device_type = "cpu"; 76cea59bd0SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 77cea59bd0SMasahiro Yamada reg = <0 0x101>; 78183ad366SMasahiro Yamada clocks = <&sys_clk 33>; 792f81137fSMasahiro Yamada enable-method = "psci"; 80183ad366SMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 81af0e09d0SViresh Kumar #cooling-cells = <2>; 82183ad366SMasahiro Yamada }; 83183ad366SMasahiro Yamada }; 84183ad366SMasahiro Yamada 859cd7d03fSMasahiro Yamada cluster0_opp: opp-table0 { 86183ad366SMasahiro Yamada compatible = "operating-points-v2"; 87183ad366SMasahiro Yamada opp-shared; 88183ad366SMasahiro Yamada 893fc9a121SViresh Kumar opp-250000000 { 90183ad366SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 91183ad366SMasahiro Yamada clock-latency-ns = <300>; 92183ad366SMasahiro Yamada }; 933fc9a121SViresh Kumar opp-275000000 { 94183ad366SMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 95183ad366SMasahiro Yamada clock-latency-ns = <300>; 96183ad366SMasahiro Yamada }; 973fc9a121SViresh Kumar opp-500000000 { 98183ad366SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 99183ad366SMasahiro Yamada clock-latency-ns = <300>; 100183ad366SMasahiro Yamada }; 1013fc9a121SViresh Kumar opp-550000000 { 102183ad366SMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 103183ad366SMasahiro Yamada clock-latency-ns = <300>; 104183ad366SMasahiro Yamada }; 1053fc9a121SViresh Kumar opp-666667000 { 106183ad366SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 107183ad366SMasahiro Yamada clock-latency-ns = <300>; 108183ad366SMasahiro Yamada }; 1093fc9a121SViresh Kumar opp-733334000 { 110183ad366SMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 111183ad366SMasahiro Yamada clock-latency-ns = <300>; 112183ad366SMasahiro Yamada }; 1133fc9a121SViresh Kumar opp-1000000000 { 114183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 115183ad366SMasahiro Yamada clock-latency-ns = <300>; 116183ad366SMasahiro Yamada }; 1173fc9a121SViresh Kumar opp-1100000000 { 118183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 119183ad366SMasahiro Yamada clock-latency-ns = <300>; 120183ad366SMasahiro Yamada }; 121183ad366SMasahiro Yamada }; 122183ad366SMasahiro Yamada 1239cd7d03fSMasahiro Yamada cluster1_opp: opp-table1 { 124183ad366SMasahiro Yamada compatible = "operating-points-v2"; 125183ad366SMasahiro Yamada opp-shared; 126183ad366SMasahiro Yamada 1273fc9a121SViresh Kumar opp-250000000 { 128183ad366SMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 129183ad366SMasahiro Yamada clock-latency-ns = <300>; 130183ad366SMasahiro Yamada }; 1313fc9a121SViresh Kumar opp-275000000 { 132183ad366SMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 133183ad366SMasahiro Yamada clock-latency-ns = <300>; 134183ad366SMasahiro Yamada }; 1353fc9a121SViresh Kumar opp-500000000 { 136183ad366SMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 137183ad366SMasahiro Yamada clock-latency-ns = <300>; 138183ad366SMasahiro Yamada }; 1393fc9a121SViresh Kumar opp-550000000 { 140183ad366SMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 141183ad366SMasahiro Yamada clock-latency-ns = <300>; 142183ad366SMasahiro Yamada }; 1433fc9a121SViresh Kumar opp-666667000 { 144183ad366SMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 145183ad366SMasahiro Yamada clock-latency-ns = <300>; 146183ad366SMasahiro Yamada }; 1473fc9a121SViresh Kumar opp-733334000 { 148183ad366SMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 149183ad366SMasahiro Yamada clock-latency-ns = <300>; 150183ad366SMasahiro Yamada }; 1513fc9a121SViresh Kumar opp-1000000000 { 152183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 153183ad366SMasahiro Yamada clock-latency-ns = <300>; 154183ad366SMasahiro Yamada }; 1553fc9a121SViresh Kumar opp-1100000000 { 156183ad366SMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 157183ad366SMasahiro Yamada clock-latency-ns = <300>; 158cea59bd0SMasahiro Yamada }; 159cea59bd0SMasahiro Yamada }; 160cea59bd0SMasahiro Yamada 1612f81137fSMasahiro Yamada psci { 1622f81137fSMasahiro Yamada compatible = "arm,psci-1.0"; 1632f81137fSMasahiro Yamada method = "smc"; 1642f81137fSMasahiro Yamada }; 1652f81137fSMasahiro Yamada 166cea59bd0SMasahiro Yamada clocks { 167cea59bd0SMasahiro Yamada refclk: ref { 168cea59bd0SMasahiro Yamada compatible = "fixed-clock"; 169cea59bd0SMasahiro Yamada #clock-cells = <0>; 170cea59bd0SMasahiro Yamada clock-frequency = <25000000>; 171cea59bd0SMasahiro Yamada }; 172cea59bd0SMasahiro Yamada }; 173cea59bd0SMasahiro Yamada 174b6e5ec20SMasahiro Yamada emmc_pwrseq: emmc-pwrseq { 175b6e5ec20SMasahiro Yamada compatible = "mmc-pwrseq-emmc"; 1768311ca57SMasahiro Yamada reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>; 177b6e5ec20SMasahiro Yamada }; 178b6e5ec20SMasahiro Yamada 179cea59bd0SMasahiro Yamada timer { 180cea59bd0SMasahiro Yamada compatible = "arm,armv8-timer"; 18137179033SArnd Bergmann interrupts = <1 13 4>, 18237179033SArnd Bergmann <1 14 4>, 18337179033SArnd Bergmann <1 11 4>, 18437179033SArnd Bergmann <1 10 4>; 185cea59bd0SMasahiro Yamada }; 186cea59bd0SMasahiro Yamada 187dba74980SKunihiko Hayashi thermal-zones { 188dba74980SKunihiko Hayashi cpu-thermal { 189dba74980SKunihiko Hayashi polling-delay-passive = <250>; /* 250ms */ 190dba74980SKunihiko Hayashi polling-delay = <1000>; /* 1000ms */ 191dba74980SKunihiko Hayashi thermal-sensors = <&pvtctl>; 192dba74980SKunihiko Hayashi 193dba74980SKunihiko Hayashi trips { 194dba74980SKunihiko Hayashi cpu_crit: cpu-crit { 195dba74980SKunihiko Hayashi temperature = <110000>; /* 110C */ 196dba74980SKunihiko Hayashi hysteresis = <2000>; 197dba74980SKunihiko Hayashi type = "critical"; 198dba74980SKunihiko Hayashi }; 199dba74980SKunihiko Hayashi cpu_alert: cpu-alert { 200dba74980SKunihiko Hayashi temperature = <100000>; /* 100C */ 201dba74980SKunihiko Hayashi hysteresis = <2000>; 202dba74980SKunihiko Hayashi type = "passive"; 203dba74980SKunihiko Hayashi }; 204dba74980SKunihiko Hayashi }; 205dba74980SKunihiko Hayashi 206dba74980SKunihiko Hayashi cooling-maps { 207dba74980SKunihiko Hayashi map0 { 208dba74980SKunihiko Hayashi trip = <&cpu_alert>; 209072ae88aSViresh Kumar cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 210072ae88aSViresh Kumar <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 211072ae88aSViresh Kumar <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 212072ae88aSViresh Kumar <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 213dba74980SKunihiko Hayashi }; 214dba74980SKunihiko Hayashi }; 215dba74980SKunihiko Hayashi }; 216dba74980SKunihiko Hayashi }; 217dba74980SKunihiko Hayashi 218b5027603SMasahiro Yamada soc@0 { 219cea59bd0SMasahiro Yamada compatible = "simple-bus"; 220cea59bd0SMasahiro Yamada #address-cells = <1>; 221cea59bd0SMasahiro Yamada #size-cells = <1>; 222cea59bd0SMasahiro Yamada ranges = <0 0 0 0xffffffff>; 223cea59bd0SMasahiro Yamada 224925c5c32SKunihiko Hayashi spi0: spi@54006000 { 225925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 226925c5c32SKunihiko Hayashi status = "disabled"; 227925c5c32SKunihiko Hayashi reg = <0x54006000 0x100>; 228925c5c32SKunihiko Hayashi interrupts = <0 39 4>; 229925c5c32SKunihiko Hayashi pinctrl-names = "default"; 230925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi0>; 231925c5c32SKunihiko Hayashi clocks = <&peri_clk 11>; 232925c5c32SKunihiko Hayashi resets = <&peri_rst 11>; 233925c5c32SKunihiko Hayashi }; 234925c5c32SKunihiko Hayashi 235925c5c32SKunihiko Hayashi spi1: spi@54006100 { 236925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 237925c5c32SKunihiko Hayashi status = "disabled"; 238925c5c32SKunihiko Hayashi reg = <0x54006100 0x100>; 239925c5c32SKunihiko Hayashi interrupts = <0 216 4>; 240925c5c32SKunihiko Hayashi pinctrl-names = "default"; 241925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi1>; 242925c5c32SKunihiko Hayashi clocks = <&peri_clk 11>; 243925c5c32SKunihiko Hayashi resets = <&peri_rst 11>; 244925c5c32SKunihiko Hayashi }; 245925c5c32SKunihiko Hayashi 246925c5c32SKunihiko Hayashi spi2: spi@54006200 { 247925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 248925c5c32SKunihiko Hayashi status = "disabled"; 249925c5c32SKunihiko Hayashi reg = <0x54006200 0x100>; 250925c5c32SKunihiko Hayashi interrupts = <0 229 4>; 251925c5c32SKunihiko Hayashi pinctrl-names = "default"; 252925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi2>; 253925c5c32SKunihiko Hayashi clocks = <&peri_clk 11>; 254925c5c32SKunihiko Hayashi resets = <&peri_rst 11>; 255925c5c32SKunihiko Hayashi }; 256925c5c32SKunihiko Hayashi 257925c5c32SKunihiko Hayashi spi3: spi@54006300 { 258925c5c32SKunihiko Hayashi compatible = "socionext,uniphier-scssi"; 259925c5c32SKunihiko Hayashi status = "disabled"; 260925c5c32SKunihiko Hayashi reg = <0x54006300 0x100>; 261925c5c32SKunihiko Hayashi interrupts = <0 230 4>; 262925c5c32SKunihiko Hayashi pinctrl-names = "default"; 263925c5c32SKunihiko Hayashi pinctrl-0 = <&pinctrl_spi3>; 264925c5c32SKunihiko Hayashi clocks = <&peri_clk 11>; 265925c5c32SKunihiko Hayashi resets = <&peri_rst 11>; 266925c5c32SKunihiko Hayashi }; 267925c5c32SKunihiko Hayashi 268cea59bd0SMasahiro Yamada serial0: serial@54006800 { 269cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 270cea59bd0SMasahiro Yamada status = "disabled"; 271cea59bd0SMasahiro Yamada reg = <0x54006800 0x40>; 272cea59bd0SMasahiro Yamada interrupts = <0 33 4>; 273cea59bd0SMasahiro Yamada pinctrl-names = "default"; 274cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 27542aee275SMasahiro Yamada clocks = <&peri_clk 0>; 27676c48e1eSMasahiro Yamada resets = <&peri_rst 0>; 277cea59bd0SMasahiro Yamada }; 278cea59bd0SMasahiro Yamada 279cea59bd0SMasahiro Yamada serial1: serial@54006900 { 280cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 281cea59bd0SMasahiro Yamada status = "disabled"; 282cea59bd0SMasahiro Yamada reg = <0x54006900 0x40>; 283cea59bd0SMasahiro Yamada interrupts = <0 35 4>; 284cea59bd0SMasahiro Yamada pinctrl-names = "default"; 285cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 28642aee275SMasahiro Yamada clocks = <&peri_clk 1>; 28776c48e1eSMasahiro Yamada resets = <&peri_rst 1>; 288cea59bd0SMasahiro Yamada }; 289cea59bd0SMasahiro Yamada 290cea59bd0SMasahiro Yamada serial2: serial@54006a00 { 291cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 292cea59bd0SMasahiro Yamada status = "disabled"; 293cea59bd0SMasahiro Yamada reg = <0x54006a00 0x40>; 294cea59bd0SMasahiro Yamada interrupts = <0 37 4>; 295cea59bd0SMasahiro Yamada pinctrl-names = "default"; 296cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 29742aee275SMasahiro Yamada clocks = <&peri_clk 2>; 29876c48e1eSMasahiro Yamada resets = <&peri_rst 2>; 299cea59bd0SMasahiro Yamada }; 300cea59bd0SMasahiro Yamada 301cea59bd0SMasahiro Yamada serial3: serial@54006b00 { 302cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-uart"; 303cea59bd0SMasahiro Yamada status = "disabled"; 304cea59bd0SMasahiro Yamada reg = <0x54006b00 0x40>; 305cea59bd0SMasahiro Yamada interrupts = <0 177 4>; 306cea59bd0SMasahiro Yamada pinctrl-names = "default"; 307cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 30842aee275SMasahiro Yamada clocks = <&peri_clk 3>; 30976c48e1eSMasahiro Yamada resets = <&peri_rst 3>; 310cea59bd0SMasahiro Yamada }; 311cea59bd0SMasahiro Yamada 312277b51e7SMasahiro Yamada gpio: gpio@55000000 { 313277b51e7SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 314277b51e7SMasahiro Yamada reg = <0x55000000 0x200>; 315277b51e7SMasahiro Yamada interrupt-parent = <&aidet>; 316277b51e7SMasahiro Yamada interrupt-controller; 317277b51e7SMasahiro Yamada #interrupt-cells = <2>; 318277b51e7SMasahiro Yamada gpio-controller; 319277b51e7SMasahiro Yamada #gpio-cells = <2>; 320277b51e7SMasahiro Yamada gpio-ranges = <&pinctrl 0 0 0>, 321277b51e7SMasahiro Yamada <&pinctrl 96 0 0>, 322277b51e7SMasahiro Yamada <&pinctrl 160 0 0>; 323277b51e7SMasahiro Yamada gpio-ranges-group-names = "gpio_range0", 324277b51e7SMasahiro Yamada "gpio_range1", 325277b51e7SMasahiro Yamada "gpio_range2"; 326277b51e7SMasahiro Yamada ngpios = <205>; 327277b51e7SMasahiro Yamada socionext,interrupt-ranges = <0 48 16>, <16 154 5>, 328277b51e7SMasahiro Yamada <21 217 3>; 329277b51e7SMasahiro Yamada }; 330277b51e7SMasahiro Yamada 331fb21a0acSKatsuhiro Suzuki audio@56000000 { 332fb21a0acSKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-aio"; 333fb21a0acSKatsuhiro Suzuki reg = <0x56000000 0x80000>; 334fb21a0acSKatsuhiro Suzuki interrupts = <0 144 4>; 335fb21a0acSKatsuhiro Suzuki pinctrl-names = "default"; 336fb21a0acSKatsuhiro Suzuki pinctrl-0 = <&pinctrl_aout1>, 337fb21a0acSKatsuhiro Suzuki <&pinctrl_aoutiec1>; 338fb21a0acSKatsuhiro Suzuki clock-names = "aio"; 339fb21a0acSKatsuhiro Suzuki clocks = <&sys_clk 40>; 340fb21a0acSKatsuhiro Suzuki reset-names = "aio"; 341fb21a0acSKatsuhiro Suzuki resets = <&sys_rst 40>; 342fb21a0acSKatsuhiro Suzuki #sound-dai-cells = <1>; 3436c35921dSKatsuhiro Suzuki socionext,syscon = <&soc_glue>; 344fb21a0acSKatsuhiro Suzuki 345fb21a0acSKatsuhiro Suzuki i2s_port0: port@0 { 346fb21a0acSKatsuhiro Suzuki i2s_hdmi: endpoint { 347fb21a0acSKatsuhiro Suzuki }; 348fb21a0acSKatsuhiro Suzuki }; 349fb21a0acSKatsuhiro Suzuki 350fb21a0acSKatsuhiro Suzuki i2s_port1: port@1 { 351fb21a0acSKatsuhiro Suzuki i2s_pcmin2: endpoint { 352fb21a0acSKatsuhiro Suzuki }; 353fb21a0acSKatsuhiro Suzuki }; 354fb21a0acSKatsuhiro Suzuki 355fb21a0acSKatsuhiro Suzuki i2s_port2: port@2 { 356fb21a0acSKatsuhiro Suzuki i2s_line: endpoint { 357fb21a0acSKatsuhiro Suzuki dai-format = "i2s"; 358fb21a0acSKatsuhiro Suzuki remote-endpoint = <&evea_line>; 359fb21a0acSKatsuhiro Suzuki }; 360fb21a0acSKatsuhiro Suzuki }; 361fb21a0acSKatsuhiro Suzuki 362fb21a0acSKatsuhiro Suzuki i2s_port3: port@3 { 363fb21a0acSKatsuhiro Suzuki i2s_hpcmout1: endpoint { 364fb21a0acSKatsuhiro Suzuki }; 365fb21a0acSKatsuhiro Suzuki }; 366fb21a0acSKatsuhiro Suzuki 367fb21a0acSKatsuhiro Suzuki i2s_port4: port@4 { 368fb21a0acSKatsuhiro Suzuki i2s_hp: endpoint { 369fb21a0acSKatsuhiro Suzuki dai-format = "i2s"; 370fb21a0acSKatsuhiro Suzuki remote-endpoint = <&evea_hp>; 371fb21a0acSKatsuhiro Suzuki }; 372fb21a0acSKatsuhiro Suzuki }; 373fb21a0acSKatsuhiro Suzuki 374fb21a0acSKatsuhiro Suzuki spdif_port0: port@5 { 375fb21a0acSKatsuhiro Suzuki spdif_hiecout1: endpoint { 376fb21a0acSKatsuhiro Suzuki }; 377fb21a0acSKatsuhiro Suzuki }; 378fb21a0acSKatsuhiro Suzuki 379fb21a0acSKatsuhiro Suzuki src_port0: port@6 { 380fb21a0acSKatsuhiro Suzuki i2s_epcmout2: endpoint { 381fb21a0acSKatsuhiro Suzuki }; 382fb21a0acSKatsuhiro Suzuki }; 383fb21a0acSKatsuhiro Suzuki 384fb21a0acSKatsuhiro Suzuki src_port1: port@7 { 385fb21a0acSKatsuhiro Suzuki i2s_epcmout3: endpoint { 386fb21a0acSKatsuhiro Suzuki }; 387fb21a0acSKatsuhiro Suzuki }; 388fb21a0acSKatsuhiro Suzuki 389fb21a0acSKatsuhiro Suzuki comp_spdif_port0: port@8 { 390fb21a0acSKatsuhiro Suzuki comp_spdif_hiecout1: endpoint { 391fb21a0acSKatsuhiro Suzuki }; 392fb21a0acSKatsuhiro Suzuki }; 393fb21a0acSKatsuhiro Suzuki }; 394fb21a0acSKatsuhiro Suzuki 395fb21a0acSKatsuhiro Suzuki codec@57900000 { 396fb21a0acSKatsuhiro Suzuki compatible = "socionext,uniphier-evea"; 397fb21a0acSKatsuhiro Suzuki reg = <0x57900000 0x1000>; 398fb21a0acSKatsuhiro Suzuki clock-names = "evea", "exiv"; 399fb21a0acSKatsuhiro Suzuki clocks = <&sys_clk 41>, <&sys_clk 42>; 400fb21a0acSKatsuhiro Suzuki reset-names = "evea", "exiv", "adamv"; 401fb21a0acSKatsuhiro Suzuki resets = <&sys_rst 41>, <&sys_rst 42>, <&adamv_rst 0>; 402fb21a0acSKatsuhiro Suzuki #sound-dai-cells = <1>; 403fb21a0acSKatsuhiro Suzuki 404fb21a0acSKatsuhiro Suzuki port@0 { 405fb21a0acSKatsuhiro Suzuki evea_line: endpoint { 406fb21a0acSKatsuhiro Suzuki remote-endpoint = <&i2s_line>; 407fb21a0acSKatsuhiro Suzuki }; 408fb21a0acSKatsuhiro Suzuki }; 409fb21a0acSKatsuhiro Suzuki 410fb21a0acSKatsuhiro Suzuki port@1 { 411fb21a0acSKatsuhiro Suzuki evea_hp: endpoint { 412fb21a0acSKatsuhiro Suzuki remote-endpoint = <&i2s_hp>; 413fb21a0acSKatsuhiro Suzuki }; 414fb21a0acSKatsuhiro Suzuki }; 415fb21a0acSKatsuhiro Suzuki }; 416fb21a0acSKatsuhiro Suzuki 417178b3568SKatsuhiro Suzuki adamv@57920000 { 418178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-adamv", 419178b3568SKatsuhiro Suzuki "simple-mfd", "syscon"; 420178b3568SKatsuhiro Suzuki reg = <0x57920000 0x1000>; 421178b3568SKatsuhiro Suzuki 422178b3568SKatsuhiro Suzuki adamv_rst: reset { 423178b3568SKatsuhiro Suzuki compatible = "socionext,uniphier-ld20-adamv-reset"; 424178b3568SKatsuhiro Suzuki #reset-cells = <1>; 425178b3568SKatsuhiro Suzuki }; 426178b3568SKatsuhiro Suzuki }; 427178b3568SKatsuhiro Suzuki 428cea59bd0SMasahiro Yamada i2c0: i2c@58780000 { 429cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 430cea59bd0SMasahiro Yamada status = "disabled"; 431cea59bd0SMasahiro Yamada reg = <0x58780000 0x80>; 432cea59bd0SMasahiro Yamada #address-cells = <1>; 433cea59bd0SMasahiro Yamada #size-cells = <0>; 434cea59bd0SMasahiro Yamada interrupts = <0 41 4>; 435cea59bd0SMasahiro Yamada pinctrl-names = "default"; 436cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 43742aee275SMasahiro Yamada clocks = <&peri_clk 4>; 43876c48e1eSMasahiro Yamada resets = <&peri_rst 4>; 439cea59bd0SMasahiro Yamada clock-frequency = <100000>; 440cea59bd0SMasahiro Yamada }; 441cea59bd0SMasahiro Yamada 442cea59bd0SMasahiro Yamada i2c1: i2c@58781000 { 443cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 444cea59bd0SMasahiro Yamada status = "disabled"; 445cea59bd0SMasahiro Yamada reg = <0x58781000 0x80>; 446cea59bd0SMasahiro Yamada #address-cells = <1>; 447cea59bd0SMasahiro Yamada #size-cells = <0>; 448cea59bd0SMasahiro Yamada interrupts = <0 42 4>; 449cea59bd0SMasahiro Yamada pinctrl-names = "default"; 450cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 45142aee275SMasahiro Yamada clocks = <&peri_clk 5>; 45276c48e1eSMasahiro Yamada resets = <&peri_rst 5>; 453cea59bd0SMasahiro Yamada clock-frequency = <100000>; 454cea59bd0SMasahiro Yamada }; 455cea59bd0SMasahiro Yamada 456cea59bd0SMasahiro Yamada i2c2: i2c@58782000 { 457cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 458cea59bd0SMasahiro Yamada reg = <0x58782000 0x80>; 459cea59bd0SMasahiro Yamada #address-cells = <1>; 460cea59bd0SMasahiro Yamada #size-cells = <0>; 461cea59bd0SMasahiro Yamada interrupts = <0 43 4>; 46242aee275SMasahiro Yamada clocks = <&peri_clk 6>; 46376c48e1eSMasahiro Yamada resets = <&peri_rst 6>; 464cea59bd0SMasahiro Yamada clock-frequency = <400000>; 465cea59bd0SMasahiro Yamada }; 466cea59bd0SMasahiro Yamada 467cea59bd0SMasahiro Yamada i2c3: i2c@58783000 { 468cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 469cea59bd0SMasahiro Yamada status = "disabled"; 470cea59bd0SMasahiro Yamada reg = <0x58783000 0x80>; 471cea59bd0SMasahiro Yamada #address-cells = <1>; 472cea59bd0SMasahiro Yamada #size-cells = <0>; 473cea59bd0SMasahiro Yamada interrupts = <0 44 4>; 474cea59bd0SMasahiro Yamada pinctrl-names = "default"; 475cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 47642aee275SMasahiro Yamada clocks = <&peri_clk 7>; 47776c48e1eSMasahiro Yamada resets = <&peri_rst 7>; 478cea59bd0SMasahiro Yamada clock-frequency = <100000>; 479cea59bd0SMasahiro Yamada }; 480cea59bd0SMasahiro Yamada 481cea59bd0SMasahiro Yamada i2c4: i2c@58784000 { 482cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 483cea59bd0SMasahiro Yamada status = "disabled"; 484cea59bd0SMasahiro Yamada reg = <0x58784000 0x80>; 485cea59bd0SMasahiro Yamada #address-cells = <1>; 486cea59bd0SMasahiro Yamada #size-cells = <0>; 487cea59bd0SMasahiro Yamada interrupts = <0 45 4>; 488cea59bd0SMasahiro Yamada pinctrl-names = "default"; 489cea59bd0SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c4>; 49042aee275SMasahiro Yamada clocks = <&peri_clk 8>; 49176c48e1eSMasahiro Yamada resets = <&peri_rst 8>; 492cea59bd0SMasahiro Yamada clock-frequency = <100000>; 493cea59bd0SMasahiro Yamada }; 494cea59bd0SMasahiro Yamada 495cea59bd0SMasahiro Yamada i2c5: i2c@58785000 { 496cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 497cea59bd0SMasahiro Yamada reg = <0x58785000 0x80>; 498cea59bd0SMasahiro Yamada #address-cells = <1>; 499cea59bd0SMasahiro Yamada #size-cells = <0>; 500cea59bd0SMasahiro Yamada interrupts = <0 25 4>; 50142aee275SMasahiro Yamada clocks = <&peri_clk 9>; 50276c48e1eSMasahiro Yamada resets = <&peri_rst 9>; 503cea59bd0SMasahiro Yamada clock-frequency = <400000>; 504cea59bd0SMasahiro Yamada }; 505cea59bd0SMasahiro Yamada 506cea59bd0SMasahiro Yamada system_bus: system-bus@58c00000 { 507cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 508cea59bd0SMasahiro Yamada status = "disabled"; 509cea59bd0SMasahiro Yamada reg = <0x58c00000 0x400>; 510cea59bd0SMasahiro Yamada #address-cells = <2>; 511cea59bd0SMasahiro Yamada #size-cells = <1>; 5125d9a83c9SMasahiro Yamada pinctrl-names = "default"; 5135d9a83c9SMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 514cea59bd0SMasahiro Yamada }; 515cea59bd0SMasahiro Yamada 516b10ee7e3SMasahiro Yamada smpctrl@59801000 { 517cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 518cea59bd0SMasahiro Yamada reg = <0x59801000 0x400>; 519cea59bd0SMasahiro Yamada }; 520cea59bd0SMasahiro Yamada 5218e68c65dSMasahiro Yamada sdctrl@59810000 { 5228e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sdctrl", 52342aee275SMasahiro Yamada "simple-mfd", "syscon"; 524555861fbSMasahiro Yamada reg = <0x59810000 0x400>; 52542aee275SMasahiro Yamada 5268e68c65dSMasahiro Yamada sd_clk: clock { 5278e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-clock"; 52842aee275SMasahiro Yamada #clock-cells = <1>; 52942aee275SMasahiro Yamada }; 53042aee275SMasahiro Yamada 5318e68c65dSMasahiro Yamada sd_rst: reset { 5328e68c65dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-reset"; 53342aee275SMasahiro Yamada #reset-cells = <1>; 53442aee275SMasahiro Yamada }; 53542aee275SMasahiro Yamada }; 53642aee275SMasahiro Yamada 53742aee275SMasahiro Yamada perictrl@59820000 { 538fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-perictrl", 53942aee275SMasahiro Yamada "simple-mfd", "syscon"; 54042aee275SMasahiro Yamada reg = <0x59820000 0x200>; 54142aee275SMasahiro Yamada 54242aee275SMasahiro Yamada peri_clk: clock { 54342aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-clock"; 54442aee275SMasahiro Yamada #clock-cells = <1>; 54542aee275SMasahiro Yamada }; 54642aee275SMasahiro Yamada 54742aee275SMasahiro Yamada peri_rst: reset { 54842aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-reset"; 54942aee275SMasahiro Yamada #reset-cells = <1>; 55042aee275SMasahiro Yamada }; 55142aee275SMasahiro Yamada }; 55242aee275SMasahiro Yamada 5533a93cc26SMasahiro Yamada emmc: sdhc@5a000000 { 5543a93cc26SMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 5553a93cc26SMasahiro Yamada reg = <0x5a000000 0x400>; 5563a93cc26SMasahiro Yamada interrupts = <0 78 4>; 5579c0a9700SMasahiro Yamada pinctrl-names = "default"; 5589c0a9700SMasahiro Yamada pinctrl-0 = <&pinctrl_emmc>; 5593a93cc26SMasahiro Yamada clocks = <&sys_clk 4>; 56076c48e1eSMasahiro Yamada resets = <&sys_rst 4>; 5613a93cc26SMasahiro Yamada bus-width = <8>; 5623a93cc26SMasahiro Yamada mmc-ddr-1_8v; 5633a93cc26SMasahiro Yamada mmc-hs200-1_8v; 564b6e5ec20SMasahiro Yamada mmc-pwrseq = <&emmc_pwrseq>; 565f4e5200fSMasahiro Yamada cdns,phy-input-delay-legacy = <9>; 566ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 567ba6f7011SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 568e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 569e345ededSMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 5703a93cc26SMasahiro Yamada }; 5713a93cc26SMasahiro Yamada 57284a9c4d5SMasahiro Yamada sd: sdhc@5a400000 { 57384a9c4d5SMasahiro Yamada compatible = "socionext,uniphier-sd-v3.1.1"; 57484a9c4d5SMasahiro Yamada status = "disabled"; 57584a9c4d5SMasahiro Yamada reg = <0x5a400000 0x800>; 57684a9c4d5SMasahiro Yamada interrupts = <0 76 4>; 57784a9c4d5SMasahiro Yamada pinctrl-names = "default"; 57884a9c4d5SMasahiro Yamada pinctrl-0 = <&pinctrl_sd>; 57984a9c4d5SMasahiro Yamada clocks = <&sd_clk 0>; 58084a9c4d5SMasahiro Yamada reset-names = "host"; 58184a9c4d5SMasahiro Yamada resets = <&sd_rst 0>; 58284a9c4d5SMasahiro Yamada bus-width = <4>; 58384a9c4d5SMasahiro Yamada cap-sd-highspeed; 58484a9c4d5SMasahiro Yamada }; 58584a9c4d5SMasahiro Yamada 5866c35921dSKatsuhiro Suzuki soc_glue: soc-glue@5f800000 { 587fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-soc-glue", 5889d4f5505SMasahiro Yamada "simple-mfd", "syscon"; 589cea59bd0SMasahiro Yamada reg = <0x5f800000 0x2000>; 590cea59bd0SMasahiro Yamada 591cea59bd0SMasahiro Yamada pinctrl: pinctrl { 592cea59bd0SMasahiro Yamada compatible = "socionext,uniphier-ld20-pinctrl"; 593cea59bd0SMasahiro Yamada }; 594cea59bd0SMasahiro Yamada }; 595cea59bd0SMasahiro Yamada 596f05851e1SKeiji Hayashibara soc-glue@5f900000 { 597f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-ld20-soc-glue-debug", 598f05851e1SKeiji Hayashibara "simple-mfd"; 599f05851e1SKeiji Hayashibara #address-cells = <1>; 600f05851e1SKeiji Hayashibara #size-cells = <1>; 601f05851e1SKeiji Hayashibara ranges = <0 0x5f900000 0x2000>; 602f05851e1SKeiji Hayashibara 603f05851e1SKeiji Hayashibara efuse@100 { 604f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 605f05851e1SKeiji Hayashibara reg = <0x100 0x28>; 606f05851e1SKeiji Hayashibara }; 607f05851e1SKeiji Hayashibara 608f05851e1SKeiji Hayashibara efuse@200 { 609f05851e1SKeiji Hayashibara compatible = "socionext,uniphier-efuse"; 610f05851e1SKeiji Hayashibara reg = <0x200 0x68>; 611d7b9beb8SKunihiko Hayashi #address-cells = <1>; 612d7b9beb8SKunihiko Hayashi #size-cells = <1>; 613d7b9beb8SKunihiko Hayashi 614d7b9beb8SKunihiko Hayashi /* USB cells */ 615d7b9beb8SKunihiko Hayashi usb_rterm0: trim@54,4 { 616d7b9beb8SKunihiko Hayashi reg = <0x54 1>; 617d7b9beb8SKunihiko Hayashi bits = <4 2>; 618d7b9beb8SKunihiko Hayashi }; 619d7b9beb8SKunihiko Hayashi usb_rterm1: trim@55,4 { 620d7b9beb8SKunihiko Hayashi reg = <0x55 1>; 621d7b9beb8SKunihiko Hayashi bits = <4 2>; 622d7b9beb8SKunihiko Hayashi }; 623d7b9beb8SKunihiko Hayashi usb_rterm2: trim@58,4 { 624d7b9beb8SKunihiko Hayashi reg = <0x58 1>; 625d7b9beb8SKunihiko Hayashi bits = <4 2>; 626d7b9beb8SKunihiko Hayashi }; 627d7b9beb8SKunihiko Hayashi usb_rterm3: trim@59,4 { 628d7b9beb8SKunihiko Hayashi reg = <0x59 1>; 629d7b9beb8SKunihiko Hayashi bits = <4 2>; 630d7b9beb8SKunihiko Hayashi }; 631d7b9beb8SKunihiko Hayashi usb_sel_t0: trim@54,0 { 632d7b9beb8SKunihiko Hayashi reg = <0x54 1>; 633d7b9beb8SKunihiko Hayashi bits = <0 4>; 634d7b9beb8SKunihiko Hayashi }; 635d7b9beb8SKunihiko Hayashi usb_sel_t1: trim@55,0 { 636d7b9beb8SKunihiko Hayashi reg = <0x55 1>; 637d7b9beb8SKunihiko Hayashi bits = <0 4>; 638d7b9beb8SKunihiko Hayashi }; 639d7b9beb8SKunihiko Hayashi usb_sel_t2: trim@58,0 { 640d7b9beb8SKunihiko Hayashi reg = <0x58 1>; 641d7b9beb8SKunihiko Hayashi bits = <0 4>; 642d7b9beb8SKunihiko Hayashi }; 643d7b9beb8SKunihiko Hayashi usb_sel_t3: trim@59,0 { 644d7b9beb8SKunihiko Hayashi reg = <0x59 1>; 645d7b9beb8SKunihiko Hayashi bits = <0 4>; 646d7b9beb8SKunihiko Hayashi }; 647d7b9beb8SKunihiko Hayashi usb_hs_i0: trim@56,0 { 648d7b9beb8SKunihiko Hayashi reg = <0x56 1>; 649d7b9beb8SKunihiko Hayashi bits = <0 4>; 650d7b9beb8SKunihiko Hayashi }; 651d7b9beb8SKunihiko Hayashi usb_hs_i2: trim@5a,0 { 652d7b9beb8SKunihiko Hayashi reg = <0x5a 1>; 653d7b9beb8SKunihiko Hayashi bits = <0 4>; 654d7b9beb8SKunihiko Hayashi }; 655f05851e1SKeiji Hayashibara }; 656f05851e1SKeiji Hayashibara }; 657f05851e1SKeiji Hayashibara 6583dfc6e98SMasahiro Yamada aidet: aidet@5fc20000 { 6593dfc6e98SMasahiro Yamada compatible = "socionext,uniphier-ld20-aidet"; 6603dfc6e98SMasahiro Yamada reg = <0x5fc20000 0x200>; 6613dfc6e98SMasahiro Yamada interrupt-controller; 6623dfc6e98SMasahiro Yamada #interrupt-cells = <2>; 6633dfc6e98SMasahiro Yamada }; 6643dfc6e98SMasahiro Yamada 665cea59bd0SMasahiro Yamada gic: interrupt-controller@5fe00000 { 666cea59bd0SMasahiro Yamada compatible = "arm,gic-v3"; 667cea59bd0SMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 668cea59bd0SMasahiro Yamada <0x5fe80000 0x80000>; /* GICR */ 669cea59bd0SMasahiro Yamada interrupt-controller; 670cea59bd0SMasahiro Yamada #interrupt-cells = <3>; 671cea59bd0SMasahiro Yamada interrupts = <1 9 4>; 672cea59bd0SMasahiro Yamada }; 67342aee275SMasahiro Yamada 67442aee275SMasahiro Yamada sysctrl@61840000 { 675fb28cef0SMasahiro Yamada compatible = "socionext,uniphier-ld20-sysctrl", 67642aee275SMasahiro Yamada "simple-mfd", "syscon"; 6771ef64af8SMasahiro Yamada reg = <0x61840000 0x10000>; 67842aee275SMasahiro Yamada 67942aee275SMasahiro Yamada sys_clk: clock { 68042aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-clock"; 68142aee275SMasahiro Yamada #clock-cells = <1>; 68242aee275SMasahiro Yamada }; 68342aee275SMasahiro Yamada 68442aee275SMasahiro Yamada sys_rst: reset { 68542aee275SMasahiro Yamada compatible = "socionext,uniphier-ld20-reset"; 68642aee275SMasahiro Yamada #reset-cells = <1>; 68742aee275SMasahiro Yamada }; 6884c4c960aSKeiji Hayashibara 6894c4c960aSKeiji Hayashibara watchdog { 6904c4c960aSKeiji Hayashibara compatible = "socionext,uniphier-wdt"; 6914c4c960aSKeiji Hayashibara }; 692dba74980SKunihiko Hayashi 693dba74980SKunihiko Hayashi pvtctl: pvtctl { 694dba74980SKunihiko Hayashi compatible = "socionext,uniphier-ld20-thermal"; 695dba74980SKunihiko Hayashi interrupts = <0 3 4>; 696dba74980SKunihiko Hayashi #thermal-sensor-cells = <0>; 697dba74980SKunihiko Hayashi socionext,tmod-calibration = <0x0f22 0x68ee>; 698dba74980SKunihiko Hayashi }; 69942aee275SMasahiro Yamada }; 700e5aefb38SMasahiro Yamada 701c73730eeSKunihiko Hayashi eth: ethernet@65000000 { 702c73730eeSKunihiko Hayashi compatible = "socionext,uniphier-ld20-ave4"; 703c73730eeSKunihiko Hayashi status = "disabled"; 704c73730eeSKunihiko Hayashi reg = <0x65000000 0x8500>; 705c73730eeSKunihiko Hayashi interrupts = <0 66 4>; 706c73730eeSKunihiko Hayashi pinctrl-names = "default"; 707c73730eeSKunihiko Hayashi pinctrl-0 = <&pinctrl_ether_rgmii>; 708a34a464dSKunihiko Hayashi clock-names = "ether"; 709c73730eeSKunihiko Hayashi clocks = <&sys_clk 6>; 710a34a464dSKunihiko Hayashi reset-names = "ether"; 711c73730eeSKunihiko Hayashi resets = <&sys_rst 6>; 712c73730eeSKunihiko Hayashi phy-mode = "rgmii"; 713c73730eeSKunihiko Hayashi local-mac-address = [00 00 00 00 00 00]; 714b076ff8bSKunihiko Hayashi socionext,syscon-phy-mode = <&soc_glue 0>; 715c73730eeSKunihiko Hayashi 716c73730eeSKunihiko Hayashi mdio: mdio { 717c73730eeSKunihiko Hayashi #address-cells = <1>; 718c73730eeSKunihiko Hayashi #size-cells = <0>; 719c73730eeSKunihiko Hayashi }; 720c73730eeSKunihiko Hayashi }; 721c73730eeSKunihiko Hayashi 722d7b9beb8SKunihiko Hayashi usb: usb@65a00000 { 723d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-dwc3", "snps,dwc3"; 724d7b9beb8SKunihiko Hayashi status = "disabled"; 725d7b9beb8SKunihiko Hayashi reg = <0x65a00000 0xcd00>; 726d7b9beb8SKunihiko Hayashi interrupt-names = "host"; 727d7b9beb8SKunihiko Hayashi interrupts = <0 134 4>; 728d7b9beb8SKunihiko Hayashi pinctrl-names = "default"; 729d7b9beb8SKunihiko Hayashi pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb1>, 730d7b9beb8SKunihiko Hayashi <&pinctrl_usb2>, <&pinctrl_usb3>; 731d7b9beb8SKunihiko Hayashi clock-names = "ref", "bus_early", "suspend"; 732d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 14>, <&sys_clk 14>; 733d7b9beb8SKunihiko Hayashi resets = <&usb_rst 15>; 734d7b9beb8SKunihiko Hayashi phys = <&usb_hsphy0>, <&usb_hsphy1>, 735d7b9beb8SKunihiko Hayashi <&usb_hsphy2>, <&usb_hsphy3>, 736d7b9beb8SKunihiko Hayashi <&usb_ssphy0>, <&usb_ssphy1>; 737d7b9beb8SKunihiko Hayashi dr_mode = "host"; 738d7b9beb8SKunihiko Hayashi }; 739d7b9beb8SKunihiko Hayashi 740d7b9beb8SKunihiko Hayashi usb-glue@65b00000 { 741d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-dwc3-glue", 742d7b9beb8SKunihiko Hayashi "simple-mfd"; 743d7b9beb8SKunihiko Hayashi #address-cells = <1>; 744d7b9beb8SKunihiko Hayashi #size-cells = <1>; 745d7b9beb8SKunihiko Hayashi ranges = <0 0x65b00000 0x400>; 746d7b9beb8SKunihiko Hayashi 747d7b9beb8SKunihiko Hayashi usb_rst: reset@0 { 748d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-reset"; 749d7b9beb8SKunihiko Hayashi reg = <0x0 0x4>; 750d7b9beb8SKunihiko Hayashi #reset-cells = <1>; 751d7b9beb8SKunihiko Hayashi clock-names = "link"; 752d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>; 753d7b9beb8SKunihiko Hayashi reset-names = "link"; 754d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>; 755d7b9beb8SKunihiko Hayashi }; 756d7b9beb8SKunihiko Hayashi 757d7b9beb8SKunihiko Hayashi usb_vbus0: regulator@100 { 758d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-regulator"; 759d7b9beb8SKunihiko Hayashi reg = <0x100 0x10>; 760d7b9beb8SKunihiko Hayashi clock-names = "link"; 761d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>; 762d7b9beb8SKunihiko Hayashi reset-names = "link"; 763d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>; 764d7b9beb8SKunihiko Hayashi }; 765d7b9beb8SKunihiko Hayashi 766d7b9beb8SKunihiko Hayashi usb_vbus1: regulator@110 { 767d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-regulator"; 768d7b9beb8SKunihiko Hayashi reg = <0x110 0x10>; 769d7b9beb8SKunihiko Hayashi clock-names = "link"; 770d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>; 771d7b9beb8SKunihiko Hayashi reset-names = "link"; 772d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>; 773d7b9beb8SKunihiko Hayashi }; 774d7b9beb8SKunihiko Hayashi 775d7b9beb8SKunihiko Hayashi usb_vbus2: regulator@120 { 776d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-regulator"; 777d7b9beb8SKunihiko Hayashi reg = <0x120 0x10>; 778d7b9beb8SKunihiko Hayashi clock-names = "link"; 779d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>; 780d7b9beb8SKunihiko Hayashi reset-names = "link"; 781d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>; 782d7b9beb8SKunihiko Hayashi }; 783d7b9beb8SKunihiko Hayashi 784d7b9beb8SKunihiko Hayashi usb_vbus3: regulator@130 { 785d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-regulator"; 786d7b9beb8SKunihiko Hayashi reg = <0x130 0x10>; 787d7b9beb8SKunihiko Hayashi clock-names = "link"; 788d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>; 789d7b9beb8SKunihiko Hayashi reset-names = "link"; 790d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>; 791d7b9beb8SKunihiko Hayashi }; 792d7b9beb8SKunihiko Hayashi 793d7b9beb8SKunihiko Hayashi usb_hsphy0: hs-phy@200 { 794d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-hsphy"; 795d7b9beb8SKunihiko Hayashi reg = <0x200 0x10>; 796d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 797d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 798d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 16>; 799d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 800d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 16>; 801d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus0>; 802d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 803d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm0>, <&usb_sel_t0>, 804d7b9beb8SKunihiko Hayashi <&usb_hs_i0>; 805d7b9beb8SKunihiko Hayashi }; 806d7b9beb8SKunihiko Hayashi 807d7b9beb8SKunihiko Hayashi usb_hsphy1: hs-phy@210 { 808d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-hsphy"; 809d7b9beb8SKunihiko Hayashi reg = <0x210 0x10>; 810d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 811d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 812d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 16>; 813d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 814d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 16>; 815d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus1>; 816d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 817d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm1>, <&usb_sel_t1>, 818d7b9beb8SKunihiko Hayashi <&usb_hs_i0>; 819d7b9beb8SKunihiko Hayashi }; 820d7b9beb8SKunihiko Hayashi 821d7b9beb8SKunihiko Hayashi usb_hsphy2: hs-phy@220 { 822d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-hsphy"; 823d7b9beb8SKunihiko Hayashi reg = <0x220 0x10>; 824d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 825d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 826d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 17>; 827d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 828d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 17>; 829d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus2>; 830d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 831d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm2>, <&usb_sel_t2>, 832d7b9beb8SKunihiko Hayashi <&usb_hs_i2>; 833d7b9beb8SKunihiko Hayashi }; 834d7b9beb8SKunihiko Hayashi 835d7b9beb8SKunihiko Hayashi usb_hsphy3: hs-phy@230 { 836d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-hsphy"; 837d7b9beb8SKunihiko Hayashi reg = <0x230 0x10>; 838d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 839d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 840d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 17>; 841d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 842d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 17>; 843d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus3>; 844d7b9beb8SKunihiko Hayashi nvmem-cell-names = "rterm", "sel_t", "hs_i"; 845d7b9beb8SKunihiko Hayashi nvmem-cells = <&usb_rterm3>, <&usb_sel_t3>, 846d7b9beb8SKunihiko Hayashi <&usb_hs_i2>; 847d7b9beb8SKunihiko Hayashi }; 848d7b9beb8SKunihiko Hayashi 849d7b9beb8SKunihiko Hayashi usb_ssphy0: ss-phy@300 { 850d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-ssphy"; 851d7b9beb8SKunihiko Hayashi reg = <0x300 0x10>; 852d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 853d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 854d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 18>; 855d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 856d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 18>; 857d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus0>; 858d7b9beb8SKunihiko Hayashi }; 859d7b9beb8SKunihiko Hayashi 860d7b9beb8SKunihiko Hayashi usb_ssphy1: ss-phy@310 { 861d7b9beb8SKunihiko Hayashi compatible = "socionext,uniphier-ld20-usb3-ssphy"; 862d7b9beb8SKunihiko Hayashi reg = <0x310 0x10>; 863d7b9beb8SKunihiko Hayashi #phy-cells = <0>; 864d7b9beb8SKunihiko Hayashi clock-names = "link", "phy"; 865d7b9beb8SKunihiko Hayashi clocks = <&sys_clk 14>, <&sys_clk 19>; 866d7b9beb8SKunihiko Hayashi reset-names = "link", "phy"; 867d7b9beb8SKunihiko Hayashi resets = <&sys_rst 14>, <&sys_rst 19>; 868d7b9beb8SKunihiko Hayashi vbus-supply = <&usb_vbus1>; 869d7b9beb8SKunihiko Hayashi }; 870d7b9beb8SKunihiko Hayashi }; 871d7b9beb8SKunihiko Hayashi 872e5aefb38SMasahiro Yamada nand: nand@68000000 { 873e5aefb38SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 874e5aefb38SMasahiro Yamada status = "disabled"; 875e5aefb38SMasahiro Yamada reg-names = "nand_data", "denali_reg"; 876e5aefb38SMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 877e5aefb38SMasahiro Yamada interrupts = <0 65 4>; 878e5aefb38SMasahiro Yamada pinctrl-names = "default"; 879e5aefb38SMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 880bae120f8SMasahiro Yamada clock-names = "nand", "nand_x", "ecc"; 881bae120f8SMasahiro Yamada clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; 88276c48e1eSMasahiro Yamada resets = <&sys_rst 2>; 883e5aefb38SMasahiro Yamada }; 884cea59bd0SMasahiro Yamada }; 885cea59bd0SMasahiro Yamada}; 886cea59bd0SMasahiro Yamada 8875740ea4eSMasahiro Yamada#include "uniphier-pinctrl.dtsi" 888fb21a0acSKatsuhiro Suzuki 889fb21a0acSKatsuhiro Suzuki&pinctrl_aout1 { 890fb21a0acSKatsuhiro Suzuki drive-strength = <4>; /* default: 3.5mA */ 891fb21a0acSKatsuhiro Suzuki 892fb21a0acSKatsuhiro Suzuki ao1dacck { 893fb21a0acSKatsuhiro Suzuki pins = "AO1DACCK"; 894fb21a0acSKatsuhiro Suzuki drive-strength = <5>; /* 5mA */ 895fb21a0acSKatsuhiro Suzuki }; 896fb21a0acSKatsuhiro Suzuki}; 897fb21a0acSKatsuhiro Suzuki 898fb21a0acSKatsuhiro Suzuki&pinctrl_aoutiec1 { 899fb21a0acSKatsuhiro Suzuki drive-strength = <4>; /* default: 3.5mA */ 900fb21a0acSKatsuhiro Suzuki 901fb21a0acSKatsuhiro Suzuki ao1arc { 902fb21a0acSKatsuhiro Suzuki pins = "AO1ARC"; 903fb21a0acSKatsuhiro Suzuki drive-strength = <11>; /* 11mA */ 904fb21a0acSKatsuhiro Suzuki }; 905fb21a0acSKatsuhiro Suzuki}; 906