1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2022 Hardkernel Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/leds/common.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include "rk3568.dtsi" 12 13/ { 14 model = "Hardkernel ODROID-M1"; 15 compatible = "rockchip,rk3568-odroid-m1", "rockchip,rk3568"; 16 17 aliases { 18 ethernet0 = &gmac0; 19 i2c0 = &i2c3; 20 i2c3 = &i2c0; 21 mmc0 = &sdhci; 22 mmc1 = &sdmmc0; 23 serial0 = &uart1; 24 serial1 = &uart0; 25 }; 26 27 chosen { 28 stdout-path = "serial2:1500000n8"; 29 }; 30 31 dc_12v: dc-12v-regulator { 32 compatible = "regulator-fixed"; 33 regulator-name = "dc_12v"; 34 regulator-always-on; 35 regulator-boot-on; 36 regulator-min-microvolt = <12000000>; 37 regulator-max-microvolt = <12000000>; 38 }; 39 40 leds { 41 compatible = "gpio-leds"; 42 43 led_power: led-0 { 44 gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; 45 function = LED_FUNCTION_POWER; 46 color = <LED_COLOR_ID_RED>; 47 default-state = "keep"; 48 linux,default-trigger = "default-on"; 49 pinctrl-names = "default"; 50 pinctrl-0 = <&led_power_pin>; 51 }; 52 led_work: led-1 { 53 gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; 54 function = LED_FUNCTION_HEARTBEAT; 55 color = <LED_COLOR_ID_BLUE>; 56 linux,default-trigger = "heartbeat"; 57 pinctrl-names = "default"; 58 pinctrl-0 = <&led_work_pin>; 59 }; 60 }; 61 62 rk809-sound { 63 compatible = "simple-audio-card"; 64 pinctrl-names = "default"; 65 pinctrl-0 = <&hp_det_pin>; 66 simple-audio-card,name = "Analog RK817"; 67 simple-audio-card,format = "i2s"; 68 simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; 69 simple-audio-card,mclk-fs = <256>; 70 simple-audio-card,widgets = 71 "Headphone", "Headphones", 72 "Speaker", "Speaker"; 73 simple-audio-card,routing = 74 "Headphones", "HPOL", 75 "Headphones", "HPOR", 76 "Speaker", "SPKO"; 77 78 simple-audio-card,cpu { 79 sound-dai = <&i2s1_8ch>; 80 }; 81 82 simple-audio-card,codec { 83 sound-dai = <&rk809>; 84 }; 85 }; 86 87 vcc3v3_sys: vcc3v3-sys-regulator { 88 compatible = "regulator-fixed"; 89 regulator-name = "vcc3v3_sys"; 90 regulator-always-on; 91 regulator-boot-on; 92 regulator-min-microvolt = <3300000>; 93 regulator-max-microvolt = <3300000>; 94 vin-supply = <&dc_12v>; 95 }; 96}; 97 98&cpu0 { 99 cpu-supply = <&vdd_cpu>; 100}; 101 102&cpu1 { 103 cpu-supply = <&vdd_cpu>; 104}; 105 106&cpu2 { 107 cpu-supply = <&vdd_cpu>; 108}; 109 110&cpu3 { 111 cpu-supply = <&vdd_cpu>; 112}; 113 114&gmac0 { 115 assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; 116 assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; 117 assigned-clock-rates = <0>, <125000000>; 118 clock_in_out = "output"; 119 phy-handle = <&rgmii_phy0>; 120 phy-mode = "rgmii"; 121 phy-supply = <&vcc3v3_sys>; 122 pinctrl-names = "default"; 123 pinctrl-0 = <&gmac0_miim 124 &gmac0_tx_bus2 125 &gmac0_rx_bus2 126 &gmac0_rgmii_clk 127 &gmac0_rgmii_bus>; 128 status = "okay"; 129 130 tx_delay = <0x4f>; 131 rx_delay = <0x2d>; 132}; 133 134&i2c0 { 135 status = "okay"; 136 137 vdd_cpu: regulator@1c { 138 compatible = "tcs,tcs4525"; 139 reg = <0x1c>; 140 fcs,suspend-voltage-selector = <1>; 141 regulator-name = "vdd_cpu"; 142 regulator-always-on; 143 regulator-boot-on; 144 regulator-min-microvolt = <800000>; 145 regulator-max-microvolt = <1150000>; 146 regulator-ramp-delay = <2300>; 147 vin-supply = <&vcc3v3_sys>; 148 149 regulator-state-mem { 150 regulator-off-in-suspend; 151 }; 152 }; 153 154 rk809: pmic@20 { 155 compatible = "rockchip,rk809"; 156 reg = <0x20>; 157 interrupt-parent = <&gpio0>; 158 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; 159 assigned-clocks = <&cru I2S1_MCLKOUT_TX>; 160 assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; 161 #clock-cells = <1>; 162 clock-names = "mclk"; 163 clocks = <&cru I2S1_MCLKOUT_TX>; 164 pinctrl-names = "default"; 165 pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>; 166 rockchip,system-power-controller; 167 #sound-dai-cells = <0>; 168 vcc1-supply = <&vcc3v3_sys>; 169 vcc2-supply = <&vcc3v3_sys>; 170 vcc3-supply = <&vcc3v3_sys>; 171 vcc4-supply = <&vcc3v3_sys>; 172 vcc5-supply = <&vcc3v3_sys>; 173 vcc6-supply = <&vcc3v3_sys>; 174 vcc7-supply = <&vcc3v3_sys>; 175 vcc8-supply = <&vcc3v3_sys>; 176 vcc9-supply = <&vcc3v3_sys>; 177 wakeup-source; 178 179 regulators { 180 vdd_logic: DCDC_REG1 { 181 regulator-name = "vdd_logic"; 182 regulator-always-on; 183 regulator-boot-on; 184 regulator-init-microvolt = <900000>; 185 regulator-initial-mode = <0x2>; 186 regulator-min-microvolt = <500000>; 187 regulator-max-microvolt = <1350000>; 188 regulator-ramp-delay = <6001>; 189 190 regulator-state-mem { 191 regulator-off-in-suspend; 192 }; 193 }; 194 195 vdd_gpu: DCDC_REG2 { 196 regulator-name = "vdd_gpu"; 197 regulator-always-on; 198 regulator-init-microvolt = <900000>; 199 regulator-initial-mode = <0x2>; 200 regulator-min-microvolt = <500000>; 201 regulator-max-microvolt = <1350000>; 202 regulator-ramp-delay = <6001>; 203 204 regulator-state-mem { 205 regulator-off-in-suspend; 206 }; 207 }; 208 209 vcc_ddr: DCDC_REG3 { 210 regulator-name = "vcc_ddr"; 211 regulator-always-on; 212 regulator-boot-on; 213 regulator-initial-mode = <0x2>; 214 215 regulator-state-mem { 216 regulator-on-in-suspend; 217 }; 218 }; 219 220 vdd_npu: DCDC_REG4 { 221 regulator-name = "vdd_npu"; 222 regulator-init-microvolt = <900000>; 223 regulator-initial-mode = <0x2>; 224 regulator-min-microvolt = <500000>; 225 regulator-max-microvolt = <1350000>; 226 regulator-ramp-delay = <6001>; 227 228 regulator-state-mem { 229 regulator-off-in-suspend; 230 }; 231 }; 232 233 vcc_1v8: DCDC_REG5 { 234 regulator-name = "vcc_1v8"; 235 regulator-always-on; 236 regulator-boot-on; 237 regulator-min-microvolt = <1800000>; 238 regulator-max-microvolt = <1800000>; 239 240 regulator-state-mem { 241 regulator-off-in-suspend; 242 }; 243 }; 244 245 vdda0v9_image: LDO_REG1 { 246 regulator-name = "vdda0v9_image"; 247 regulator-always-on; 248 regulator-min-microvolt = <900000>; 249 regulator-max-microvolt = <900000>; 250 251 regulator-state-mem { 252 regulator-off-in-suspend; 253 }; 254 }; 255 256 vdda_0v9: LDO_REG2 { 257 regulator-name = "vdda_0v9"; 258 regulator-always-on; 259 regulator-boot-on; 260 regulator-min-microvolt = <900000>; 261 regulator-max-microvolt = <900000>; 262 263 regulator-state-mem { 264 regulator-off-in-suspend; 265 }; 266 }; 267 268 vdda0v9_pmu: LDO_REG3 { 269 regulator-name = "vdda0v9_pmu"; 270 regulator-always-on; 271 regulator-boot-on; 272 regulator-min-microvolt = <900000>; 273 regulator-max-microvolt = <900000>; 274 275 regulator-state-mem { 276 regulator-on-in-suspend; 277 regulator-suspend-microvolt = <900000>; 278 }; 279 }; 280 281 vccio_acodec: LDO_REG4 { 282 regulator-name = "vccio_acodec"; 283 regulator-always-on; 284 regulator-boot-on; 285 regulator-min-microvolt = <3300000>; 286 regulator-max-microvolt = <3300000>; 287 288 regulator-state-mem { 289 regulator-off-in-suspend; 290 }; 291 }; 292 293 vccio_sd: LDO_REG5 { 294 regulator-name = "vccio_sd"; 295 regulator-min-microvolt = <1800000>; 296 regulator-max-microvolt = <3300000>; 297 298 regulator-state-mem { 299 regulator-off-in-suspend; 300 }; 301 }; 302 303 vcc3v3_pmu: LDO_REG6 { 304 regulator-name = "vcc3v3_pmu"; 305 regulator-always-on; 306 regulator-boot-on; 307 regulator-min-microvolt = <3300000>; 308 regulator-max-microvolt = <3300000>; 309 310 regulator-state-mem { 311 regulator-on-in-suspend; 312 regulator-suspend-microvolt = <3300000>; 313 }; 314 }; 315 316 vcca_1v8: LDO_REG7 { 317 regulator-name = "vcca_1v8"; 318 regulator-always-on; 319 regulator-boot-on; 320 regulator-min-microvolt = <1800000>; 321 regulator-max-microvolt = <1800000>; 322 323 regulator-state-mem { 324 regulator-off-in-suspend; 325 }; 326 }; 327 328 vcca1v8_pmu: LDO_REG8 { 329 regulator-name = "vcca1v8_pmu"; 330 regulator-always-on; 331 regulator-boot-on; 332 regulator-min-microvolt = <1800000>; 333 regulator-max-microvolt = <1800000>; 334 335 regulator-state-mem { 336 regulator-on-in-suspend; 337 regulator-suspend-microvolt = <1800000>; 338 }; 339 }; 340 341 vcca1v8_image: LDO_REG9 { 342 regulator-name = "vcca1v8_image"; 343 regulator-always-on; 344 regulator-min-microvolt = <1800000>; 345 regulator-max-microvolt = <1800000>; 346 347 regulator-state-mem { 348 regulator-off-in-suspend; 349 }; 350 }; 351 352 vcc_3v3: SWITCH_REG1 { 353 regulator-name = "vcc_3v3"; 354 regulator-always-on; 355 regulator-boot-on; 356 357 regulator-state-mem { 358 regulator-off-in-suspend; 359 }; 360 }; 361 362 vcc3v3_sd: SWITCH_REG2 { 363 regulator-name = "vcc3v3_sd"; 364 365 regulator-state-mem { 366 regulator-off-in-suspend; 367 }; 368 }; 369 }; 370 }; 371}; 372 373&i2s1_8ch { 374 rockchip,trcm-sync-tx-only; 375 status = "okay"; 376}; 377 378&mdio0 { 379 rgmii_phy0: ethernet-phy@0 { 380 compatible = "ethernet-phy-ieee802.3-c22"; 381 reg = <0x0>; 382 reset-assert-us = <20000>; 383 reset-deassert-us = <100000>; 384 reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 385 }; 386}; 387 388&pinctrl { 389 fspi { 390 fspi_dual_io_pins: fspi-dual-io-pins { 391 rockchip,pins = 392 /* fspi_clk */ 393 <1 RK_PD0 1 &pcfg_pull_none>, 394 /* fspi_cs0n */ 395 <1 RK_PD3 1 &pcfg_pull_none>, 396 /* fspi_d0 */ 397 <1 RK_PD1 1 &pcfg_pull_none>, 398 /* fspi_d1 */ 399 <1 RK_PD2 1 &pcfg_pull_none>; 400 }; 401 }; 402 403 leds { 404 led_power_pin: led-power-pin { 405 rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 406 }; 407 led_work_pin: led-work-pin { 408 rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 409 }; 410 }; 411 412 pmic { 413 pmic_int_l: pmic-int-l { 414 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 415 }; 416 }; 417 418 rk809 { 419 hp_det_pin: hp-det-pin { 420 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 421 }; 422 }; 423}; 424 425&pmu_io_domains { 426 pmuio1-supply = <&vcc3v3_pmu>; 427 pmuio2-supply = <&vcc3v3_pmu>; 428 vccio1-supply = <&vccio_acodec>; 429 vccio2-supply = <&vcc_1v8>; 430 vccio3-supply = <&vccio_sd>; 431 vccio4-supply = <&vcc_1v8>; 432 vccio5-supply = <&vcc_3v3>; 433 vccio6-supply = <&vcc_3v3>; 434 vccio7-supply = <&vcc_3v3>; 435 status = "okay"; 436}; 437 438&saradc { 439 vref-supply = <&vcca_1v8>; 440 status = "okay"; 441}; 442 443&sdhci { 444 bus-width = <8>; 445 max-frequency = <200000000>; 446 non-removable; 447 pinctrl-names = "default"; 448 pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe &emmc_rstnout>; 449 vmmc-supply = <&vcc_3v3>; 450 vqmmc-supply = <&vcc_1v8>; 451 status = "okay"; 452}; 453 454&sdmmc0 { 455 bus-width = <4>; 456 cap-sd-highspeed; 457 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 458 disable-wp; 459 pinctrl-names = "default"; 460 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 461 sd-uhs-sdr50; 462 vmmc-supply = <&vcc3v3_sd>; 463 vqmmc-supply = <&vccio_sd>; 464 status = "okay"; 465}; 466 467&sfc { 468 /* Dual I/O mode as the D2 pin conflicts with the eMMC */ 469 pinctrl-0 = <&fspi_dual_io_pins>; 470 pinctrl-names = "default"; 471 #address-cells = <1>; 472 #size-cells = <0>; 473 status = "okay"; 474 475 flash@0 { 476 compatible = "jedec,spi-nor"; 477 reg = <0>; 478 spi-max-frequency = <100000000>; 479 spi-rx-bus-width = <2>; 480 spi-tx-bus-width = <1>; 481 482 partitions { 483 compatible = "fixed-partitions"; 484 #address-cells = <1>; 485 #size-cells = <1>; 486 487 partition@0 { 488 label = "SPL"; 489 reg = <0x0 0xe0000>; 490 }; 491 partition@e0000 { 492 label = "U-Boot Env"; 493 reg = <0xe0000 0x20000>; 494 }; 495 partition@100000 { 496 label = "U-Boot"; 497 reg = <0x100000 0x200000>; 498 }; 499 partition@300000 { 500 label = "splash"; 501 reg = <0x300000 0x100000>; 502 }; 503 partition@400000 { 504 label = "Filesystem"; 505 reg = <0x400000 0xc00000>; 506 }; 507 }; 508 }; 509}; 510 511&tsadc { 512 rockchip,hw-tshut-mode = <1>; 513 rockchip,hw-tshut-polarity = <0>; 514 status = "okay"; 515}; 516 517&uart2 { 518 status = "okay"; 519}; 520