1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 3/* 4 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 5 * Copyright (c) 2022 EmbedFire <embedfire@embedfire.com> 6 */ 7 8/dts-v1/; 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/leds/common.h> 11#include <dt-bindings/pinctrl/rockchip.h> 12#include <dt-bindings/soc/rockchip,vop2.h> 13#include "rk3568.dtsi" 14 15/ { 16 model = "EmbedFire LubanCat 2"; 17 compatible = "embedfire,lubancat-2", "rockchip,rk3568"; 18 19 aliases { 20 ethernet0 = &gmac0; 21 ethernet1 = &gmac1; 22 mmc0 = &sdmmc0; 23 mmc1 = &sdhci; 24 }; 25 26 chosen: chosen { 27 stdout-path = "serial2:1500000n8"; 28 }; 29 30 leds { 31 compatible = "gpio-leds"; 32 33 user_led: user-led { 34 label = "user_led"; 35 linux,default-trigger = "heartbeat"; 36 default-state = "on"; 37 gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>; 38 pinctrl-names = "default"; 39 pinctrl-0 = <&user_led_pin>; 40 }; 41 }; 42 43 hdmi-con { 44 compatible = "hdmi-connector"; 45 type = "a"; 46 47 port { 48 hdmi_con_in: endpoint { 49 remote-endpoint = <&hdmi_out_con>; 50 }; 51 }; 52 }; 53 54 dc_5v: dc-5v-regulator { 55 compatible = "regulator-fixed"; 56 regulator-name = "dc_5v"; 57 regulator-always-on; 58 regulator-boot-on; 59 regulator-min-microvolt = <5000000>; 60 regulator-max-microvolt = <5000000>; 61 }; 62 63 vcc3v3_sys: vcc3v3-sys-regulator { 64 compatible = "regulator-fixed"; 65 regulator-name = "vcc3v3_sys"; 66 regulator-always-on; 67 regulator-boot-on; 68 regulator-min-microvolt = <3300000>; 69 regulator-max-microvolt = <3300000>; 70 vin-supply = <&vcc5v0_sys>; 71 }; 72 73 vcc5v0_sys: vcc5v0-sys-regulator { 74 compatible = "regulator-fixed"; 75 regulator-name = "vcc5v0_sys"; 76 regulator-always-on; 77 regulator-boot-on; 78 regulator-min-microvolt = <5000000>; 79 regulator-max-microvolt = <5000000>; 80 vin-supply = <&dc_5v>; 81 }; 82 83 vcc3v3_m2_pcie: vcc3v3-m2-pcie-regulator { 84 compatible = "regulator-fixed"; 85 regulator-name = "m2_pcie_3v3"; 86 enable-active-high; 87 regulator-min-microvolt = <3300000>; 88 regulator-max-microvolt = <3300000>; 89 gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; 90 pinctrl-0 = <&vcc3v3_m2_pcie_en>; 91 pinctrl-names = "default"; 92 startup-delay-us = <200000>; 93 vin-supply = <&vcc5v0_sys>; 94 }; 95 96 vcc3v3_mini_pcie: vcc3v3-mini-pcie-regulator { 97 compatible = "regulator-fixed"; 98 regulator-name = "minipcie_3v3"; 99 enable-active-high; 100 regulator-min-microvolt = <3300000>; 101 regulator-max-microvolt = <3300000>; 102 gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>; 103 pinctrl-0 = <&vcc3v3_mini_pcie_en>; 104 pinctrl-names = "default"; 105 startup-delay-us = <5000>; 106 vin-supply = <&vcc5v0_sys>; 107 }; 108 109 vcc5v0_usb20_host: vcc5v0-usb20-host-regulator { 110 compatible = "regulator-fixed"; 111 regulator-name = "vcc5v0_usb20_host"; 112 enable-active-high; 113 gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; 114 pinctrl-0 = <&vcc5v0_usb20_host_en>; 115 pinctrl-names = "default"; 116 }; 117 118 vcc5v0_usb30_host: vcc5v0-usb30-host-regulator { 119 compatible = "regulator-fixed"; 120 regulator-name = "vcc5v0_usb30_host"; 121 enable-active-high; 122 gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; 123 pinctrl-0 = <&vcc5v0_usb30_host_en>; 124 pinctrl-names = "default"; 125 }; 126 127 vcc5v0_otg_vbus: vcc5v0-otg-vbus-regulator { 128 compatible = "regulator-fixed"; 129 regulator-name = "vcc5v0_otg_vbus"; 130 enable-active-high; 131 regulator-min-microvolt = <5000000>; 132 regulator-max-microvolt = <5000000>; 133 gpio = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>; 134 pinctrl-0 = <&vcc5v0_otg_vbus_en>; 135 pinctrl-names = "default"; 136 }; 137}; 138 139&combphy0 { 140 status = "okay"; 141}; 142 143&combphy1 { 144 status = "okay"; 145}; 146 147&combphy2 { 148 status = "okay"; 149}; 150 151&cpu0 { 152 cpu-supply = <&vdd_cpu>; 153}; 154 155&cpu1 { 156 cpu-supply = <&vdd_cpu>; 157}; 158 159&cpu2 { 160 cpu-supply = <&vdd_cpu>; 161}; 162 163&cpu3 { 164 cpu-supply = <&vdd_cpu>; 165}; 166 167&gpu { 168 mali-supply = <&vdd_gpu>; 169 status = "okay"; 170}; 171 172&hdmi { 173 avdd-0v9-supply = <&vdda0v9_image>; 174 avdd-1v8-supply = <&vcca1v8_image>; 175 status = "okay"; 176}; 177 178&hdmi_in { 179 hdmi_in_vp0: endpoint { 180 remote-endpoint = <&vp0_out_hdmi>; 181 }; 182}; 183 184&hdmi_out { 185 hdmi_out_con: endpoint { 186 remote-endpoint = <&hdmi_con_in>; 187 }; 188}; 189 190&hdmi_sound { 191 status = "okay"; 192}; 193 194&i2c0 { 195 status = "okay"; 196 197 vdd_cpu: regulator@1c { 198 compatible = "tcs,tcs4525"; 199 reg = <0x1c>; 200 fcs,suspend-voltage-selector = <1>; 201 regulator-name = "vdd_cpu"; 202 regulator-always-on; 203 regulator-boot-on; 204 regulator-min-microvolt = <800000>; 205 regulator-max-microvolt = <1150000>; 206 regulator-ramp-delay = <2300>; 207 vin-supply = <&vcc5v0_sys>; 208 209 regulator-state-mem { 210 regulator-off-in-suspend; 211 }; 212 }; 213 214 rk809: pmic@20 { 215 compatible = "rockchip,rk809"; 216 reg = <0x20>; 217 interrupt-parent = <&gpio0>; 218 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; 219 assigned-clocks = <&cru I2S1_MCLKOUT_TX>; 220 assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; 221 #clock-cells = <1>; 222 clock-names = "mclk"; 223 clocks = <&cru I2S1_MCLKOUT_TX>; 224 pinctrl-names = "default"; 225 pinctrl-0 = <&pmic_int>; 226 rockchip,system-power-controller; 227 #sound-dai-cells = <0>; 228 vcc1-supply = <&vcc3v3_sys>; 229 vcc2-supply = <&vcc3v3_sys>; 230 vcc3-supply = <&vcc3v3_sys>; 231 vcc4-supply = <&vcc3v3_sys>; 232 vcc5-supply = <&vcc3v3_sys>; 233 vcc6-supply = <&vcc3v3_sys>; 234 vcc7-supply = <&vcc3v3_sys>; 235 vcc8-supply = <&vcc3v3_sys>; 236 vcc9-supply = <&vcc3v3_sys>; 237 wakeup-source; 238 239 regulators { 240 vdd_logic: DCDC_REG1 { 241 regulator-name = "vdd_logic"; 242 regulator-always-on; 243 regulator-boot-on; 244 regulator-min-microvolt = <500000>; 245 regulator-max-microvolt = <1350000>; 246 regulator-init-microvolt = <900000>; 247 regulator-ramp-delay = <6001>; 248 regulator-initial-mode = <0x2>; 249 250 regulator-state-mem { 251 regulator-off-in-suspend; 252 }; 253 }; 254 255 vdd_gpu: DCDC_REG2 { 256 regulator-name = "vdd_gpu"; 257 regulator-always-on; 258 regulator-boot-on; 259 regulator-min-microvolt = <500000>; 260 regulator-max-microvolt = <1350000>; 261 regulator-init-microvolt = <900000>; 262 regulator-ramp-delay = <6001>; 263 regulator-initial-mode = <0x2>; 264 265 regulator-state-mem { 266 regulator-off-in-suspend; 267 }; 268 }; 269 270 vcc_ddr: DCDC_REG3 { 271 regulator-name = "vcc_ddr"; 272 regulator-always-on; 273 regulator-boot-on; 274 regulator-initial-mode = <0x2>; 275 276 regulator-state-mem { 277 regulator-on-in-suspend; 278 }; 279 }; 280 281 vdd_npu: DCDC_REG4 { 282 regulator-name = "vdd_npu"; 283 regulator-always-on; 284 regulator-boot-on; 285 regulator-min-microvolt = <500000>; 286 regulator-max-microvolt = <1350000>; 287 regulator-init-microvolt = <900000>; 288 regulator-ramp-delay = <6001>; 289 regulator-initial-mode = <0x2>; 290 291 regulator-state-mem { 292 regulator-off-in-suspend; 293 }; 294 }; 295 296 vcc_1v8: DCDC_REG5 { 297 regulator-name = "vcc_1v8"; 298 regulator-always-on; 299 regulator-boot-on; 300 regulator-min-microvolt = <1800000>; 301 regulator-max-microvolt = <1800000>; 302 303 regulator-state-mem { 304 regulator-off-in-suspend; 305 }; 306 }; 307 308 vdda0v9_image: LDO_REG1 { 309 regulator-name = "vdda0v9_image"; 310 regulator-boot-on; 311 regulator-always-on; 312 regulator-min-microvolt = <900000>; 313 regulator-max-microvolt = <900000>; 314 315 regulator-state-mem { 316 regulator-off-in-suspend; 317 }; 318 }; 319 320 vdda_0v9: LDO_REG2 { 321 regulator-name = "vdda_0v9"; 322 regulator-always-on; 323 regulator-boot-on; 324 regulator-min-microvolt = <900000>; 325 regulator-max-microvolt = <900000>; 326 327 regulator-state-mem { 328 regulator-off-in-suspend; 329 }; 330 }; 331 332 vdda0v9_pmu: LDO_REG3 { 333 regulator-name = "vdda0v9_pmu"; 334 regulator-always-on; 335 regulator-boot-on; 336 regulator-min-microvolt = <900000>; 337 regulator-max-microvolt = <900000>; 338 339 regulator-state-mem { 340 regulator-on-in-suspend; 341 regulator-suspend-microvolt = <900000>; 342 }; 343 }; 344 345 vccio_acodec: LDO_REG4 { 346 regulator-name = "vccio_acodec"; 347 regulator-always-on; 348 regulator-boot-on; 349 regulator-min-microvolt = <3300000>; 350 regulator-max-microvolt = <3300000>; 351 352 regulator-state-mem { 353 regulator-off-in-suspend; 354 }; 355 }; 356 357 vccio_sd: LDO_REG5 { 358 regulator-name = "vccio_sd"; 359 regulator-always-on; 360 regulator-boot-on; 361 regulator-min-microvolt = <1800000>; 362 regulator-max-microvolt = <3300000>; 363 364 regulator-state-mem { 365 regulator-off-in-suspend; 366 }; 367 }; 368 369 vcc3v3_pmu: LDO_REG6 { 370 regulator-name = "vcc3v3_pmu"; 371 regulator-always-on; 372 regulator-boot-on; 373 regulator-min-microvolt = <3300000>; 374 regulator-max-microvolt = <3300000>; 375 376 regulator-state-mem { 377 regulator-on-in-suspend; 378 regulator-suspend-microvolt = <3300000>; 379 }; 380 }; 381 382 vcca_1v8: LDO_REG7 { 383 regulator-name = "vcca_1v8"; 384 regulator-always-on; 385 regulator-boot-on; 386 regulator-min-microvolt = <1800000>; 387 regulator-max-microvolt = <1800000>; 388 389 regulator-state-mem { 390 regulator-off-in-suspend; 391 }; 392 }; 393 394 vcca1v8_pmu: LDO_REG8 { 395 regulator-name = "vcca1v8_pmu"; 396 regulator-always-on; 397 regulator-boot-on; 398 regulator-min-microvolt = <1800000>; 399 regulator-max-microvolt = <1800000>; 400 401 regulator-state-mem { 402 regulator-on-in-suspend; 403 regulator-suspend-microvolt = <1800000>; 404 }; 405 }; 406 407 vcca1v8_image: LDO_REG9 { 408 regulator-name = "vcca1v8_image"; 409 regulator-always-on; 410 regulator-boot-on; 411 regulator-min-microvolt = <1800000>; 412 regulator-max-microvolt = <1800000>; 413 414 regulator-state-mem { 415 regulator-off-in-suspend; 416 }; 417 }; 418 419 vcc_3v3: SWITCH_REG1 { 420 regulator-name = "vcc_3v3"; 421 regulator-always-on; 422 regulator-boot-on; 423 424 regulator-state-mem { 425 regulator-off-in-suspend; 426 }; 427 }; 428 429 vcc3v3_sd: SWITCH_REG2 { 430 regulator-name = "vcc3v3_sd"; 431 regulator-always-on; 432 regulator-boot-on; 433 434 regulator-state-mem { 435 regulator-off-in-suspend; 436 }; 437 }; 438 }; 439 }; 440}; 441 442&i2s1_8ch { 443 rockchip,trcm-sync-tx-only; 444 status = "okay"; 445}; 446 447&gmac0 { 448 phy-mode = "rgmii"; 449 clock_in_out = "output"; 450 451 snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; 452 snps,reset-active-low; 453 /* Reset time is 20ms, 100ms for rtl8211f */ 454 snps,reset-delays-us = <0 20000 100000>; 455 456 assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; 457 assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; 458 459 pinctrl-names = "default"; 460 pinctrl-0 = <&gmac0_miim 461 &gmac0_tx_bus2 462 &gmac0_rx_bus2 463 &gmac0_rgmii_clk 464 &gmac0_rgmii_bus>; 465 466 tx_delay = <0x22>; 467 rx_delay = <0x0e>; 468 469 phy-handle = <&rgmii_phy0>; 470 status = "okay"; 471}; 472 473&mdio0 { 474 rgmii_phy0: phy@0 { 475 compatible = "ethernet-phy-ieee802.3-c22"; 476 reg = <0x0>; 477 }; 478}; 479 480&gmac1 { 481 phy-mode = "rgmii"; 482 clock_in_out = "output"; 483 484 snps,reset-gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>; 485 snps,reset-active-low; 486 /* Reset time is 20ms, 100ms for rtl8211f */ 487 snps,reset-delays-us = <0 20000 100000>; 488 489 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; 490 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; 491 492 pinctrl-names = "default"; 493 pinctrl-0 = <&gmac1m1_miim 494 &gmac1m1_tx_bus2 495 &gmac1m1_rx_bus2 496 &gmac1m1_rgmii_clk 497 &gmac1m1_rgmii_bus>; 498 499 tx_delay = <0x21>; 500 rx_delay = <0x0e>; 501 502 phy-handle = <&rgmii_phy1>; 503 status = "okay"; 504}; 505 506&mdio1 { 507 rgmii_phy1: phy@0 { 508 compatible = "ethernet-phy-ieee802.3-c22"; 509 reg = <0x0>; 510 }; 511}; 512 513&gic { 514 mbi-ranges = <94 31>, <229 31>, <289 31>; 515}; 516 517&pcie30phy { 518 status = "okay"; 519}; 520 521&pcie3x2 { 522 reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; 523 vpcie3v3-supply = <&vcc3v3_m2_pcie>; 524 status = "okay"; 525}; 526 527&pcie2x1 { 528 reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; 529 disable-gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>; 530 vpcie3v3-supply = <&vcc3v3_mini_pcie>; 531 status = "okay"; 532}; 533 534&pmu_io_domains { 535 pmuio2-supply = <&vcc3v3_pmu>; 536 vccio1-supply = <&vccio_acodec>; 537 vccio3-supply = <&vccio_sd>; 538 vccio4-supply = <&vcc_1v8>; 539 vccio5-supply = <&vcc_3v3>; 540 vccio6-supply = <&vcc_1v8>; 541 vccio7-supply = <&vcc_3v3>; 542 status = "okay"; 543}; 544 545&pwm8 { 546 status = "okay"; 547}; 548 549&pwm9 { 550 status = "disabled"; 551}; 552 553&pwm10 { 554 status = "disabled"; 555}; 556 557&pwm14 { 558 status = "disabled"; 559}; 560 561&spi3 { 562 pinctrl-0 = <&spi3m1_pins>; 563 status = "disabled"; 564}; 565 566&uart2 { 567 status = "okay"; 568}; 569 570&uart3 { 571 pinctrl-names = "default"; 572 pinctrl-0 = <&uart3m1_xfer>; 573 status = "disabled"; 574}; 575 576&saradc { 577 vref-supply = <&vcca_1v8>; 578 status = "okay"; 579}; 580 581&tsadc { 582 rockchip,hw-tshut-mode = <1>; 583 rockchip,hw-tshut-polarity = <0>; 584 status = "okay"; 585}; 586 587&sdhci { 588 assigned-clocks = <&cru BCLK_EMMC>, <&cru TCLK_EMMC>, <&cru CCLK_EMMC>; 589 assigned-clock-rates = <200000000>, <24000000>, <200000000>; 590 bus-width = <8>; 591 max-frequency = <200000000>; 592 mmc-hs200-1_8v; 593 non-removable; 594 pinctrl-names = "default"; 595 pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>; 596 supports-emmc; 597 status = "okay"; 598}; 599 600&sdmmc0 { 601 max-frequency = <150000000>; 602 no-sdio; 603 no-mmc; 604 bus-width = <4>; 605 cap-mmc-highspeed; 606 cap-sd-highspeed; 607 disable-wp; 608 sd-uhs-sdr104; 609 vmmc-supply = <&vcc3v3_sd>; 610 vqmmc-supply = <&vccio_sd>; 611 pinctrl-names = "default"; 612 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 613 status = "okay"; 614}; 615 616/* USB OTG/USB Host_1 USB 2.0 Comb */ 617&usb2phy0 { 618 status = "okay"; 619}; 620 621&usb2phy0_host { 622 phy-supply = <&vcc5v0_usb30_host>; 623 status = "okay"; 624}; 625 626&usb2phy0_otg { 627 phy-supply = <&vcc5v0_otg_vbus>; 628 status = "okay"; 629}; 630 631&usb_host0_ehci { 632 status = "okay"; 633}; 634 635&usb_host0_ohci { 636 status = "okay"; 637}; 638 639/* USB Host_2/USB Host_3 USB 2.0 Comb */ 640&usb2phy1 { 641 status = "okay"; 642}; 643 644&usb2phy1_host { 645 status = "okay"; 646}; 647 648&usb2phy1_otg { 649 phy-supply = <&vcc5v0_usb20_host>; 650 status = "okay"; 651}; 652 653&usb_host1_ehci { 654 status = "okay"; 655}; 656 657&usb_host1_ohci { 658 status = "okay"; 659}; 660 661/* MULTI_PHY0 For SATA0, USB3.0 OTG Only USB2.0 */ 662&usb_host0_xhci { 663 phys = <&usb2phy0_otg>; 664 phy-names = "usb2-phy"; 665 extcon = <&usb2phy0>; 666 maximum-speed = "high-speed"; 667 dr_mode = "host"; 668 status = "okay"; 669}; 670 671&sata0 { 672 status = "okay"; 673}; 674 675/* USB3.0 Host */ 676&usb_host1_xhci { 677 status = "okay"; 678}; 679 680&vop { 681 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; 682 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; 683 status = "okay"; 684}; 685 686&vop_mmu { 687 status = "okay"; 688}; 689 690&vp0 { 691 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 692 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 693 remote-endpoint = <&hdmi_in_vp0>; 694 }; 695}; 696 697&pinctrl { 698 leds { 699 user_led_pin: user-status-led-pin { 700 rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; 701 }; 702 }; 703 704 usb { 705 vcc5v0_usb20_host_en: vcc5v0-usb20-host-en { 706 rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; 707 }; 708 709 vcc5v0_usb30_host_en: vcc5v0-usb30-host-en { 710 rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; 711 }; 712 713 vcc5v0_otg_vbus_en: vcc5v0-otg-vbus-en { 714 rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 715 }; 716 }; 717 718 pcie { 719 vcc3v3_m2_pcie_en: vcc3v3-m2-pcie-en { 720 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; 721 }; 722 723 vcc3v3_mini_pcie_en: vcc3v3-mini-pcie-en { 724 rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; 725 }; 726 }; 727 728 pmic { 729 pmic_int: pmic-int { 730 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 731 }; 732 }; 733}; 734