101610a24SLiang Chen// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
201610a24SLiang Chen/*
301610a24SLiang Chen * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
401610a24SLiang Chen *
501610a24SLiang Chen */
601610a24SLiang Chen
701610a24SLiang Chen/dts-v1/;
801610a24SLiang Chen#include <dt-bindings/gpio/gpio.h>
901610a24SLiang Chen#include <dt-bindings/pinctrl/rockchip.h>
1001610a24SLiang Chen#include "rk3568.dtsi"
1101610a24SLiang Chen
1201610a24SLiang Chen/ {
1301610a24SLiang Chen	model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
1401610a24SLiang Chen	compatible = "rockchip,rk3568-evb1-v10", "rockchip,rk3568";
1501610a24SLiang Chen
16fc57d783SMichael Riesch	aliases {
17fc57d783SMichael Riesch		ethernet0 = &gmac0;
18fc57d783SMichael Riesch		ethernet1 = &gmac1;
19fc57d783SMichael Riesch	};
20fc57d783SMichael Riesch
2101610a24SLiang Chen	chosen: chosen {
2201610a24SLiang Chen		stdout-path = "serial2:1500000n8";
2301610a24SLiang Chen	};
2401610a24SLiang Chen
2501610a24SLiang Chen	dc_12v: dc-12v {
2601610a24SLiang Chen		compatible = "regulator-fixed";
2701610a24SLiang Chen		regulator-name = "dc_12v";
2801610a24SLiang Chen		regulator-always-on;
2901610a24SLiang Chen		regulator-boot-on;
3001610a24SLiang Chen		regulator-min-microvolt = <12000000>;
3101610a24SLiang Chen		regulator-max-microvolt = <12000000>;
3201610a24SLiang Chen	};
3301610a24SLiang Chen
3401610a24SLiang Chen	vcc3v3_sys: vcc3v3-sys {
3501610a24SLiang Chen		compatible = "regulator-fixed";
3601610a24SLiang Chen		regulator-name = "vcc3v3_sys";
3701610a24SLiang Chen		regulator-always-on;
3801610a24SLiang Chen		regulator-boot-on;
3901610a24SLiang Chen		regulator-min-microvolt = <3300000>;
4001610a24SLiang Chen		regulator-max-microvolt = <3300000>;
4101610a24SLiang Chen		vin-supply = <&dc_12v>;
4201610a24SLiang Chen	};
4301610a24SLiang Chen
4401610a24SLiang Chen	vcc5v0_sys: vcc5v0-sys {
4501610a24SLiang Chen		compatible = "regulator-fixed";
4601610a24SLiang Chen		regulator-name = "vcc5v0_sys";
4701610a24SLiang Chen		regulator-always-on;
4801610a24SLiang Chen		regulator-boot-on;
4901610a24SLiang Chen		regulator-min-microvolt = <5000000>;
5001610a24SLiang Chen		regulator-max-microvolt = <5000000>;
5101610a24SLiang Chen		vin-supply = <&dc_12v>;
5201610a24SLiang Chen	};
5301610a24SLiang Chen
5401610a24SLiang Chen	vcc3v3_lcd0_n: vcc3v3-lcd0-n {
5501610a24SLiang Chen		compatible = "regulator-fixed";
5601610a24SLiang Chen		regulator-name = "vcc3v3_lcd0_n";
5701610a24SLiang Chen		regulator-boot-on;
5801610a24SLiang Chen
5901610a24SLiang Chen		regulator-state-mem {
6001610a24SLiang Chen			regulator-off-in-suspend;
6101610a24SLiang Chen		};
6201610a24SLiang Chen	};
6301610a24SLiang Chen
6401610a24SLiang Chen	vcc3v3_lcd1_n: vcc3v3-lcd1-n {
6501610a24SLiang Chen		compatible = "regulator-fixed";
6601610a24SLiang Chen		regulator-name = "vcc3v3_lcd1_n";
6701610a24SLiang Chen		regulator-boot-on;
6801610a24SLiang Chen
6901610a24SLiang Chen		regulator-state-mem {
7001610a24SLiang Chen			regulator-off-in-suspend;
7101610a24SLiang Chen		};
7201610a24SLiang Chen	};
7301610a24SLiang Chen};
7401610a24SLiang Chen
75fc57d783SMichael Riesch&gmac0 {
76fc57d783SMichael Riesch	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
77fc57d783SMichael Riesch	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
78fc57d783SMichael Riesch	assigned-clock-rates = <0>, <125000000>;
79fc57d783SMichael Riesch	clock_in_out = "output";
80fc57d783SMichael Riesch	phy-handle = <&rgmii_phy0>;
81fc57d783SMichael Riesch	phy-mode = "rgmii-id";
82fc57d783SMichael Riesch	pinctrl-names = "default";
83fc57d783SMichael Riesch	pinctrl-0 = <&gmac0_miim
84fc57d783SMichael Riesch		     &gmac0_tx_bus2
85fc57d783SMichael Riesch		     &gmac0_rx_bus2
86fc57d783SMichael Riesch		     &gmac0_rgmii_clk
87fc57d783SMichael Riesch		     &gmac0_rgmii_bus>;
88fc57d783SMichael Riesch	status = "okay";
89fc57d783SMichael Riesch};
90fc57d783SMichael Riesch
91fc57d783SMichael Riesch&gmac1 {
92fc57d783SMichael Riesch	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
93fc57d783SMichael Riesch	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>;
94fc57d783SMichael Riesch	assigned-clock-rates = <0>, <125000000>;
95fc57d783SMichael Riesch	clock_in_out = "output";
96fc57d783SMichael Riesch	phy-handle = <&rgmii_phy1>;
97fc57d783SMichael Riesch	phy-mode = "rgmii-id";
98fc57d783SMichael Riesch	pinctrl-names = "default";
99fc57d783SMichael Riesch	pinctrl-0 = <&gmac1m1_miim
100fc57d783SMichael Riesch		     &gmac1m1_tx_bus2
101fc57d783SMichael Riesch		     &gmac1m1_rx_bus2
102fc57d783SMichael Riesch		     &gmac1m1_rgmii_clk
103fc57d783SMichael Riesch		     &gmac1m1_rgmii_bus>;
104fc57d783SMichael Riesch	status = "okay";
105fc57d783SMichael Riesch};
106fc57d783SMichael Riesch
107*14f1c34eSMichael Riesch&i2c0 {
108*14f1c34eSMichael Riesch	status = "okay";
109*14f1c34eSMichael Riesch
110*14f1c34eSMichael Riesch	rk809: pmic@20 {
111*14f1c34eSMichael Riesch		compatible = "rockchip,rk809";
112*14f1c34eSMichael Riesch		reg = <0x20>;
113*14f1c34eSMichael Riesch		interrupt-parent = <&gpio0>;
114*14f1c34eSMichael Riesch		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
115*14f1c34eSMichael Riesch		#clock-cells = <1>;
116*14f1c34eSMichael Riesch		pinctrl-names = "default";
117*14f1c34eSMichael Riesch		pinctrl-0 = <&pmic_int>;
118*14f1c34eSMichael Riesch		rockchip,system-power-controller;
119*14f1c34eSMichael Riesch		vcc1-supply = <&vcc3v3_sys>;
120*14f1c34eSMichael Riesch		vcc2-supply = <&vcc3v3_sys>;
121*14f1c34eSMichael Riesch		vcc3-supply = <&vcc3v3_sys>;
122*14f1c34eSMichael Riesch		vcc4-supply = <&vcc3v3_sys>;
123*14f1c34eSMichael Riesch		vcc5-supply = <&vcc3v3_sys>;
124*14f1c34eSMichael Riesch		vcc6-supply = <&vcc3v3_sys>;
125*14f1c34eSMichael Riesch		vcc7-supply = <&vcc3v3_sys>;
126*14f1c34eSMichael Riesch		vcc8-supply = <&vcc3v3_sys>;
127*14f1c34eSMichael Riesch		vcc9-supply = <&vcc3v3_sys>;
128*14f1c34eSMichael Riesch		wakeup-source;
129*14f1c34eSMichael Riesch
130*14f1c34eSMichael Riesch		regulators {
131*14f1c34eSMichael Riesch			vdd_logic: DCDC_REG1 {
132*14f1c34eSMichael Riesch				regulator-name = "vdd_logic";
133*14f1c34eSMichael Riesch				regulator-always-on;
134*14f1c34eSMichael Riesch				regulator-boot-on;
135*14f1c34eSMichael Riesch				regulator-init-microvolt = <900000>;
136*14f1c34eSMichael Riesch				regulator-initial-mode = <0x2>;
137*14f1c34eSMichael Riesch				regulator-min-microvolt = <500000>;
138*14f1c34eSMichael Riesch				regulator-max-microvolt = <1350000>;
139*14f1c34eSMichael Riesch				regulator-ramp-delay = <6001>;
140*14f1c34eSMichael Riesch
141*14f1c34eSMichael Riesch				regulator-state-mem {
142*14f1c34eSMichael Riesch					regulator-off-in-suspend;
143*14f1c34eSMichael Riesch				};
144*14f1c34eSMichael Riesch			};
145*14f1c34eSMichael Riesch
146*14f1c34eSMichael Riesch			vdd_gpu: DCDC_REG2 {
147*14f1c34eSMichael Riesch				regulator-name = "vdd_gpu";
148*14f1c34eSMichael Riesch				regulator-init-microvolt = <900000>;
149*14f1c34eSMichael Riesch				regulator-initial-mode = <0x2>;
150*14f1c34eSMichael Riesch				regulator-min-microvolt = <500000>;
151*14f1c34eSMichael Riesch				regulator-max-microvolt = <1350000>;
152*14f1c34eSMichael Riesch				regulator-ramp-delay = <6001>;
153*14f1c34eSMichael Riesch
154*14f1c34eSMichael Riesch				regulator-state-mem {
155*14f1c34eSMichael Riesch					regulator-off-in-suspend;
156*14f1c34eSMichael Riesch				};
157*14f1c34eSMichael Riesch			};
158*14f1c34eSMichael Riesch
159*14f1c34eSMichael Riesch			vcc_ddr: DCDC_REG3 {
160*14f1c34eSMichael Riesch				regulator-name = "vcc_ddr";
161*14f1c34eSMichael Riesch				regulator-always-on;
162*14f1c34eSMichael Riesch				regulator-boot-on;
163*14f1c34eSMichael Riesch				regulator-initial-mode = <0x2>;
164*14f1c34eSMichael Riesch
165*14f1c34eSMichael Riesch				regulator-state-mem {
166*14f1c34eSMichael Riesch					regulator-on-in-suspend;
167*14f1c34eSMichael Riesch				};
168*14f1c34eSMichael Riesch			};
169*14f1c34eSMichael Riesch
170*14f1c34eSMichael Riesch			vdd_npu: DCDC_REG4 {
171*14f1c34eSMichael Riesch				regulator-name = "vdd_npu";
172*14f1c34eSMichael Riesch				regulator-init-microvolt = <900000>;
173*14f1c34eSMichael Riesch				regulator-initial-mode = <0x2>;
174*14f1c34eSMichael Riesch				regulator-min-microvolt = <500000>;
175*14f1c34eSMichael Riesch				regulator-max-microvolt = <1350000>;
176*14f1c34eSMichael Riesch				regulator-ramp-delay = <6001>;
177*14f1c34eSMichael Riesch
178*14f1c34eSMichael Riesch				regulator-state-mem {
179*14f1c34eSMichael Riesch					regulator-off-in-suspend;
180*14f1c34eSMichael Riesch				};
181*14f1c34eSMichael Riesch			};
182*14f1c34eSMichael Riesch
183*14f1c34eSMichael Riesch			vcc_1v8: DCDC_REG5 {
184*14f1c34eSMichael Riesch				regulator-name = "vcc_1v8";
185*14f1c34eSMichael Riesch				regulator-always-on;
186*14f1c34eSMichael Riesch				regulator-boot-on;
187*14f1c34eSMichael Riesch				regulator-min-microvolt = <1800000>;
188*14f1c34eSMichael Riesch				regulator-max-microvolt = <1800000>;
189*14f1c34eSMichael Riesch
190*14f1c34eSMichael Riesch				regulator-state-mem {
191*14f1c34eSMichael Riesch					regulator-off-in-suspend;
192*14f1c34eSMichael Riesch				};
193*14f1c34eSMichael Riesch			};
194*14f1c34eSMichael Riesch
195*14f1c34eSMichael Riesch			vdda0v9_image: LDO_REG1 {
196*14f1c34eSMichael Riesch				regulator-name = "vdda0v9_image";
197*14f1c34eSMichael Riesch				regulator-min-microvolt = <900000>;
198*14f1c34eSMichael Riesch				regulator-max-microvolt = <900000>;
199*14f1c34eSMichael Riesch
200*14f1c34eSMichael Riesch				regulator-state-mem {
201*14f1c34eSMichael Riesch					regulator-off-in-suspend;
202*14f1c34eSMichael Riesch				};
203*14f1c34eSMichael Riesch			};
204*14f1c34eSMichael Riesch
205*14f1c34eSMichael Riesch			vdda_0v9: LDO_REG2 {
206*14f1c34eSMichael Riesch				regulator-name = "vdda_0v9";
207*14f1c34eSMichael Riesch				regulator-always-on;
208*14f1c34eSMichael Riesch				regulator-boot-on;
209*14f1c34eSMichael Riesch				regulator-min-microvolt = <900000>;
210*14f1c34eSMichael Riesch				regulator-max-microvolt = <900000>;
211*14f1c34eSMichael Riesch
212*14f1c34eSMichael Riesch				regulator-state-mem {
213*14f1c34eSMichael Riesch					regulator-off-in-suspend;
214*14f1c34eSMichael Riesch				};
215*14f1c34eSMichael Riesch			};
216*14f1c34eSMichael Riesch
217*14f1c34eSMichael Riesch			vdda0v9_pmu: LDO_REG3 {
218*14f1c34eSMichael Riesch				regulator-name = "vdda0v9_pmu";
219*14f1c34eSMichael Riesch				regulator-always-on;
220*14f1c34eSMichael Riesch				regulator-boot-on;
221*14f1c34eSMichael Riesch				regulator-min-microvolt = <900000>;
222*14f1c34eSMichael Riesch				regulator-max-microvolt = <900000>;
223*14f1c34eSMichael Riesch
224*14f1c34eSMichael Riesch				regulator-state-mem {
225*14f1c34eSMichael Riesch					regulator-on-in-suspend;
226*14f1c34eSMichael Riesch					regulator-suspend-microvolt = <900000>;
227*14f1c34eSMichael Riesch				};
228*14f1c34eSMichael Riesch			};
229*14f1c34eSMichael Riesch
230*14f1c34eSMichael Riesch			vccio_acodec: LDO_REG4 {
231*14f1c34eSMichael Riesch				regulator-name = "vccio_acodec";
232*14f1c34eSMichael Riesch				regulator-min-microvolt = <3300000>;
233*14f1c34eSMichael Riesch				regulator-max-microvolt = <3300000>;
234*14f1c34eSMichael Riesch
235*14f1c34eSMichael Riesch				regulator-state-mem {
236*14f1c34eSMichael Riesch					regulator-off-in-suspend;
237*14f1c34eSMichael Riesch				};
238*14f1c34eSMichael Riesch			};
239*14f1c34eSMichael Riesch
240*14f1c34eSMichael Riesch			vccio_sd: LDO_REG5 {
241*14f1c34eSMichael Riesch				regulator-name = "vccio_sd";
242*14f1c34eSMichael Riesch				regulator-min-microvolt = <1800000>;
243*14f1c34eSMichael Riesch				regulator-max-microvolt = <3300000>;
244*14f1c34eSMichael Riesch
245*14f1c34eSMichael Riesch				regulator-state-mem {
246*14f1c34eSMichael Riesch					regulator-off-in-suspend;
247*14f1c34eSMichael Riesch				};
248*14f1c34eSMichael Riesch			};
249*14f1c34eSMichael Riesch
250*14f1c34eSMichael Riesch			vcc3v3_pmu: LDO_REG6 {
251*14f1c34eSMichael Riesch				regulator-name = "vcc3v3_pmu";
252*14f1c34eSMichael Riesch				regulator-always-on;
253*14f1c34eSMichael Riesch				regulator-boot-on;
254*14f1c34eSMichael Riesch				regulator-min-microvolt = <3300000>;
255*14f1c34eSMichael Riesch				regulator-max-microvolt = <3300000>;
256*14f1c34eSMichael Riesch
257*14f1c34eSMichael Riesch				regulator-state-mem {
258*14f1c34eSMichael Riesch					regulator-on-in-suspend;
259*14f1c34eSMichael Riesch					regulator-suspend-microvolt = <3300000>;
260*14f1c34eSMichael Riesch				};
261*14f1c34eSMichael Riesch			};
262*14f1c34eSMichael Riesch
263*14f1c34eSMichael Riesch			vcca_1v8: LDO_REG7 {
264*14f1c34eSMichael Riesch				regulator-name = "vcca_1v8";
265*14f1c34eSMichael Riesch				regulator-always-on;
266*14f1c34eSMichael Riesch				regulator-boot-on;
267*14f1c34eSMichael Riesch				regulator-min-microvolt = <1800000>;
268*14f1c34eSMichael Riesch				regulator-max-microvolt = <1800000>;
269*14f1c34eSMichael Riesch
270*14f1c34eSMichael Riesch				regulator-state-mem {
271*14f1c34eSMichael Riesch					regulator-off-in-suspend;
272*14f1c34eSMichael Riesch				};
273*14f1c34eSMichael Riesch			};
274*14f1c34eSMichael Riesch
275*14f1c34eSMichael Riesch			vcca1v8_pmu: LDO_REG8 {
276*14f1c34eSMichael Riesch				regulator-name = "vcca1v8_pmu";
277*14f1c34eSMichael Riesch				regulator-always-on;
278*14f1c34eSMichael Riesch				regulator-boot-on;
279*14f1c34eSMichael Riesch				regulator-min-microvolt = <1800000>;
280*14f1c34eSMichael Riesch				regulator-max-microvolt = <1800000>;
281*14f1c34eSMichael Riesch
282*14f1c34eSMichael Riesch				regulator-state-mem {
283*14f1c34eSMichael Riesch					regulator-on-in-suspend;
284*14f1c34eSMichael Riesch					regulator-suspend-microvolt = <1800000>;
285*14f1c34eSMichael Riesch				};
286*14f1c34eSMichael Riesch			};
287*14f1c34eSMichael Riesch
288*14f1c34eSMichael Riesch			vcca1v8_image: LDO_REG9 {
289*14f1c34eSMichael Riesch				regulator-name = "vcca1v8_image";
290*14f1c34eSMichael Riesch				regulator-min-microvolt = <1800000>;
291*14f1c34eSMichael Riesch				regulator-max-microvolt = <1800000>;
292*14f1c34eSMichael Riesch
293*14f1c34eSMichael Riesch				regulator-state-mem {
294*14f1c34eSMichael Riesch					regulator-off-in-suspend;
295*14f1c34eSMichael Riesch				};
296*14f1c34eSMichael Riesch			};
297*14f1c34eSMichael Riesch
298*14f1c34eSMichael Riesch			vcc_3v3: SWITCH_REG1 {
299*14f1c34eSMichael Riesch				regulator-name = "vcc_3v3";
300*14f1c34eSMichael Riesch				regulator-always-on;
301*14f1c34eSMichael Riesch				regulator-boot-on;
302*14f1c34eSMichael Riesch
303*14f1c34eSMichael Riesch				regulator-state-mem {
304*14f1c34eSMichael Riesch					regulator-off-in-suspend;
305*14f1c34eSMichael Riesch				};
306*14f1c34eSMichael Riesch			};
307*14f1c34eSMichael Riesch
308*14f1c34eSMichael Riesch			vcc3v3_sd: SWITCH_REG2 {
309*14f1c34eSMichael Riesch				regulator-name = "vcc3v3_sd";
310*14f1c34eSMichael Riesch
311*14f1c34eSMichael Riesch				regulator-state-mem {
312*14f1c34eSMichael Riesch					regulator-off-in-suspend;
313*14f1c34eSMichael Riesch				};
314*14f1c34eSMichael Riesch			};
315*14f1c34eSMichael Riesch		};
316*14f1c34eSMichael Riesch	};
317*14f1c34eSMichael Riesch};
318*14f1c34eSMichael Riesch
319fc57d783SMichael Riesch&mdio0 {
320fc57d783SMichael Riesch	rgmii_phy0: ethernet-phy@0 {
321fc57d783SMichael Riesch		compatible = "ethernet-phy-ieee802.3-c22";
322fc57d783SMichael Riesch		reg = <0x0>;
323fc57d783SMichael Riesch		reset-assert-us = <20000>;
324fc57d783SMichael Riesch		reset-deassert-us = <100000>;
325fc57d783SMichael Riesch		reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
326fc57d783SMichael Riesch	};
327fc57d783SMichael Riesch};
328fc57d783SMichael Riesch
329fc57d783SMichael Riesch&mdio1 {
330fc57d783SMichael Riesch	rgmii_phy1: ethernet-phy@0 {
331fc57d783SMichael Riesch		compatible = "ethernet-phy-ieee802.3-c22";
332fc57d783SMichael Riesch		reg = <0x0>;
333fc57d783SMichael Riesch		reset-assert-us = <20000>;
334fc57d783SMichael Riesch		reset-deassert-us = <100000>;
335fc57d783SMichael Riesch		reset-gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
336fc57d783SMichael Riesch	};
337fc57d783SMichael Riesch};
338fc57d783SMichael Riesch
339*14f1c34eSMichael Riesch&pinctrl {
340*14f1c34eSMichael Riesch	pmic {
341*14f1c34eSMichael Riesch		pmic_int: pmic_int {
342*14f1c34eSMichael Riesch			rockchip,pins =
343*14f1c34eSMichael Riesch				<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
344*14f1c34eSMichael Riesch		};
345*14f1c34eSMichael Riesch	};
346*14f1c34eSMichael Riesch};
347*14f1c34eSMichael Riesch
348e86d4810SMichael Riesch&pmu_io_domains {
349e86d4810SMichael Riesch	pmuio1-supply = <&vcc3v3_pmu>;
350e86d4810SMichael Riesch	pmuio2-supply = <&vcc3v3_pmu>;
351e86d4810SMichael Riesch	vccio1-supply = <&vccio_acodec>;
352e86d4810SMichael Riesch	vccio2-supply = <&vcc_1v8>;
353e86d4810SMichael Riesch	vccio3-supply = <&vccio_sd>;
354e86d4810SMichael Riesch	vccio4-supply = <&vcc_1v8>;
355e86d4810SMichael Riesch	vccio5-supply = <&vcc_3v3>;
356e86d4810SMichael Riesch	vccio6-supply = <&vcc_1v8>;
357e86d4810SMichael Riesch	vccio7-supply = <&vcc_3v3>;
358e86d4810SMichael Riesch	status = "okay";
359e86d4810SMichael Riesch};
360e86d4810SMichael Riesch
36101610a24SLiang Chen&sdhci {
36201610a24SLiang Chen	bus-width = <8>;
36301610a24SLiang Chen	max-frequency = <200000000>;
36401610a24SLiang Chen	non-removable;
36501610a24SLiang Chen	status = "okay";
36601610a24SLiang Chen};
36701610a24SLiang Chen
36801610a24SLiang Chen&uart2 {
36901610a24SLiang Chen	status = "okay";
37001610a24SLiang Chen};
371