1*9176ba91SJagan Teki// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*9176ba91SJagan Teki/*
3*9176ba91SJagan Teki * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
4*9176ba91SJagan Teki * Copyright (c) 2022 Radxa Limited
5*9176ba91SJagan Teki */
6*9176ba91SJagan Teki
7*9176ba91SJagan Teki/ {
8*9176ba91SJagan Teki	cluster0_opp: opp-table-0 {
9*9176ba91SJagan Teki		compatible = "operating-points-v2";
10*9176ba91SJagan Teki		opp-shared;
11*9176ba91SJagan Teki
12*9176ba91SJagan Teki		opp00 {
13*9176ba91SJagan Teki			opp-hz = /bits/ 64 <408000000>;
14*9176ba91SJagan Teki			opp-microvolt = <875000 875000 1250000>;
15*9176ba91SJagan Teki			clock-latency-ns = <40000>;
16*9176ba91SJagan Teki		};
17*9176ba91SJagan Teki		opp01 {
18*9176ba91SJagan Teki			opp-hz = /bits/ 64 <600000000>;
19*9176ba91SJagan Teki			opp-microvolt = <875000 875000 1250000>;
20*9176ba91SJagan Teki		};
21*9176ba91SJagan Teki		opp02 {
22*9176ba91SJagan Teki			opp-hz = /bits/ 64 <816000000>;
23*9176ba91SJagan Teki			opp-microvolt = <900000 900000 1250000>;
24*9176ba91SJagan Teki		};
25*9176ba91SJagan Teki		opp03 {
26*9176ba91SJagan Teki			opp-hz = /bits/ 64 <1008000000>;
27*9176ba91SJagan Teki			opp-microvolt = <975000 975000 1250000>;
28*9176ba91SJagan Teki		};
29*9176ba91SJagan Teki	};
30*9176ba91SJagan Teki
31*9176ba91SJagan Teki	cluster1_opp: opp-table-1 {
32*9176ba91SJagan Teki		compatible = "operating-points-v2";
33*9176ba91SJagan Teki		opp-shared;
34*9176ba91SJagan Teki
35*9176ba91SJagan Teki		opp00 {
36*9176ba91SJagan Teki			opp-hz = /bits/ 64 <408000000>;
37*9176ba91SJagan Teki			opp-microvolt = <875000 875000 1250000>;
38*9176ba91SJagan Teki			clock-latency-ns = <40000>;
39*9176ba91SJagan Teki		};
40*9176ba91SJagan Teki		opp01 {
41*9176ba91SJagan Teki			opp-hz = /bits/ 64 <600000000>;
42*9176ba91SJagan Teki			opp-microvolt = <875000 875000 1250000>;
43*9176ba91SJagan Teki		};
44*9176ba91SJagan Teki		opp02 {
45*9176ba91SJagan Teki			opp-hz = /bits/ 64 <816000000>;
46*9176ba91SJagan Teki			opp-microvolt = <875000 875000 1250000>;
47*9176ba91SJagan Teki		};
48*9176ba91SJagan Teki		opp03 {
49*9176ba91SJagan Teki			opp-hz = /bits/ 64 <1008000000>;
50*9176ba91SJagan Teki			opp-microvolt = <925000 925000 1250000>;
51*9176ba91SJagan Teki		};
52*9176ba91SJagan Teki		opp04 {
53*9176ba91SJagan Teki			opp-hz = /bits/ 64 <1200000000>;
54*9176ba91SJagan Teki			opp-microvolt = <1000000 1000000 1250000>;
55*9176ba91SJagan Teki		};
56*9176ba91SJagan Teki		opp05 {
57*9176ba91SJagan Teki			opp-hz = /bits/ 64 <1416000000>;
58*9176ba91SJagan Teki			opp-microvolt = <1075000 1075000 1250000>;
59*9176ba91SJagan Teki		};
60*9176ba91SJagan Teki		opp06 {
61*9176ba91SJagan Teki			opp-hz = /bits/ 64 <1512000000>;
62*9176ba91SJagan Teki			opp-microvolt = <1150000 1150000 1250000>;
63*9176ba91SJagan Teki		};
64*9176ba91SJagan Teki	};
65*9176ba91SJagan Teki
66*9176ba91SJagan Teki	gpu_opp_table: opp-table-2 {
67*9176ba91SJagan Teki		compatible = "operating-points-v2";
68*9176ba91SJagan Teki
69*9176ba91SJagan Teki		opp00 {
70*9176ba91SJagan Teki			opp-hz = /bits/ 64 <200000000>;
71*9176ba91SJagan Teki			opp-microvolt = <875000 875000 1150000>;
72*9176ba91SJagan Teki		};
73*9176ba91SJagan Teki		opp01 {
74*9176ba91SJagan Teki			opp-hz = /bits/ 64 <300000000>;
75*9176ba91SJagan Teki			opp-microvolt = <875000 875000 1150000>;
76*9176ba91SJagan Teki		};
77*9176ba91SJagan Teki		opp02 {
78*9176ba91SJagan Teki			opp-hz = /bits/ 64 <400000000>;
79*9176ba91SJagan Teki			opp-microvolt = <875000 875000 1150000>;
80*9176ba91SJagan Teki		};
81*9176ba91SJagan Teki		opp03 {
82*9176ba91SJagan Teki			opp-hz = /bits/ 64 <600000000>;
83*9176ba91SJagan Teki			opp-microvolt = <975000 975000 1150000>;
84*9176ba91SJagan Teki		};
85*9176ba91SJagan Teki	};
86*9176ba91SJagan Teki};
87*9176ba91SJagan Teki
88*9176ba91SJagan Teki&cpu_l0 {
89*9176ba91SJagan Teki	operating-points-v2 = <&cluster0_opp>;
90*9176ba91SJagan Teki};
91*9176ba91SJagan Teki
92*9176ba91SJagan Teki&cpu_l1 {
93*9176ba91SJagan Teki	operating-points-v2 = <&cluster0_opp>;
94*9176ba91SJagan Teki};
95*9176ba91SJagan Teki
96*9176ba91SJagan Teki&cpu_l2 {
97*9176ba91SJagan Teki	operating-points-v2 = <&cluster0_opp>;
98*9176ba91SJagan Teki};
99*9176ba91SJagan Teki
100*9176ba91SJagan Teki&cpu_l3 {
101*9176ba91SJagan Teki	operating-points-v2 = <&cluster0_opp>;
102*9176ba91SJagan Teki};
103*9176ba91SJagan Teki
104*9176ba91SJagan Teki&cpu_b0 {
105*9176ba91SJagan Teki	operating-points-v2 = <&cluster1_opp>;
106*9176ba91SJagan Teki};
107*9176ba91SJagan Teki
108*9176ba91SJagan Teki&cpu_b1 {
109*9176ba91SJagan Teki	operating-points-v2 = <&cluster1_opp>;
110*9176ba91SJagan Teki};
111*9176ba91SJagan Teki
112*9176ba91SJagan Teki&gpu {
113*9176ba91SJagan Teki	operating-points-v2 = <&gpu_opp_table>;
114*9176ba91SJagan Teki};
115