1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd 4 */ 5 6/dts-v1/; 7#include <dt-bindings/pwm/pwm.h> 8#include "rk3399.dtsi" 9 10/ { 11 model = "Rockchip RK3399 Evaluation Board"; 12 compatible = "rockchip,rk3399-evb", "rockchip,rk3399", 13 "google,rk3399evb-rev2"; 14 15 backlight: backlight { 16 compatible = "pwm-backlight"; 17 brightness-levels = < 18 0 1 2 3 4 5 6 7 19 8 9 10 11 12 13 14 15 20 16 17 18 19 20 21 22 23 21 24 25 26 27 28 29 30 31 22 32 33 34 35 36 37 38 39 23 40 41 42 43 44 45 46 47 24 48 49 50 51 52 53 54 55 25 56 57 58 59 60 61 62 63 26 64 65 66 67 68 69 70 71 27 72 73 74 75 76 77 78 79 28 80 81 82 83 84 85 86 87 29 88 89 90 91 92 93 94 95 30 96 97 98 99 100 101 102 103 31 104 105 106 107 108 109 110 111 32 112 113 114 115 116 117 118 119 33 120 121 122 123 124 125 126 127 34 128 129 130 131 132 133 134 135 35 136 137 138 139 140 141 142 143 36 144 145 146 147 148 149 150 151 37 152 153 154 155 156 157 158 159 38 160 161 162 163 164 165 166 167 39 168 169 170 171 172 173 174 175 40 176 177 178 179 180 181 182 183 41 184 185 186 187 188 189 190 191 42 192 193 194 195 196 197 198 199 43 200 201 202 203 204 205 206 207 44 208 209 210 211 212 213 214 215 45 216 217 218 219 220 221 222 223 46 224 225 226 227 228 229 230 231 47 232 233 234 235 236 237 238 239 48 240 241 242 243 244 245 246 247 49 248 249 250 251 252 253 254 255>; 50 default-brightness-level = <200>; 51 pwms = <&pwm0 0 25000 0>; 52 }; 53 54 clkin_gmac: external-gmac-clock { 55 compatible = "fixed-clock"; 56 clock-frequency = <125000000>; 57 clock-output-names = "clkin_gmac"; 58 #clock-cells = <0>; 59 }; 60 61 vdd_center: vdd-center { 62 compatible = "pwm-regulator"; 63 pwms = <&pwm3 0 25000 0>; 64 regulator-name = "vdd_center"; 65 regulator-min-microvolt = <800000>; 66 regulator-max-microvolt = <1400000>; 67 regulator-always-on; 68 regulator-boot-on; 69 status = "okay"; 70 }; 71 72 vcc3v3_sys: vcc3v3-sys { 73 compatible = "regulator-fixed"; 74 regulator-name = "vcc3v3_sys"; 75 regulator-always-on; 76 regulator-boot-on; 77 regulator-min-microvolt = <3300000>; 78 regulator-max-microvolt = <3300000>; 79 }; 80 81 vcc5v0_sys: vcc5v0-sys { 82 compatible = "regulator-fixed"; 83 regulator-name = "vcc5v0_sys"; 84 regulator-always-on; 85 regulator-boot-on; 86 regulator-min-microvolt = <5000000>; 87 regulator-max-microvolt = <5000000>; 88 }; 89 90 vcc5v0_host: vcc5v0-host-regulator { 91 compatible = "regulator-fixed"; 92 enable-active-high; 93 gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; 94 pinctrl-names = "default"; 95 pinctrl-0 = <&vcc5v0_host_en>; 96 regulator-name = "vcc5v0_host"; 97 vin-supply = <&vcc5v0_sys>; 98 }; 99 100 vcc_phy: vcc-phy-regulator { 101 compatible = "regulator-fixed"; 102 regulator-name = "vcc_phy"; 103 regulator-always-on; 104 regulator-boot-on; 105 }; 106 107 vcc_phy: vcc-phy-regulator { 108 compatible = "regulator-fixed"; 109 regulator-name = "vcc_phy"; 110 regulator-always-on; 111 regulator-boot-on; 112 }; 113 114}; 115 116&emmc_phy { 117 status = "okay"; 118}; 119 120&gmac { 121 assigned-clocks = <&cru SCLK_RMII_SRC>; 122 assigned-clock-parents = <&clkin_gmac>; 123 clock_in_out = "input"; 124 phy-supply = <&vcc_phy>; 125 phy-mode = "rgmii"; 126 pinctrl-names = "default"; 127 pinctrl-0 = <&rgmii_pins>; 128 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 129 snps,reset-active-low; 130 snps,reset-delays-us = <0 10000 50000>; 131 tx_delay = <0x28>; 132 rx_delay = <0x11>; 133 status = "okay"; 134}; 135 136&i2c0 { 137 status = "okay"; 138 139 rk808: pmic@1b { 140 compatible = "rockchip,rk808"; 141 reg = <0x1b>; 142 interrupt-parent = <&gpio1>; 143 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 144 pinctrl-names = "default"; 145 pinctrl-0 = <&pmic_int_l>; 146 rockchip,system-power-controller; 147 wakeup-source; 148 #clock-cells = <1>; 149 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 150 151 vcc1-supply = <&vcc3v3_sys>; 152 vcc2-supply = <&vcc3v3_sys>; 153 vcc3-supply = <&vcc3v3_sys>; 154 vcc4-supply = <&vcc3v3_sys>; 155 vcc6-supply = <&vcc3v3_sys>; 156 vcc7-supply = <&vcc3v3_sys>; 157 vcc8-supply = <&vcc3v3_sys>; 158 vcc9-supply = <&vcc3v3_sys>; 159 vcc10-supply = <&vcc3v3_sys>; 160 vcc11-supply = <&vcc3v3_sys>; 161 vcc12-supply = <&vcc3v3_sys>; 162 vddio-supply = <&vcc1v8_pmu>; 163 164 regulators { 165 vdd_log: DCDC_REG1 { 166 regulator-name = "vdd_log"; 167 regulator-min-microvolt = <750000>; 168 regulator-max-microvolt = <1350000>; 169 regulator-ramp-delay = <6001>; 170 regulator-always-on; 171 regulator-boot-on; 172 regulator-state-mem { 173 regulator-on-in-suspend; 174 regulator-suspend-microvolt = <900000>; 175 }; 176 }; 177 178 vdd_cpu_l: DCDC_REG2 { 179 regulator-name = "vdd_cpu_l"; 180 regulator-min-microvolt = <750000>; 181 regulator-max-microvolt = <1350000>; 182 regulator-ramp-delay = <6001>; 183 regulator-always-on; 184 regulator-boot-on; 185 regulator-state-mem { 186 regulator-off-in-suspend; 187 }; 188 }; 189 190 vcc_ddr: DCDC_REG3 { 191 regulator-name = "vcc_ddr"; 192 regulator-always-on; 193 regulator-boot-on; 194 regulator-state-mem { 195 regulator-on-in-suspend; 196 }; 197 }; 198 199 vcc_1v8: DCDC_REG4 { 200 regulator-name = "vcc_1v8"; 201 regulator-min-microvolt = <1800000>; 202 regulator-max-microvolt = <1800000>; 203 regulator-always-on; 204 regulator-boot-on; 205 regulator-state-mem { 206 regulator-on-in-suspend; 207 regulator-suspend-microvolt = <1800000>; 208 }; 209 }; 210 211 vcc1v8_dvp: LDO_REG1 { 212 regulator-name = "vcc1v8_dvp"; 213 regulator-min-microvolt = <1800000>; 214 regulator-max-microvolt = <1800000>; 215 regulator-always-on; 216 regulator-boot-on; 217 regulator-state-mem { 218 regulator-off-in-suspend; 219 }; 220 }; 221 222 vcc3v0_tp: LDO_REG2 { 223 regulator-name = "vcc3v0_tp"; 224 regulator-min-microvolt = <3000000>; 225 regulator-max-microvolt = <3000000>; 226 regulator-always-on; 227 regulator-boot-on; 228 regulator-state-mem { 229 regulator-off-in-suspend; 230 }; 231 }; 232 233 vcc1v8_pmu: LDO_REG3 { 234 regulator-name = "vcc1v8_pmu"; 235 regulator-min-microvolt = <1800000>; 236 regulator-max-microvolt = <1800000>; 237 regulator-always-on; 238 regulator-boot-on; 239 regulator-state-mem { 240 regulator-on-in-suspend; 241 regulator-suspend-microvolt = <1800000>; 242 }; 243 }; 244 245 vcc_sd: LDO_REG4 { 246 regulator-name = "vcc_sd"; 247 regulator-min-microvolt = <1800000>; 248 regulator-max-microvolt = <3000000>; 249 regulator-always-on; 250 regulator-boot-on; 251 regulator-state-mem { 252 regulator-on-in-suspend; 253 regulator-suspend-microvolt = <3000000>; 254 }; 255 }; 256 257 vcca3v0_codec: LDO_REG5 { 258 regulator-name = "vcca3v0_codec"; 259 regulator-min-microvolt = <3000000>; 260 regulator-max-microvolt = <3000000>; 261 regulator-always-on; 262 regulator-boot-on; 263 regulator-state-mem { 264 regulator-off-in-suspend; 265 }; 266 }; 267 268 vcc_1v5: LDO_REG6 { 269 regulator-name = "vcc_1v5"; 270 regulator-min-microvolt = <1500000>; 271 regulator-max-microvolt = <1500000>; 272 regulator-always-on; 273 regulator-boot-on; 274 regulator-state-mem { 275 regulator-on-in-suspend; 276 regulator-suspend-microvolt = <1500000>; 277 }; 278 }; 279 280 vcca1v8_codec: LDO_REG7 { 281 regulator-name = "vcca1v8_codec"; 282 regulator-min-microvolt = <1800000>; 283 regulator-max-microvolt = <1800000>; 284 regulator-always-on; 285 regulator-boot-on; 286 regulator-state-mem { 287 regulator-off-in-suspend; 288 }; 289 }; 290 291 vcc_3v0: LDO_REG8 { 292 regulator-name = "vcc_3v0"; 293 regulator-min-microvolt = <3000000>; 294 regulator-max-microvolt = <3000000>; 295 regulator-always-on; 296 regulator-boot-on; 297 regulator-state-mem { 298 regulator-on-in-suspend; 299 regulator-suspend-microvolt = <3000000>; 300 }; 301 }; 302 303 vcc3v3_s3: SWITCH_REG1 { 304 regulator-name = "vcc3v3_s3"; 305 regulator-always-on; 306 regulator-boot-on; 307 regulator-state-mem { 308 regulator-on-in-suspend; 309 }; 310 }; 311 312 vcc3v3_s0: SWITCH_REG2 { 313 regulator-name = "vcc3v3_s0"; 314 regulator-always-on; 315 regulator-boot-on; 316 regulator-state-mem { 317 regulator-off-in-suspend; 318 }; 319 }; 320 }; 321 }; 322 323 vdd_cpu_b: regulator@40 { 324 compatible = "silergy,syr827"; 325 reg = <0x40>; 326 fcs,suspend-voltage-selector = <1>; 327 regulator-name = "vdd_cpu_b"; 328 regulator-min-microvolt = <712500>; 329 regulator-max-microvolt = <1500000>; 330 regulator-ramp-delay = <1000>; 331 regulator-always-on; 332 regulator-boot-on; 333 vin-supply = <&vcc5v0_sys>; 334 335 regulator-state-mem { 336 regulator-off-in-suspend; 337 }; 338 }; 339 340 vdd_gpu: regulator@41 { 341 compatible = "silergy,syr828"; 342 reg = <0x41>; 343 fcs,suspend-voltage-selector = <1>; 344 regulator-name = "vdd_gpu"; 345 regulator-min-microvolt = <712500>; 346 regulator-max-microvolt = <1500000>; 347 regulator-ramp-delay = <1000>; 348 regulator-always-on; 349 regulator-boot-on; 350 vin-supply = <&vcc5v0_sys>; 351 352 regulator-state-mem { 353 regulator-off-in-suspend; 354 }; 355 }; 356}; 357 358&pwm0 { 359 status = "okay"; 360}; 361 362&pwm2 { 363 status = "okay"; 364}; 365 366&pwm3 { 367 status = "okay"; 368}; 369 370&sdhci { 371 bus-width = <8>; 372 mmc-hs400-1_8v; 373 mmc-hs400-enhanced-strobe; 374 non-removable; 375 status = "okay"; 376}; 377 378&pcie_phy { 379 status = "disabled"; 380}; 381 382&pcie0 { 383 ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>; 384 num-lanes = <4>; 385 pinctrl-names = "default"; 386 pinctrl-0 = <&pcie_clkreqn_cpm>; 387 status = "disabled"; 388}; 389 390&u2phy0 { 391 status = "okay"; 392}; 393 394&u2phy0_host { 395 phy-supply = <&vcc5v0_host>; 396 status = "okay"; 397}; 398 399&u2phy1 { 400 status = "okay"; 401}; 402 403&u2phy1_host { 404 phy-supply = <&vcc5v0_host>; 405 status = "okay"; 406}; 407 408&uart2 { 409 status = "okay"; 410}; 411 412&usb_host0_ehci { 413 status = "okay"; 414}; 415 416&usb_host0_ohci { 417 status = "okay"; 418}; 419 420&usb_host1_ehci { 421 status = "okay"; 422}; 423 424&usb_host1_ohci { 425 status = "okay"; 426}; 427 428&pinctrl { 429 pmic { 430 pmic_int_l: pmic-int-l { 431 rockchip,pins = 432 <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 433 }; 434 }; 435 436 usb2 { 437 vcc5v0_host_en: vcc5v0-host-en { 438 rockchip,pins = 439 <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 440 }; 441 }; 442}; 443