1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd 4 */ 5 6/dts-v1/; 7#include <dt-bindings/pwm/pwm.h> 8#include "rk3399.dtsi" 9 10/ { 11 model = "Rockchip RK3399 Evaluation Board"; 12 compatible = "rockchip,rk3399-evb", "rockchip,rk3399", 13 "google,rk3399evb-rev2"; 14 15 backlight: backlight { 16 compatible = "pwm-backlight"; 17 brightness-levels = < 18 0 1 2 3 4 5 6 7 19 8 9 10 11 12 13 14 15 20 16 17 18 19 20 21 22 23 21 24 25 26 27 28 29 30 31 22 32 33 34 35 36 37 38 39 23 40 41 42 43 44 45 46 47 24 48 49 50 51 52 53 54 55 25 56 57 58 59 60 61 62 63 26 64 65 66 67 68 69 70 71 27 72 73 74 75 76 77 78 79 28 80 81 82 83 84 85 86 87 29 88 89 90 91 92 93 94 95 30 96 97 98 99 100 101 102 103 31 104 105 106 107 108 109 110 111 32 112 113 114 115 116 117 118 119 33 120 121 122 123 124 125 126 127 34 128 129 130 131 132 133 134 135 35 136 137 138 139 140 141 142 143 36 144 145 146 147 148 149 150 151 37 152 153 154 155 156 157 158 159 38 160 161 162 163 164 165 166 167 39 168 169 170 171 172 173 174 175 40 176 177 178 179 180 181 182 183 41 184 185 186 187 188 189 190 191 42 192 193 194 195 196 197 198 199 43 200 201 202 203 204 205 206 207 44 208 209 210 211 212 213 214 215 45 216 217 218 219 220 221 222 223 46 224 225 226 227 228 229 230 231 47 232 233 234 235 236 237 238 239 48 240 241 242 243 244 245 246 247 49 248 249 250 251 252 253 254 255>; 50 default-brightness-level = <200>; 51 pwms = <&pwm0 0 25000 0>; 52 }; 53 54 edp_panel: edp-panel { 55 compatible ="lg,lp079qx1-sp0v"; 56 backlight = <&backlight>; 57 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; 58 power-supply = <&vcc3v3_s0>; 59 60 port { 61 panel_in_edp: endpoint { 62 remote-endpoint = <&edp_out_panel>; 63 }; 64 }; 65 }; 66 67 clkin_gmac: external-gmac-clock { 68 compatible = "fixed-clock"; 69 clock-frequency = <125000000>; 70 clock-output-names = "clkin_gmac"; 71 #clock-cells = <0>; 72 }; 73 74 vdd_center: vdd-center { 75 compatible = "pwm-regulator"; 76 pwms = <&pwm3 0 25000 0>; 77 regulator-name = "vdd_center"; 78 regulator-min-microvolt = <800000>; 79 regulator-max-microvolt = <1400000>; 80 regulator-always-on; 81 regulator-boot-on; 82 status = "okay"; 83 }; 84 85 vcc3v3_sys: vcc3v3-sys { 86 compatible = "regulator-fixed"; 87 regulator-name = "vcc3v3_sys"; 88 regulator-always-on; 89 regulator-boot-on; 90 regulator-min-microvolt = <3300000>; 91 regulator-max-microvolt = <3300000>; 92 }; 93 94 vcc5v0_sys: vcc5v0-sys { 95 compatible = "regulator-fixed"; 96 regulator-name = "vcc5v0_sys"; 97 regulator-always-on; 98 regulator-boot-on; 99 regulator-min-microvolt = <5000000>; 100 regulator-max-microvolt = <5000000>; 101 }; 102 103 vcc5v0_host: vcc5v0-host-regulator { 104 compatible = "regulator-fixed"; 105 enable-active-high; 106 gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; 107 pinctrl-names = "default"; 108 pinctrl-0 = <&vcc5v0_host_en>; 109 regulator-name = "vcc5v0_host"; 110 vin-supply = <&vcc5v0_sys>; 111 }; 112 113 vcc_phy: vcc-phy-regulator { 114 compatible = "regulator-fixed"; 115 regulator-name = "vcc_phy"; 116 regulator-always-on; 117 regulator-boot-on; 118 }; 119 120 vcc_phy: vcc-phy-regulator { 121 compatible = "regulator-fixed"; 122 regulator-name = "vcc_phy"; 123 regulator-always-on; 124 regulator-boot-on; 125 }; 126 127}; 128 129&edp { 130 status = "okay"; 131 force-hpd; 132 133 ports { 134 edp_out: port@1 { 135 reg = <1>; 136 #address-cells = <1>; 137 #size-cells = <0>; 138 139 edp_out_panel: endpoint@0 { 140 reg = <0>; 141 remote-endpoint = <&panel_in_edp>; 142 }; 143 }; 144 }; 145}; 146 147&emmc_phy { 148 status = "okay"; 149}; 150 151&gmac { 152 assigned-clocks = <&cru SCLK_RMII_SRC>; 153 assigned-clock-parents = <&clkin_gmac>; 154 clock_in_out = "input"; 155 phy-supply = <&vcc_phy>; 156 phy-mode = "rgmii"; 157 pinctrl-names = "default"; 158 pinctrl-0 = <&rgmii_pins>; 159 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 160 snps,reset-active-low; 161 snps,reset-delays-us = <0 10000 50000>; 162 tx_delay = <0x28>; 163 rx_delay = <0x11>; 164 status = "okay"; 165}; 166 167&i2c0 { 168 status = "okay"; 169 170 rk808: pmic@1b { 171 compatible = "rockchip,rk808"; 172 reg = <0x1b>; 173 interrupt-parent = <&gpio1>; 174 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 175 pinctrl-names = "default"; 176 pinctrl-0 = <&pmic_int_l>; 177 rockchip,system-power-controller; 178 wakeup-source; 179 #clock-cells = <1>; 180 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 181 182 vcc1-supply = <&vcc3v3_sys>; 183 vcc2-supply = <&vcc3v3_sys>; 184 vcc3-supply = <&vcc3v3_sys>; 185 vcc4-supply = <&vcc3v3_sys>; 186 vcc6-supply = <&vcc3v3_sys>; 187 vcc7-supply = <&vcc3v3_sys>; 188 vcc8-supply = <&vcc3v3_sys>; 189 vcc9-supply = <&vcc3v3_sys>; 190 vcc10-supply = <&vcc3v3_sys>; 191 vcc11-supply = <&vcc3v3_sys>; 192 vcc12-supply = <&vcc3v3_sys>; 193 vddio-supply = <&vcc1v8_pmu>; 194 195 regulators { 196 vdd_log: DCDC_REG1 { 197 regulator-name = "vdd_log"; 198 regulator-min-microvolt = <750000>; 199 regulator-max-microvolt = <1350000>; 200 regulator-ramp-delay = <6001>; 201 regulator-always-on; 202 regulator-boot-on; 203 regulator-state-mem { 204 regulator-on-in-suspend; 205 regulator-suspend-microvolt = <900000>; 206 }; 207 }; 208 209 vdd_cpu_l: DCDC_REG2 { 210 regulator-name = "vdd_cpu_l"; 211 regulator-min-microvolt = <750000>; 212 regulator-max-microvolt = <1350000>; 213 regulator-ramp-delay = <6001>; 214 regulator-always-on; 215 regulator-boot-on; 216 regulator-state-mem { 217 regulator-off-in-suspend; 218 }; 219 }; 220 221 vcc_ddr: DCDC_REG3 { 222 regulator-name = "vcc_ddr"; 223 regulator-always-on; 224 regulator-boot-on; 225 regulator-state-mem { 226 regulator-on-in-suspend; 227 }; 228 }; 229 230 vcc_1v8: DCDC_REG4 { 231 regulator-name = "vcc_1v8"; 232 regulator-min-microvolt = <1800000>; 233 regulator-max-microvolt = <1800000>; 234 regulator-always-on; 235 regulator-boot-on; 236 regulator-state-mem { 237 regulator-on-in-suspend; 238 regulator-suspend-microvolt = <1800000>; 239 }; 240 }; 241 242 vcc1v8_dvp: LDO_REG1 { 243 regulator-name = "vcc1v8_dvp"; 244 regulator-min-microvolt = <1800000>; 245 regulator-max-microvolt = <1800000>; 246 regulator-always-on; 247 regulator-boot-on; 248 regulator-state-mem { 249 regulator-off-in-suspend; 250 }; 251 }; 252 253 vcc3v0_tp: LDO_REG2 { 254 regulator-name = "vcc3v0_tp"; 255 regulator-min-microvolt = <3000000>; 256 regulator-max-microvolt = <3000000>; 257 regulator-always-on; 258 regulator-boot-on; 259 regulator-state-mem { 260 regulator-off-in-suspend; 261 }; 262 }; 263 264 vcc1v8_pmu: LDO_REG3 { 265 regulator-name = "vcc1v8_pmu"; 266 regulator-min-microvolt = <1800000>; 267 regulator-max-microvolt = <1800000>; 268 regulator-always-on; 269 regulator-boot-on; 270 regulator-state-mem { 271 regulator-on-in-suspend; 272 regulator-suspend-microvolt = <1800000>; 273 }; 274 }; 275 276 vcc_sd: LDO_REG4 { 277 regulator-name = "vcc_sd"; 278 regulator-min-microvolt = <1800000>; 279 regulator-max-microvolt = <3000000>; 280 regulator-always-on; 281 regulator-boot-on; 282 regulator-state-mem { 283 regulator-on-in-suspend; 284 regulator-suspend-microvolt = <3000000>; 285 }; 286 }; 287 288 vcca3v0_codec: LDO_REG5 { 289 regulator-name = "vcca3v0_codec"; 290 regulator-min-microvolt = <3000000>; 291 regulator-max-microvolt = <3000000>; 292 regulator-always-on; 293 regulator-boot-on; 294 regulator-state-mem { 295 regulator-off-in-suspend; 296 }; 297 }; 298 299 vcc_1v5: LDO_REG6 { 300 regulator-name = "vcc_1v5"; 301 regulator-min-microvolt = <1500000>; 302 regulator-max-microvolt = <1500000>; 303 regulator-always-on; 304 regulator-boot-on; 305 regulator-state-mem { 306 regulator-on-in-suspend; 307 regulator-suspend-microvolt = <1500000>; 308 }; 309 }; 310 311 vcca1v8_codec: LDO_REG7 { 312 regulator-name = "vcca1v8_codec"; 313 regulator-min-microvolt = <1800000>; 314 regulator-max-microvolt = <1800000>; 315 regulator-always-on; 316 regulator-boot-on; 317 regulator-state-mem { 318 regulator-off-in-suspend; 319 }; 320 }; 321 322 vcc_3v0: LDO_REG8 { 323 regulator-name = "vcc_3v0"; 324 regulator-min-microvolt = <3000000>; 325 regulator-max-microvolt = <3000000>; 326 regulator-always-on; 327 regulator-boot-on; 328 regulator-state-mem { 329 regulator-on-in-suspend; 330 regulator-suspend-microvolt = <3000000>; 331 }; 332 }; 333 334 vcc3v3_s3: SWITCH_REG1 { 335 regulator-name = "vcc3v3_s3"; 336 regulator-always-on; 337 regulator-boot-on; 338 regulator-state-mem { 339 regulator-on-in-suspend; 340 }; 341 }; 342 343 vcc3v3_s0: SWITCH_REG2 { 344 regulator-name = "vcc3v3_s0"; 345 regulator-always-on; 346 regulator-boot-on; 347 regulator-state-mem { 348 regulator-off-in-suspend; 349 }; 350 }; 351 }; 352 }; 353 354 vdd_cpu_b: regulator@40 { 355 compatible = "silergy,syr827"; 356 reg = <0x40>; 357 fcs,suspend-voltage-selector = <1>; 358 regulator-name = "vdd_cpu_b"; 359 regulator-min-microvolt = <712500>; 360 regulator-max-microvolt = <1500000>; 361 regulator-ramp-delay = <1000>; 362 regulator-always-on; 363 regulator-boot-on; 364 vin-supply = <&vcc5v0_sys>; 365 366 regulator-state-mem { 367 regulator-off-in-suspend; 368 }; 369 }; 370 371 vdd_gpu: regulator@41 { 372 compatible = "silergy,syr828"; 373 reg = <0x41>; 374 fcs,suspend-voltage-selector = <1>; 375 regulator-name = "vdd_gpu"; 376 regulator-min-microvolt = <712500>; 377 regulator-max-microvolt = <1500000>; 378 regulator-ramp-delay = <1000>; 379 regulator-always-on; 380 regulator-boot-on; 381 vin-supply = <&vcc5v0_sys>; 382 383 regulator-state-mem { 384 regulator-off-in-suspend; 385 }; 386 }; 387}; 388 389&pwm0 { 390 status = "okay"; 391}; 392 393&pwm2 { 394 status = "okay"; 395}; 396 397&pwm3 { 398 status = "okay"; 399}; 400 401&sdhci { 402 bus-width = <8>; 403 mmc-hs400-1_8v; 404 mmc-hs400-enhanced-strobe; 405 non-removable; 406 status = "okay"; 407}; 408 409&pcie_phy { 410 status = "disabled"; 411}; 412 413&pcie0 { 414 ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>; 415 num-lanes = <4>; 416 pinctrl-names = "default"; 417 pinctrl-0 = <&pcie_clkreqn_cpm>; 418 status = "disabled"; 419}; 420 421&u2phy0 { 422 status = "okay"; 423}; 424 425&u2phy0_host { 426 phy-supply = <&vcc5v0_host>; 427 status = "okay"; 428}; 429 430&u2phy1 { 431 status = "okay"; 432}; 433 434&u2phy1_host { 435 phy-supply = <&vcc5v0_host>; 436 status = "okay"; 437}; 438 439&uart2 { 440 status = "okay"; 441}; 442 443&usb_host0_ehci { 444 status = "okay"; 445}; 446 447&usb_host0_ohci { 448 status = "okay"; 449}; 450 451&usb_host1_ehci { 452 status = "okay"; 453}; 454 455&usb_host1_ohci { 456 status = "okay"; 457}; 458 459&pinctrl { 460 pmic { 461 pmic_int_l: pmic-int-l { 462 rockchip,pins = 463 <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 464 }; 465 }; 466 467 usb2 { 468 vcc5v0_host_en: vcc5v0-host-en { 469 rockchip,pins = 470 <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 471 }; 472 }; 473}; 474 475&vopb { 476 status = "okay"; 477}; 478 479&vopb_mmu { 480 status = "okay"; 481}; 482