1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2017 PINE64 4 */ 5 6/dts-v1/; 7#include "rk3328.dtsi" 8 9/ { 10 model = "Pine64 Rock64"; 11 compatible = "pine64,rock64", "rockchip,rk3328"; 12 13 chosen { 14 stdout-path = "serial2:1500000n8"; 15 }; 16 17 gmac_clkin: external-gmac-clock { 18 compatible = "fixed-clock"; 19 clock-frequency = <125000000>; 20 clock-output-names = "gmac_clkin"; 21 #clock-cells = <0>; 22 }; 23 24 vcc_sd: sdmmc-regulator { 25 compatible = "regulator-fixed"; 26 gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; 27 pinctrl-names = "default"; 28 pinctrl-0 = <&sdmmc0m1_gpio>; 29 regulator-name = "vcc_sd"; 30 regulator-min-microvolt = <3300000>; 31 regulator-max-microvolt = <3300000>; 32 vin-supply = <&vcc_io>; 33 }; 34 35 vcc_host_5v: vcc-host-5v-regulator { 36 compatible = "regulator-fixed"; 37 enable-active-high; 38 gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; 39 pinctrl-names = "default"; 40 pinctrl-0 = <&usb30_host_drv>; 41 regulator-name = "vcc_host_5v"; 42 regulator-always-on; 43 regulator-boot-on; 44 vin-supply = <&vcc_sys>; 45 }; 46 47 vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator { 48 compatible = "regulator-fixed"; 49 enable-active-high; 50 gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; 51 pinctrl-names = "default"; 52 pinctrl-0 = <&usb20_host_drv>; 53 regulator-name = "vcc_host1_5v"; 54 regulator-always-on; 55 regulator-boot-on; 56 vin-supply = <&vcc_sys>; 57 }; 58 59 vcc_sys: vcc-sys { 60 compatible = "regulator-fixed"; 61 regulator-name = "vcc_sys"; 62 regulator-always-on; 63 regulator-boot-on; 64 regulator-min-microvolt = <5000000>; 65 regulator-max-microvolt = <5000000>; 66 }; 67 68 sound { 69 compatible = "audio-graph-card"; 70 label = "rockchip,rk3328"; 71 dais = <&i2s1_p0 72 &spdif_p0>; 73 }; 74 75 spdif-dit { 76 compatible = "linux,spdif-dit"; 77 #sound-dai-cells = <0>; 78 79 port { 80 dit_p0_0: endpoint { 81 remote-endpoint = <&spdif_p0_0>; 82 }; 83 }; 84 }; 85}; 86 87&codec { 88 status = "okay"; 89 90 port@0 { 91 codec_p0_0: endpoint { 92 remote-endpoint = <&i2s1_p0_0>; 93 }; 94 }; 95}; 96 97&cpu0 { 98 cpu-supply = <&vdd_arm>; 99}; 100 101&cpu1 { 102 cpu-supply = <&vdd_arm>; 103}; 104 105&cpu2 { 106 cpu-supply = <&vdd_arm>; 107}; 108 109&cpu3 { 110 cpu-supply = <&vdd_arm>; 111}; 112 113&emmc { 114 bus-width = <8>; 115 cap-mmc-highspeed; 116 mmc-hs200-1_8v; 117 non-removable; 118 pinctrl-names = "default"; 119 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; 120 vmmc-supply = <&vcc_io>; 121 vqmmc-supply = <&vcc18_emmc>; 122 status = "okay"; 123}; 124 125&gmac2io { 126 assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; 127 assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; 128 clock_in_out = "input"; 129 phy-supply = <&vcc_io>; 130 phy-mode = "rgmii"; 131 pinctrl-names = "default"; 132 pinctrl-0 = <&rgmiim1_pins>; 133 snps,force_thresh_dma_mode; 134 snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; 135 snps,reset-active-low; 136 snps,reset-delays-us = <0 10000 50000>; 137 tx_delay = <0x24>; 138 rx_delay = <0x18>; 139 status = "okay"; 140}; 141 142&hdmi { 143 status = "okay"; 144}; 145 146&hdmiphy { 147 status = "okay"; 148}; 149 150&i2c1 { 151 status = "okay"; 152 153 rk805: rk805@18 { 154 compatible = "rockchip,rk805"; 155 reg = <0x18>; 156 interrupt-parent = <&gpio2>; 157 interrupts = <6 IRQ_TYPE_LEVEL_LOW>; 158 #clock-cells = <1>; 159 clock-output-names = "xin32k", "rk805-clkout2"; 160 pinctrl-names = "default"; 161 pinctrl-0 = <&pmic_int_l>; 162 rockchip,system-power-controller; 163 wakeup-source; 164 165 vcc1-supply = <&vcc_sys>; 166 vcc2-supply = <&vcc_sys>; 167 vcc3-supply = <&vcc_sys>; 168 vcc4-supply = <&vcc_sys>; 169 vcc5-supply = <&vcc_io>; 170 vcc6-supply = <&vcc_sys>; 171 172 regulators { 173 vdd_logic: DCDC_REG1 { 174 regulator-name = "vdd_logic"; 175 regulator-min-microvolt = <712500>; 176 regulator-max-microvolt = <1450000>; 177 regulator-ramp-delay = <12500>; 178 regulator-always-on; 179 regulator-boot-on; 180 regulator-state-mem { 181 regulator-on-in-suspend; 182 regulator-suspend-microvolt = <1000000>; 183 }; 184 }; 185 186 vdd_arm: DCDC_REG2 { 187 regulator-name = "vdd_arm"; 188 regulator-min-microvolt = <712500>; 189 regulator-max-microvolt = <1450000>; 190 regulator-ramp-delay = <12500>; 191 regulator-always-on; 192 regulator-boot-on; 193 regulator-state-mem { 194 regulator-on-in-suspend; 195 regulator-suspend-microvolt = <950000>; 196 }; 197 }; 198 199 vcc_ddr: DCDC_REG3 { 200 regulator-name = "vcc_ddr"; 201 regulator-always-on; 202 regulator-boot-on; 203 regulator-state-mem { 204 regulator-on-in-suspend; 205 }; 206 }; 207 208 vcc_io: DCDC_REG4 { 209 regulator-name = "vcc_io"; 210 regulator-min-microvolt = <3300000>; 211 regulator-max-microvolt = <3300000>; 212 regulator-always-on; 213 regulator-boot-on; 214 regulator-state-mem { 215 regulator-on-in-suspend; 216 regulator-suspend-microvolt = <3300000>; 217 }; 218 }; 219 220 vcc_18: LDO_REG1 { 221 regulator-name = "vdd_18"; 222 regulator-min-microvolt = <1800000>; 223 regulator-max-microvolt = <1800000>; 224 regulator-always-on; 225 regulator-boot-on; 226 regulator-state-mem { 227 regulator-on-in-suspend; 228 regulator-suspend-microvolt = <1800000>; 229 }; 230 }; 231 232 vcc18_emmc: LDO_REG2 { 233 regulator-name = "vcc_18emmc"; 234 regulator-min-microvolt = <1800000>; 235 regulator-max-microvolt = <1800000>; 236 regulator-always-on; 237 regulator-boot-on; 238 regulator-state-mem { 239 regulator-on-in-suspend; 240 regulator-suspend-microvolt = <1800000>; 241 }; 242 }; 243 244 vdd_10: LDO_REG3 { 245 regulator-name = "vdd_10"; 246 regulator-min-microvolt = <1000000>; 247 regulator-max-microvolt = <1000000>; 248 regulator-always-on; 249 regulator-boot-on; 250 regulator-state-mem { 251 regulator-on-in-suspend; 252 regulator-suspend-microvolt = <1000000>; 253 }; 254 }; 255 }; 256 }; 257}; 258 259&i2s1 { 260 status = "okay"; 261 262 i2s1_p0: port { 263 i2s1_p0_0: endpoint { 264 dai-format = "i2s"; 265 mclk-fs = <256>; 266 remote-endpoint = <&codec_p0_0>; 267 }; 268 }; 269}; 270 271&io_domains { 272 status = "okay"; 273 274 vccio1-supply = <&vcc_io>; 275 vccio2-supply = <&vcc18_emmc>; 276 vccio3-supply = <&vcc_io>; 277 vccio4-supply = <&vcc_18>; 278 vccio5-supply = <&vcc_io>; 279 vccio6-supply = <&vcc_io>; 280 pmuio-supply = <&vcc_io>; 281}; 282 283&pinctrl { 284 pmic { 285 pmic_int_l: pmic-int-l { 286 rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; 287 }; 288 }; 289 290 usb2 { 291 usb20_host_drv: usb20-host-drv { 292 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 293 }; 294 }; 295 296 usb3 { 297 usb30_host_drv: usb30-host-drv { 298 rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; 299 }; 300 }; 301}; 302 303&sdmmc { 304 bus-width = <4>; 305 cap-mmc-highspeed; 306 cap-sd-highspeed; 307 disable-wp; 308 max-frequency = <150000000>; 309 pinctrl-names = "default"; 310 pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; 311 vmmc-supply = <&vcc_sd>; 312 status = "okay"; 313}; 314 315&spdif { 316 pinctrl-0 = <&spdifm0_tx>; 317 status = "okay"; 318 319 spdif_p0: port { 320 spdif_p0_0: endpoint { 321 remote-endpoint = <&dit_p0_0>; 322 }; 323 }; 324}; 325 326&spi0 { 327 status = "okay"; 328 329 spiflash@0 { 330 compatible = "jedec,spi-nor"; 331 reg = <0>; 332 333 /* maximum speed for Rockchip SPI */ 334 spi-max-frequency = <50000000>; 335 }; 336}; 337 338&tsadc { 339 rockchip,hw-tshut-mode = <0>; 340 rockchip,hw-tshut-polarity = <0>; 341 status = "okay"; 342}; 343 344&uart2 { 345 status = "okay"; 346}; 347 348&u2phy { 349 status = "okay"; 350 351 u2phy_host: host-port { 352 status = "okay"; 353 }; 354 355 u2phy_otg: otg-port { 356 status = "okay"; 357 }; 358}; 359 360&usb20_otg { 361 dr_mode = "host"; 362 status = "okay"; 363}; 364 365&usb_host0_ehci { 366 status = "okay"; 367}; 368 369&usb_host0_ohci { 370 status = "okay"; 371}; 372 373&vop { 374 status = "okay"; 375}; 376 377&vop_mmu { 378 status = "okay"; 379}; 380