1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Device Tree Source for the RZ/G2UL Type-1 SMARC EVK parts
4 *
5 * Copyright (C) 2022 Renesas Electronics Corp.
6 */
7
8/*
9 * DIP-Switch SW1 setting
10 * 1 : High; 0: Low
11 * SW1-2 : SW_SD0_DEV_SEL	(0: uSD; 1: eMMC)
12 * SW1-3 : SW_ET0_EN_N		(0: ETHER0; 1: CAN0, CAN1, SSI1, RSPI1)
13 * Please change below macros according to SW1 setting
14 */
15#define SW_SW0_DEV_SEL	1
16#define SW_ET0_EN_N	1
17
18#include "rzg2ul-smarc-som.dtsi"
19#include "rzg2ul-smarc-pinfunction.dtsi"
20#include "rz-smarc-common.dtsi"
21
22#if (!SW_ET0_EN_N)
23&canfd {
24	/delete-property/ pinctrl-0;
25	/delete-property/ pinctrl-names;
26	status = "disabled";
27};
28#endif
29
30&cpu_dai {
31	sound-dai = <&ssi1>;
32};
33
34&i2c1 {
35	wm8978: codec@1a {
36		compatible = "wlf,wm8978";
37		#sound-dai-cells = <0>;
38		reg = <0x1a>;
39	};
40};
41
42#if (SW_ET0_EN_N)
43&ssi1 {
44	pinctrl-0 = <&ssi1_pins>;
45	pinctrl-names = "default";
46
47	status = "okay";
48};
49#else
50&snd_rzg2l {
51	status = "disabled";
52};
53
54&ssi1 {
55	/delete-property/ pinctrl-0;
56	/delete-property/ pinctrl-names;
57	status = "disabled";
58};
59#endif
60
61&vccq_sdhi1 {
62	gpios = <&pinctrl RZG2L_GPIO(6, 1) GPIO_ACTIVE_HIGH>;
63};
64