1a74a0bf3SBiju Das// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2a74a0bf3SBiju Das/* 3a74a0bf3SBiju Das * Device Tree Source for the RZ/G2UL Type-1 SMARC EVK parts 4a74a0bf3SBiju Das * 5a74a0bf3SBiju Das * Copyright (C) 2022 Renesas Electronics Corp. 6a74a0bf3SBiju Das */ 7a74a0bf3SBiju Das 8ed8efe50SBiju Das/* 9ed8efe50SBiju Das * DIP-Switch SW1 setting 10ed8efe50SBiju Das * 1 : High; 0: Low 11ed8efe50SBiju Das * SW1-2 : SW_SD0_DEV_SEL (0: uSD; 1: eMMC) 126494e4f9SBiju Das * SW1-3 : SW_ET0_EN_N (0: ETHER0; 1: CAN0, CAN1, SSI1, RSPI1) 13ed8efe50SBiju Das * Please change below macros according to SW1 setting 14ed8efe50SBiju Das */ 15ed8efe50SBiju Das#define SW_SW0_DEV_SEL 1 166494e4f9SBiju Das#define SW_ET0_EN_N 1 17ed8efe50SBiju Das 18a74a0bf3SBiju Das#include "rzg2ul-smarc-som.dtsi" 19a74a0bf3SBiju Das#include "rzg2ul-smarc-pinfunction.dtsi" 20a74a0bf3SBiju Das#include "rz-smarc-common.dtsi" 21a74a0bf3SBiju Das 22*b0fa698bSBiju Das&i2c1 { 23*b0fa698bSBiju Das wm8978: codec@1a { 24*b0fa698bSBiju Das compatible = "wlf,wm8978"; 25*b0fa698bSBiju Das #sound-dai-cells = <0>; 26*b0fa698bSBiju Das reg = <0x1a>; 27*b0fa698bSBiju Das }; 28*b0fa698bSBiju Das}; 29*b0fa698bSBiju Das 30a74a0bf3SBiju Das&vccq_sdhi1 { 31a74a0bf3SBiju Das gpios = <&pinctrl RZG2L_GPIO(6, 1) GPIO_ACTIVE_HIGH>; 32a74a0bf3SBiju Das}; 33