1ce0c63b6SBiju Das// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2ce0c63b6SBiju Das/* 3ce0c63b6SBiju Das * Device Tree Source for the RZ/G2LC SMARC pincontrol parts 4ce0c63b6SBiju Das * 5ce0c63b6SBiju Das * Copyright (C) 2021 Renesas Electronics Corp. 6ce0c63b6SBiju Das */ 7ce0c63b6SBiju Das 8ce0c63b6SBiju Das#include <dt-bindings/gpio/gpio.h> 9ce0c63b6SBiju Das#include <dt-bindings/pinctrl/rzg2l-pinctrl.h> 10ce0c63b6SBiju Das 11ce0c63b6SBiju Das&pinctrl { 12ce0c63b6SBiju Das pinctrl-0 = <&sound_clk_pins>; 13ce0c63b6SBiju Das pinctrl-names = "default"; 14ce0c63b6SBiju Das 1546da6327SBiju Das#if SW_SCIF_CAN 1646da6327SBiju Das /* SW8 should be at position 2->1 */ 1746da6327SBiju Das can1_pins: can1 { 1846da6327SBiju Das pinmux = <RZG2L_PORT_PINMUX(40, 0, 3)>, /* TxD */ 1946da6327SBiju Das <RZG2L_PORT_PINMUX(40, 1, 3)>; /* RxD */ 2046da6327SBiju Das }; 2146da6327SBiju Das#endif 2246da6327SBiju Das 2346da6327SBiju Das#if SW_RSPI_CAN 2446da6327SBiju Das /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */ 2548d8ee5bSGeert Uytterhoeven can1-stb-hog { 2646da6327SBiju Das gpio-hog; 2746da6327SBiju Das gpios = <RZG2L_GPIO(44, 3) GPIO_ACTIVE_HIGH>; 2846da6327SBiju Das output-low; 2946da6327SBiju Das line-name = "can1_stb"; 3046da6327SBiju Das }; 3146da6327SBiju Das 3246da6327SBiju Das can1_pins: can1 { 3346da6327SBiju Das pinmux = <RZG2L_PORT_PINMUX(44, 0, 3)>, /* TxD */ 3446da6327SBiju Das <RZG2L_PORT_PINMUX(44, 1, 3)>; /* RxD */ 3546da6327SBiju Das }; 3646da6327SBiju Das#endif 3746da6327SBiju Das 384fa1edc8SBiju Das i2c0_pins: i2c0 { 394fa1edc8SBiju Das pins = "RIIC0_SDA", "RIIC0_SCL"; 404fa1edc8SBiju Das input-enable; 414fa1edc8SBiju Das }; 424fa1edc8SBiju Das 434fa1edc8SBiju Das i2c1_pins: i2c1 { 444fa1edc8SBiju Das pins = "RIIC1_SDA", "RIIC1_SCL"; 454fa1edc8SBiju Das input-enable; 464fa1edc8SBiju Das }; 474fa1edc8SBiju Das 484fa1edc8SBiju Das i2c2_pins: i2c2 { 494fa1edc8SBiju Das pinmux = <RZG2L_PORT_PINMUX(42, 3, 1)>, /* SDA */ 504fa1edc8SBiju Das <RZG2L_PORT_PINMUX(42, 4, 1)>; /* SCL */ 514fa1edc8SBiju Das }; 524fa1edc8SBiju Das 53*5d7de61fSBiju Das mtu3_pins: mtu3 { 54*5d7de61fSBiju Das mtu3-pwm { 55*5d7de61fSBiju Das pinmux = <RZG2L_PORT_PINMUX(44, 0, 4)>, /* MTIOC3A */ 56*5d7de61fSBiju Das <RZG2L_PORT_PINMUX(44, 1, 4)>, /* MTIOC3B */ 57*5d7de61fSBiju Das <RZG2L_PORT_PINMUX(44, 2, 4)>, /* MTIOC3C */ 58*5d7de61fSBiju Das <RZG2L_PORT_PINMUX(44, 3, 4)>; /* MTIOC3D */ 59*5d7de61fSBiju Das }; 60*5d7de61fSBiju Das }; 61*5d7de61fSBiju Das 62a2b642d8SBiju Das scif0_pins: scif0 { 63a2b642d8SBiju Das pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */ 64a2b642d8SBiju Das <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */ 65a2b642d8SBiju Das }; 66a2b642d8SBiju Das 67a2b642d8SBiju Das scif1_pins: scif1 { 68a2b642d8SBiju Das pinmux = <RZG2L_PORT_PINMUX(40, 0, 1)>, /* TxD */ 69a2b642d8SBiju Das <RZG2L_PORT_PINMUX(40, 1, 1)>, /* RxD */ 70a2b642d8SBiju Das <RZG2L_PORT_PINMUX(41, 0, 1)>, /* CTS# */ 71a2b642d8SBiju Das <RZG2L_PORT_PINMUX(41, 1, 1)>; /* RTS# */ 72a2b642d8SBiju Das }; 73a2b642d8SBiju Das 7481a27b1fSBiju Das sd1-pwr-en-hog { 7581a27b1fSBiju Das gpio-hog; 7681a27b1fSBiju Das gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>; 7781a27b1fSBiju Das output-high; 7881a27b1fSBiju Das line-name = "sd1_pwr_en"; 7981a27b1fSBiju Das }; 8081a27b1fSBiju Das 8181a27b1fSBiju Das sdhi1_pins: sd1 { 8281a27b1fSBiju Das sd1_data { 8381a27b1fSBiju Das pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3"; 8481a27b1fSBiju Das power-source = <3300>; 8581a27b1fSBiju Das }; 8681a27b1fSBiju Das 8781a27b1fSBiju Das sd1_ctrl { 8881a27b1fSBiju Das pins = "SD1_CLK", "SD1_CMD"; 8981a27b1fSBiju Das power-source = <3300>; 9081a27b1fSBiju Das }; 9181a27b1fSBiju Das 9281a27b1fSBiju Das sd1_mux { 9381a27b1fSBiju Das pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */ 9481a27b1fSBiju Das }; 9581a27b1fSBiju Das }; 9681a27b1fSBiju Das 9781a27b1fSBiju Das sdhi1_pins_uhs: sd1_uhs { 9881a27b1fSBiju Das sd1_data_uhs { 9981a27b1fSBiju Das pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3"; 10081a27b1fSBiju Das power-source = <1800>; 10181a27b1fSBiju Das }; 10281a27b1fSBiju Das 10381a27b1fSBiju Das sd1_ctrl_uhs { 10481a27b1fSBiju Das pins = "SD1_CLK", "SD1_CMD"; 10581a27b1fSBiju Das power-source = <1800>; 10681a27b1fSBiju Das }; 10781a27b1fSBiju Das 10881a27b1fSBiju Das sd1_mux_uhs { 10981a27b1fSBiju Das pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */ 11081a27b1fSBiju Das }; 11181a27b1fSBiju Das }; 11281a27b1fSBiju Das 113ce0c63b6SBiju Das sound_clk_pins: sound_clk { 114ce0c63b6SBiju Das pins = "AUDIO_CLK1", "AUDIO_CLK2"; 115ce0c63b6SBiju Das input-enable; 116ce0c63b6SBiju Das }; 1171889f479SBiju Das 118061ba41cSBiju Das spi1_pins: spi1 { 119061ba41cSBiju Das pinmux = <RZG2L_PORT_PINMUX(44, 0, 1)>, /* CK */ 120061ba41cSBiju Das <RZG2L_PORT_PINMUX(44, 1, 1)>, /* MOSI */ 121061ba41cSBiju Das <RZG2L_PORT_PINMUX(44, 2, 1)>, /* MISO */ 122061ba41cSBiju Das <RZG2L_PORT_PINMUX(44, 3, 1)>; /* SSL */ 123061ba41cSBiju Das }; 124061ba41cSBiju Das 1254eb6a6bbSBiju Das ssi0_pins: ssi0 { 1264eb6a6bbSBiju Das pinmux = <RZG2L_PORT_PINMUX(45, 0, 1)>, /* BCK */ 1274eb6a6bbSBiju Das <RZG2L_PORT_PINMUX(45, 1, 1)>, /* RCK */ 1284eb6a6bbSBiju Das <RZG2L_PORT_PINMUX(45, 2, 1)>, /* TXD */ 1294eb6a6bbSBiju Das <RZG2L_PORT_PINMUX(45, 3, 1)>; /* RXD */ 1304eb6a6bbSBiju Das }; 1314eb6a6bbSBiju Das 1321889f479SBiju Das usb0_pins: usb0 { 1331889f479SBiju Das pinmux = <RZG2L_PORT_PINMUX(4, 0, 1)>, /* VBUS */ 1341889f479SBiju Das <RZG2L_PORT_PINMUX(5, 0, 1)>, /* OVC */ 1351889f479SBiju Das <RZG2L_PORT_PINMUX(5, 1, 1)>; /* OTG_ID */ 1361889f479SBiju Das }; 1371889f479SBiju Das 1381889f479SBiju Das usb1_pins: usb1 { 1391889f479SBiju Das pinmux = <RZG2L_PORT_PINMUX(42, 0, 1)>, /* VBUS */ 1401889f479SBiju Das <RZG2L_PORT_PINMUX(42, 1, 1)>; /* OVC */ 1411889f479SBiju Das }; 142ce0c63b6SBiju Das}; 143ce0c63b6SBiju Das 144