1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2/* 3 * Device Tree Source for the RZ/G2L SMARC EVK common parts 4 * 5 * Copyright (C) 2021 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/pinctrl/rzg2l-pinctrl.h> 10 11/* 12 * SSI-WM8978 13 * 14 * This command is required when Playback/Capture 15 * 16 * amixer cset name='Left Input Mixer L2 Switch' on 17 * amixer cset name='Right Input Mixer R2 Switch' on 18 * amixer cset name='Headphone Playback Volume' 100 19 * amixer cset name='PCM Volume' 100% 20 * amixer cset name='Input PGA Volume' 25 21 * 22 */ 23 24/ { 25 aliases { 26 serial0 = &scif0; 27 i2c0 = &i2c0; 28 i2c1 = &i2c1; 29 i2c3 = &i2c3; 30 }; 31 32 chosen { 33 bootargs = "ignore_loglevel"; 34 stdout-path = "serial0:115200n8"; 35 }; 36 37 audio_mclock: audio_mclock { 38 compatible = "fixed-clock"; 39 #clock-cells = <0>; 40 clock-frequency = <11289600>; 41 }; 42 43 snd_rzg2l: sound { 44 compatible = "simple-audio-card"; 45 simple-audio-card,format = "i2s"; 46 simple-audio-card,bitclock-master = <&cpu_dai>; 47 simple-audio-card,frame-master = <&cpu_dai>; 48 simple-audio-card,mclk-fs = <256>; 49 50 simple-audio-card,widgets = "Microphone", "Microphone Jack"; 51 simple-audio-card,routing = 52 "L2", "Mic Bias", 53 "R2", "Mic Bias", 54 "Mic Bias", "Microphone Jack"; 55 56 cpu_dai: simple-audio-card,cpu { 57 sound-dai = <&ssi0>; 58 }; 59 60 codec_dai: simple-audio-card,codec { 61 clocks = <&audio_mclock>; 62 sound-dai = <&wm8978>; 63 }; 64 }; 65 66 usb0_vbus_otg: regulator-usb0-vbus-otg { 67 compatible = "regulator-fixed"; 68 69 regulator-name = "USB0_VBUS_OTG"; 70 regulator-min-microvolt = <5000000>; 71 regulator-max-microvolt = <5000000>; 72 }; 73}; 74 75&audio_clk1{ 76 clock-frequency = <11289600>; 77}; 78 79&audio_clk2{ 80 clock-frequency = <12288000>; 81}; 82 83&ehci0 { 84 dr_mode = "otg"; 85 status = "okay"; 86}; 87 88&ehci1 { 89 status = "okay"; 90}; 91 92&hsusb { 93 dr_mode = "otg"; 94 status = "okay"; 95}; 96 97&i2c0 { 98 pinctrl-0 = <&i2c0_pins>; 99 pinctrl-names = "default"; 100 101 status = "okay"; 102}; 103 104&i2c1 { 105 pinctrl-0 = <&i2c1_pins>; 106 pinctrl-names = "default"; 107 108 status = "okay"; 109}; 110 111&i2c3 { 112 pinctrl-0 = <&i2c3_pins>; 113 pinctrl-names = "default"; 114 clock-frequency = <400000>; 115 116 status = "okay"; 117 118 wm8978: codec@1a { 119 compatible = "wlf,wm8978"; 120 #sound-dai-cells = <0>; 121 reg = <0x1a>; 122 }; 123}; 124 125&ohci0 { 126 dr_mode = "otg"; 127 status = "okay"; 128}; 129 130&ohci1 { 131 status = "okay"; 132}; 133 134&phyrst { 135 status = "okay"; 136}; 137 138&pinctrl { 139 pinctrl-0 = <&sound_clk_pins>; 140 pinctrl-names = "default"; 141 142 i2c0_pins: i2c0 { 143 pins = "RIIC0_SDA", "RIIC0_SCL"; 144 input-enable; 145 }; 146 147 i2c1_pins: i2c1 { 148 pins = "RIIC1_SDA", "RIIC1_SCL"; 149 input-enable; 150 }; 151 152 i2c3_pins: i2c3 { 153 pinmux = <RZG2L_PORT_PINMUX(18, 0, 3)>, /* SDA */ 154 <RZG2L_PORT_PINMUX(18, 1, 3)>; /* SCL */ 155 }; 156 157 scif0_pins: scif0 { 158 pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */ 159 <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */ 160 }; 161 162 sound_clk_pins: sound_clk { 163 pins = "AUDIO_CLK1", "AUDIO_CLK2"; 164 input-enable; 165 }; 166 167 ssi0_pins: ssi0 { 168 pinmux = <RZG2L_PORT_PINMUX(45, 0, 1)>, /* BCK */ 169 <RZG2L_PORT_PINMUX(45, 1, 1)>, /* RCK */ 170 <RZG2L_PORT_PINMUX(45, 2, 1)>, /* TXD */ 171 <RZG2L_PORT_PINMUX(45, 3, 1)>; /* RXD */ 172 }; 173 174 usb0_pins: usb0 { 175 pinmux = <RZG2L_PORT_PINMUX(4, 0, 1)>, /* VBUS */ 176 <RZG2L_PORT_PINMUX(5, 0, 1)>, /* OVC */ 177 <RZG2L_PORT_PINMUX(5, 1, 1)>; /* OTG_ID */ 178 }; 179 180 usb1_pins: usb1 { 181 pinmux = <RZG2L_PORT_PINMUX(42, 0, 1)>, /* VBUS */ 182 <RZG2L_PORT_PINMUX(42, 1, 1)>; /* OVC */ 183 }; 184}; 185 186&scif0 { 187 pinctrl-0 = <&scif0_pins>; 188 pinctrl-names = "default"; 189 status = "okay"; 190}; 191 192&ssi0 { 193 pinctrl-0 = <&ssi0_pins>; 194 pinctrl-names = "default"; 195 196 status = "okay"; 197}; 198 199&usb2_phy0 { 200 pinctrl-0 = <&usb0_pins>; 201 pinctrl-names = "default"; 202 203 vbus-supply = <&usb0_vbus_otg>; 204 status = "okay"; 205}; 206 207&usb2_phy1 { 208 pinctrl-0 = <&usb1_pins>; 209 pinctrl-names = "default"; 210 211 status = "okay"; 212}; 213