1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Device Tree Source for the RZ/G2L SMARC EVK common parts
4 *
5 * Copyright (C) 2021 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
10
11/ {
12	aliases {
13		serial0 = &scif0;
14		i2c0 = &i2c0;
15		i2c1 = &i2c1;
16		i2c3 = &i2c3;
17	};
18
19	chosen {
20		bootargs = "ignore_loglevel";
21		stdout-path = "serial0:115200n8";
22	};
23
24	usb0_vbus_otg: regulator-usb0-vbus-otg {
25		compatible = "regulator-fixed";
26
27		regulator-name = "USB0_VBUS_OTG";
28		regulator-min-microvolt = <5000000>;
29		regulator-max-microvolt = <5000000>;
30	};
31};
32
33&ehci0 {
34	dr_mode = "otg";
35	status = "okay";
36};
37
38&ehci1 {
39	status = "okay";
40};
41
42&extal_clk {
43	clock-frequency = <24000000>;
44};
45
46&hsusb {
47	dr_mode = "otg";
48	status = "okay";
49};
50
51&i2c0 {
52	pinctrl-0 = <&i2c0_pins>;
53	pinctrl-names = "default";
54
55	status = "okay";
56};
57
58&i2c1 {
59	pinctrl-0 = <&i2c1_pins>;
60	pinctrl-names = "default";
61
62	status = "okay";
63};
64
65&i2c3 {
66	pinctrl-0 = <&i2c3_pins>;
67	pinctrl-names = "default";
68	clock-frequency = <400000>;
69
70	status = "okay";
71
72	wm8978: codec@1a {
73		compatible = "wlf,wm8978";
74		#sound-dai-cells = <0>;
75		reg = <0x1a>;
76	};
77};
78
79&ohci0 {
80	dr_mode = "otg";
81	status = "okay";
82};
83
84&ohci1 {
85	status = "okay";
86};
87
88&phyrst {
89	status = "okay";
90};
91
92&pinctrl {
93	i2c0_pins: i2c0 {
94		pins = "RIIC0_SDA", "RIIC0_SCL";
95		input-enable;
96	};
97
98	i2c1_pins: i2c1 {
99		pins = "RIIC1_SDA", "RIIC1_SCL";
100		input-enable;
101	};
102
103	i2c3_pins: i2c3 {
104		pinmux = <RZG2L_PORT_PINMUX(18, 0, 3)>, /* SDA */
105			 <RZG2L_PORT_PINMUX(18, 1, 3)>; /* SCL */
106	};
107
108	scif0_pins: scif0 {
109		pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>,	/* TxD */
110			 <RZG2L_PORT_PINMUX(38, 1, 1)>;	/* RxD */
111	};
112
113	usb0_pins: usb0 {
114		pinmux = <RZG2L_PORT_PINMUX(4, 0, 1)>, /* VBUS */
115			 <RZG2L_PORT_PINMUX(5, 0, 1)>, /* OVC */
116			 <RZG2L_PORT_PINMUX(5, 1, 1)>; /* OTG_ID */
117	};
118
119	usb1_pins: usb1 {
120		pinmux = <RZG2L_PORT_PINMUX(42, 0, 1)>, /* VBUS */
121			 <RZG2L_PORT_PINMUX(42, 1, 1)>; /* OVC */
122	};
123};
124
125&scif0 {
126	pinctrl-0 = <&scif0_pins>;
127	pinctrl-names = "default";
128	status = "okay";
129};
130
131&usb2_phy0 {
132	pinctrl-0 = <&usb0_pins>;
133	pinctrl-names = "default";
134
135	vbus-supply = <&usb0_vbus_otg>;
136	status = "okay";
137};
138
139&usb2_phy1 {
140	pinctrl-0 = <&usb1_pins>;
141	pinctrl-names = "default";
142
143	status = "okay";
144};
145